CN101009269A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN101009269A
CN101009269A CNA2006100771832A CN200610077183A CN101009269A CN 101009269 A CN101009269 A CN 101009269A CN A2006100771832 A CNA2006100771832 A CN A2006100771832A CN 200610077183 A CN200610077183 A CN 200610077183A CN 101009269 A CN101009269 A CN 101009269A
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Prior art keywords
semiconductor device
passive component
electrode terminal
base substrate
lead frame
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CNA2006100771832A
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CN101009269B (zh
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西村隆雄
平冈哲也
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Socionext Inc
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Fujitsu Ltd
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Publication of CN101009269B publication Critical patent/CN101009269B/zh
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Abstract

一种能够防止电极端子与管芯焊盘之间的接触以及能够确保进行电极端子的导线接合的半导体器件。形成无源元件,使各电极端子的垂直高度高于元件部分的高度。更具体地,电极端子的每个横断面积均略大于元件部分的横断面积。因此,各电极端子的上部和下部略高于元件部分(从元件部分突出)。通过粘合剂固定无源元件,使元件部分定位于高位部分上,从而近似平行于衬底表面。此外,各电极端子的一部分(底部)分别定位于凹入部分内的各空间。因此,在各电极端子与管芯焊盘之间形成预定空间。

Description

半导体器件及其制造方法
技术领域
本发明涉及一种半导体器件及其制造方法。更具体地,本发明涉及一种通过接合线电连接电子元件和无源元件而构成的半导体器件。本发明还涉及一种制造该半导体器件的方法。
背景技术
在诸如大规模集成电路(LSI)之类的半导体芯片(半导体元件)中,例如,在电源电路与接地电路之间连接电容器,抑制由半导体芯片内的所述电路同时开关所导致的电源反弹或接地(GND)反弹。因此,可以实现稳定供电。这种电容器称为旁路电容器。
此外,为了截断通过电源线进入的高频噪声,还为电源线串联连接电感器。这种电感器称为电源滤波器。
当将无源元件(例如旁路电容器或电源滤波器)容置在安装有半导体芯片的半导体器件中并将所述无源元件连接至半导体芯片时,能够获得如下的优点。即,上述旁路电容器或电源滤波器能够设置于更靠近半导体芯片内的电路,因此能够使半导体芯片稳定工作,从而提高电特性。此外,无源元件(例如旁路电容器或电源滤波器)无需单独安装在用于安装半导体器件的系统板上,因此能够减少系统板上的元件数目,从而能够实现该系统的小型化。
在这种半导体器件中,已知一种构造:使用芯片元件形式的无源元件作为置入半导体器件中的无源元件,通过接合线进行半导体芯片与无源元件之间的连接。
通过使用芯片元件形式的无源元件,可以使用例如外部尺寸标准化的普通芯片元件(例如芯片电容器或芯片电感器),这种芯片元件是指所谓的1005元件、0603元件或0402元件。因此,能够以低成本制造半导体器件。1005元件的外部尺寸为1.0mm×0.5mm×0.5mm,0603元件的外部尺寸为0.6mm×0.3mm×0.3mm,0402元件的外部尺寸为0.4mm×0.2mm×0.2mm。在上述任何元件均具有在纵向两端上均设置电极端子的构造。
此处,已知一种使用接合线互连无源元件和半导体芯片的方法(参见例如日本特开平8-162607(图2),日本特开2004-47811(第18页、图6和图7))。
当使用这种方法时,能够减少导电图案部分的面积,从而能够使半导体器件小型化。此外,不通过导电图案而利用接合线互连半导体芯片和无源元件,因此能够使得半导体器件的工作更稳定,从而能够提高电特性。
在许多情况下,通常使用焊料或导电胶将上述芯片形式的无源元件安装于引线框的内引线部分或导电图案部分(例如布线衬底的电极焊盘)上。在这种情况下,需要具有用于润湿和分布焊料或导电胶的区域的导电图案。此外,还需要用于由接合线连接导电图案与半导体芯片之间的接合区。
此处,日本特开平8-162607(图2)公开如下构造。即,在引线框的管芯焊盘(die pad)上,彼此靠近地安装和固定半导体芯片和电容器。此外,通过接合线进行半导体芯片、电容器和引线框之间的互连。然后,利用模制树脂密封整个器件。在该公开文件中,并未详细说明固定半导体芯片和电容器的方法。
另一方面,日本特开2004-47811(第18页、图6和图7)公开如下构造。即,在引线框的管芯焊盘(台面(stage))上,并排安装半导体芯片和无源元件。此外,通过接合线连接半导体芯片与无源元件。在管芯焊盘中用于安装无源元件的部分上,利用蚀刻形成凹入部分,使得能够通过绝缘带将整个无源元件安装于该凹入部分内。
采用上述构造,通过绝缘带安装无源元件。因此,能够防止设置于无源元件两端的电极端子与管芯焊盘接触。此外,无源元件设置于半导体芯片内靠近电路的位置。因此能够提高半导体器件的电特性,并使其稳定工作。此外,在管芯焊盘上形成凹入部分并将无源元件装配于该凹入部分内,因此能够降低无源元件的安装高度。
但是,在上述这些实例中,在管芯焊盘上安装和固定无源元件时,使用绝缘带作为粘合材料。此时,需要制备加工为预定尺寸的带并将该带粘合至凹入部分的步骤,因此工艺复杂化。
也考虑过使用绝缘膏状粘合剂替代绝缘带的方法。但是,该方法在制造半导体器件时很有可能导致如下问题:
(1)当在利用涂胶机(dispenser)涂覆和供应于管芯焊盘上的绝缘膏状粘合剂上安装无源元件时,如果施加于该无源元件上的载荷过分增加,则该无源元件的电极端子和管芯焊盘会彼此接触而导致短路。
(2)相反,如果施加于该无源元件上的载荷过分减少,则该无源元件会倾斜地安装于管芯焊盘上。当在这种状态下进行无源元件的电极端子的导线接合时,将不能确保导线的一端连接至电极端子。
发明内容
鉴于上述问题,本发明的一个目的是提供一种半导体器件,其能够防止电极端子与管芯焊盘之间的接触以及能够确保进行电极端子的导线接合。
本发明的另一目的是提供一种半导体器件的制造方法。
为了实现上述目的,根据本发明的一种方案,提供一种由电绝缘密封剂密封的半导体器件。该半导体器件包括:无源元件,其具有绝缘柱状体部分和设置于该柱状体部分的两轴端的一对电极端子;半导体元件,其通过接合线连接到至少一个所述电极端子;以及基础(base)衬底,其形成有不与所述电极端子相接触的部分,其中所述无源元件和半导体元件均通过粘合层安装,且该柱状体部分被支撑为与衬底表面近似平行。
根据本发明的另一方案,提供一种半导体器件的制造方法,该半导体器件通过利用导线接合连接半导体元件与无源元件而构成,该无源元件具有柱状体部分和设置于该柱状体部分的两轴端的一对电极端子。本方法包括如下步骤:在基材上形成凹入部分,获得基础衬底;将粘合材料提供至该凹入部分;将该无源元件设置为使该柱状体部分通过该粘合材料定位在该基础衬底上,且每个所述电极端子通过该粘合材料定位在与该凹入部分相对应的部分上;在该无源元件上施加预定压力,暂时粘合该无源元件和该基础衬底;以及固化该粘合材料,最终粘合该无源元件和该基础衬底。
本发明的上述及其它目的、特征和优点将从以下参照附图的说明中变得更为清楚,其中附图以实例的方式示出本发明的优选实施例。
附图说明
图1为示出根据实施例的半导体器件的透视图。
图2为示出根据第一实施例的半导体器件的内部构造的俯视图。
图3为示出无源元件的透视图。
图4A、4B和4C均示出根据第一实施例的半导体器件的引线框,其中图4A示出引线框的局部俯视图,图4B为沿图4A所示引线框的A-A线的剖视图,图4C为沿图4A所示引线框的B-B线的剖视图。
图5为沿图2所示半导体器件的A-A线的剖视图。
图6为沿图2所示半导体器件的B-B线的剖视图。
图7A、7B和7C均示出根据第一实施例的半导体器件的引线框修改例,其中图7A为示出该半导体器件的引线框的俯视图,图7B为沿图7A所示引线框的A-A线的剖视图,图7C为沿图7A所示引线框的B-B线的剖视图。
图8为示出根据第一实施例的半导体器件的制造方法的剖视图。
图9为示出根据第一实施例的半导体器件的制造方法的剖视图。
图10为示出根据第一实施例的半导体器件的制造方法的剖视图。
图11为示出根据第二实施例的半导体器件的剖视图。
图12A、12B和12C均示出根据第三实施例的半导体器件的引线框,其中图12A为示出该半导体器件的引线框的俯视图,图12B为沿图12A所示引线框的A-A线的剖视图,图12C为沿图12A所示引线框的B-B线的剖视图。
图13为示出根据第三实施例的半导体器件的剖视图。
图14A、14B和14C均示出根据第四实施例的半导体器件的引线框,其中图14A为示出该半导体器件的引线框的俯视图,图14B为沿图14A所示引线框的A-A线的剖视图,图14C为沿图14A所示引线框的B-B线的剖视图。
图15为示出根据第四实施例的半导体器件的剖视图。
图16A、16B、16C和16D均示出根据第五实施例的半导体器件的引线框,其中图16A为示出该半导体器件的引线框的俯视图,图16B为沿图16A所示引线框的A-A线的剖视图,图16C为沿图16A所示引线框的B-B线的剖视图,图16D为沿图16A所示引线框的C-C线的剖视图。
图17为示出根据第五实施例的半导体器件的剖视图。
图18为示出根据第五实施例的半导体器件的无源元件构造的俯视图。
图19A、19B、19C和19D均示出根据第六实施例的半导体器件的引线框,其中图19A为示出该半导体器件的引线框的俯视图,图19B为沿图19A所示引线框的A-A线的剖视图,图19C为沿图19A所示引线框的B-B线的剖视图,图19D为沿图19A所示引线框的C-C线的剖视图。
图20为示出根据第六实施例的半导体器件的无源元件构造的俯视图。
图21为示出根据第七实施例的半导体器件的内部构造的俯视图。
图22A、22B和22C均示出图21所示半导体器件的引线框,其中图22A为示出该半导体器件的引线框的俯视图,图22B为沿图22A所示引线框的A-A线的剖视图,图22C为沿图22A所示引线框的B-B线的剖视图。
图23为示出根据第八实施例的半导体器件的内部构造的俯视图。
图24为沿图23所示半导体器件的A-A线的剖视图。
图25为沿图23所示半导体器件的B-B线的剖视图。
图26为示出根据第九实施例的半导体器件的内部构造的俯视图。
图27A、27B和27C均示出图26所示半导体器件的引线框,其中图27A为示出该半导体器件的引线框的俯视图,图27B为沿图27A所示引线框的A-A线的剖视图,图27C为沿图27A所示引线框的B-B线的剖视图。
具体实施方式
以下参照附图详细说明本发明的优选实施例。
图1为示出根据实施例的半导体器件的透视图。
半导体器件10采用小外形封装(SOP)类型的LSI封装。在将后述半导体元件安装于引线框上之后,利用电绝缘密封部件或密封剂30密封整个器件10。此外,四个外引线23电连接至该半导体器件,并设置于密封剂30的两侧表面上。密封剂30的构成材料的实例包括环氧树脂。
图2为示出根据第一实施例的半导体器件的内部构造的俯视图。
图2中,以下将上侧、下侧和右侧分别称为“上”、“下”和“右”。
半导体器件10具有半导体元件11、无源元件15、多个导线(接合线)18和引线框20,其中引线框20包括管芯焊盘(基础衬底)21、围绕管芯焊盘21设置的多个内引线22和外引线23、以及一对支撑部件24。
引线框20的构成材料没有特殊限制。其实例包括铁(Fe)镍合金、铜(Cu)和铜合金之类的导体。此外,引线框20的板厚例如约为0.125mm、0.15mm、0.2mm或0.25mm。
各内引线22电连接至各外引线23。
半导体元件11通过层状粘合剂32设置于管芯焊盘21上。此外,半导体元件11具有多个设置于其表面上的电极焊盘12。
粘合剂32的构成材料没有特殊限制。其实例包括由环氧树脂或聚酰亚胺树脂制成的热固树脂或热塑树脂。此外,这些树脂可以包含导电颗粒,例如银(Ag)、镍(Ni)和碳(C)。
各电极焊盘12通过导线18分别电连接至各内引线22。
图3为示出无源元件的透视图。
如图3所示,无源元件15设置于半导体元件11的附近(图2所述的右侧)。无源元件15通过粘合剂(粘合层)33设置于管芯焊盘21上。粘合剂33的构成材料没有特殊限制。例如,粘合剂33由环氧树脂或聚酰亚胺树脂制成的热固树脂构成。
无源元件15为柱状(长方体),并具有设置于中心的绝缘元件部分(主体部分)17和设置于元件部分17两端的两个电极端子16、16。此外,无源元件15通过所述电极端子16、16和导线18、18连接至半导体元件11上的电极焊盘12。
无源元件15没有特殊限制。其实例包括用作旁路电容器的电容器、用作噪声滤波器的电感器、和电阻器。
可以利用导线18电连接无源元件15和内引线22。
导线18由例如金属(例如金或铝)构成。
图4示出根据第一实施例的半导体器件的引线框,其中图4A为示出引线框的局部俯视图,图4B为沿图4A所示引线框的A-A线的剖视图,图4C为沿图4A所示引线框的B-B线的剖视图。
如这些附图所示,在管芯焊盘21上与两个电极端子16、16相对应的部分设置两个凹入部分27、27,凹入部分27、27的形状(尺寸)与电极端子16、16相对应。凹入部分27、27之间的管芯焊盘21部分形成高位部分28。凹入部分27的深度与电极端子16的形状相对应,并且没有特殊限制。该深度为例如约5-80μm。
图5为沿图2所示半导体器件的A-A线的剖视图,图6为沿图2所示半导体器件的B-B线的剖视图。
如图6所示,无源元件15的结构中,图6所示的各电极端子16、16的垂直长度(以下称为高度)大于元件部分17的高度。更具体地,各电极端子16、16的剖面面积略大于元件部分17的剖面面积。因此,各电极端子16、16的上部和下部位于略高于元件部分17的位置,即从元件部分17突出。
通过粘合剂33固定无源元件15,以使元件部分17位于高位部分28上,从而近似平行于衬底表面。再有,各电极端子16、16的一部分(底部)位于各凹入部分27、27的空间内。从而在各电极端子16、16和管芯焊盘21之间形成预定空间。因此,根据半导体器件10,利用简单的结构就能够容易且稳妥地避免无源元件15与管芯焊盘21之间的接触。此外,能够使得半导体器件10更小(更薄)。
在本实施例中,各凹入部分27、27单独形成;但是本发明并不限于此。凹入部分可以一体形成。以下说明半导体器件10的修改例。
图7示出根据第一实施例的半导体器件的引线框修改例,其中图7A示出该半导体器件的引线框的俯视图,图7B为沿图7A所示引线框的A-A线的剖视图,图7C为沿图7A所示引线框的B-B线的剖视图。
如图7所示,半导体器件10可以具有如下构造。即,如俯视图所示,在管芯焊盘21上形成环绕无源元件15的环状凹入部分27。此外,在凹入部分27内形成高度约等于凹入部分27的深度的高位部分28(凸出部分)。
接下来,以制造图2-6所示的半导体器件10为例,说明根据本发明的半导体器件的制造方法。
图8-10均为示出根据第一实施例的半导体器件的制造方法的剖视图。
首先,如图8所示,制备引线框架20,引线框架20具有:管芯焊盘21,其上具有通过加工薄金属板而形成的凹入部分27,各凹入部分27、27的形状分别与无源元件15的各电极端子16、16的形状相对应;内引线22;外引线23;支撑部分24和外框31(外围框部分)。
各凹入部分27、27的制造方法没有特殊限制。其实例包括利用蚀刻(半蚀刻)的凹入部分化学制造方法,以及利用通过冲压模(stamping/die)的模压成形工艺或利用例如切削工具磨削的机械加工工艺的凹入部分制造方法。
接着,如图9A所示,粘合剂32从喷嘴200喷射到管芯焊盘21中用于设置半导体元件11的部分。
接着,如图9B所示,通过粘合剂32连接(固定)管芯焊盘21和半导体元件11。
接着,如图9C所示,粘合剂33从喷嘴210喷射到各凹入部分27、27和高位部分28。
接着,如图9D和9D1所示,设置无源元件15,以使元件部分17位于高位部分28上,各电极端子16、16分别位于凹入部分27、27上。然后,通过未固化的粘合剂33暂时粘合无源元件15和管芯焊盘21。此时,沿图中箭头所示方向在无源元件15上施加预定压力,从而使无源元件15稳定。此处,根据粘合剂33的粘度适当调整施加于无源元件15上的压力。所述压力为例如约0.5-4N。
接着,如图10E所示,通过以预定温度加热,固化粘合剂33,从而通过粘合剂33将无源元件15固定至管芯焊盘21上。
接着,如图10F所示,利用导线18连接半导体元件11与各电极端子16。
接着,如图10G所示,利用密封剂30密封整个器件。
接着,执行外引线(未示出)的成形工艺。
从而完成半导体器件10的制造。
根据半导体器件10的制造方法,各凹入部分27、27设置在与无源元件15的电极端子16、16相对应的部分上,并且由高位部分28支撑元件部分17,从而其与管芯焊盘21近似平行,因此能够相对于管芯焊盘21不倾斜地设置无源元件15。因而,能够容易且稳妥地进行无源元件15的导线接合。此外,由于在电极端子16、16和管芯焊盘21之间形成预定空间,在将无源元件15安装于管芯焊盘21上涂覆的未固化粘合剂33上时,即使施加于无源元件15上的载荷过量增加,也能够避免电极端子16与管芯焊盘21接触。因此,利用简单工艺就能够避免电极端子16与管芯焊盘21之间的短路。
在上述半导体器件10的制造方法中,在粘合管芯焊盘21和半导体元件11之后涂覆粘合剂33;但是,也可以在管芯焊盘21上涂覆粘合剂33之后粘合管芯焊盘21和半导体元件11。此外,粘合剂32采用膏状粘合剂;但是,本发明并不限于此,也可以采用膜状粘合剂。例如,可以在半导体元件11的下表面上预先贴附上膜状粘合剂32。
接下来,说明第二实施例的半导体器件。
图11为示出根据第二实施例的半导体器件的剖视图。
在后面的附图中,为了便于观察,省略密封剂30的图示。
根据第二实施例的半导体器件的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
半导体器件10a的引线框20a(管芯焊盘21a)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
在管芯焊盘21a中,仅在与图11左侧的电极端子16(任何一个电极端子16)相对应的部分设置凹入部分27。
此外,与管芯焊盘21a的右侧(另一)电极端子16相对应的部分连接至地电位。因此,由于凹入部分27将管芯焊盘21a和左侧电极端子16隔开,在右侧电极端子16连接至地电位的情况下,即使右侧电极端子16与管芯焊盘21a接触,也能够避免右侧电极端子16与左侧电极端子16之间的短路。因此,能够避免无源元件15的工作性能受损。
根据第二实施例的半导体器件10a,能够获得与第一实施例的半导体器件10相同的效果。
接下来,说明第三实施例的半导体器件。
图12示出根据第三实施例的半导体器件的引线框,其中图12A为示出该半导体器件的引线框的俯视图,图12B为沿图12A所示引线框的A-A线的剖视图,图12C为沿图12A所示引线框的B-B线的剖视图。
根据第三实施例的半导体器件的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
半导体器件10b的引线框20b(管芯焊盘21b)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
在管芯焊盘21b中,在与元件部分17相对应的部分设置高于管芯焊盘21b的其它部分的高位部分28a。高位部分28a可以通过例如蚀刻形成。
图13为示出根据第三实施例的半导体器件的剖视图。
如图13所示,元件部分17由高位部分28a通过粘合剂33支撑,从而在各电极端子16、16与管芯焊盘21b中的分别对应于电极端子16、16的各部分27a、27a之间形成预定空间。
根据第三实施例的半导体器件10b,能够获得与第一实施例的半导体器件10相同的效果。
接下来,说明第四实施例的半导体器件。
图14示出根据第四实施例的半导体器件的引线框,其中图14A为示出该半导体器件的引线框的俯视图,图14B为沿图14A所示引线框的A-A线的剖视图,图14C为沿图14A所示引线框的B-B线的剖视图。
根据第四实施例的半导体器件的以下说明重点放在与上述第三实施例的差异上,而省略与第三实施例相同内容的解释。
半导体器件10c的引线框20c(管芯焊盘21c)的构造不同于根据第三实施例的引线框20b(管芯焊盘21b)的构造。
在管芯焊盘21c中,在与元件部分17相对应的部分设置高于管芯焊盘21c的其它部分的多个(本实施例中为两个)高位部分28b(凸出部分)。
图15为示出根据第四实施例的半导体器件的剖视图。
高位部分28b可以通过例如从图15的下侧冲压管芯焊盘21c形成。
如图15所示,元件部分17由各高位部分28b、28b通过粘合剂33支撑,从而在各电极端子16、16与管芯焊盘21c中的分别对应于电极端子16、16的各部分27b、27b之间形成预定空间。
根据第四实施例的半导体器件10c,能够获得与第三实施例的半导体器件10b相同的效果。此外,根据第四实施例的半导体器件10c,无源元件15能够由各高位部分28b、28b更稳定地支撑,并且还能够在制造工艺过程中容易且稳妥地进行无源元件15的导线接合。
接下来,说明第五实施例的半导体器件。
图16示出根据第五实施例的半导体器件的引线框,其中图16A为示出该半导体器件的引线框的俯视图,图16B为沿图16A所示引线框的A-A线的剖视图,图16C为沿图16A所示引线框的B-B线的剖视图,图16D为沿图16A所示引线框的C-C线的剖视图。
根据第五实施例的半导体器件的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
半导体器件10d的引线框20d(管芯焊盘21d)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
在管芯焊盘21d中,在与各电极端子16、16相对应的部分设置各凹入部分27c、27c。此外,在与元件部分17相对应的部分设置高位部分28c,高位部分28c高于凹入部分27c且低于管芯焊盘21d的其它部分(小于凹入部分27c的深度)。高位部分28c在图16A所示水平方向上的两端分别形成导向部分29、29。
高位部分28c可以通过例如冲压形成。
图17为示出根据第五实施例的半导体器件的剖视图,图18为示出根据第五实施例的半导体器件的无源元件构造的俯视图。
如图17所示,元件部分17由高位部分28c通过粘合剂33支撑,从而在各电极端子16、16与各凹入部分27c、27c之间形成预定空间。此外,如图18所示,元件部分17夹在导向部分29、29之间,从而限制无源元件15在水平方向移动。
根据第五实施例的半导体器件10d,能够获得与第一实施例的半导体器件10相同的效果。此外,根据第五实施例的半导体器件10d,能够容易地进行无源元件15的定位,从而能够提高制造工艺过程中的生产率和产量。
接下来,说明第六实施例的半导体器件。
图19示出根据第六实施例的半导体器件的引线框,其中图19A示出该半导体器件的引线框的俯视图,图19B为沿图19A所示引线框的A-A线的剖视图,图19C为沿图19A所示引线框的B-B线的剖视图,图19D为沿图19A所示引线框的C-C线的剖视图。
根据第六实施例的半导体器件10e的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
半导体器件10e的引线框20e(管芯焊盘21e)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
在管芯焊盘21e中,在高位部分28附近形成用于从图19所示的水平方向将元件部分17夹在中间的两个导向部分29a、29a。
图20为示出根据第六实施例的半导体器件10e的无源元件构造的俯视图。
如图20所示,元件部分17由各高位部分28通过粘合剂33支撑,并位于导向部分29a、29a之间。此外,元件部分17夹在导向部分29a、29a之间,从而限制无源元件15在图20所示水平方向上的移动。
根据第六实施例的半导体器件10e,能够获得与第一实施例的半导体器件10相同的效果。此外,根据第六实施例的半导体器件10e,能够容易地进行无源元件15的定位,从而能够提高制造工艺过程中的生产率和产量。
为使半导体器件稳定工作并提高器件的电特性,通过导电粘合剂将半导体元件安装和固定于管芯焊盘上而构成半导体器件,在这种半导体器件中,广泛采用由含有作为粘合剂的银颗粒的环氧树脂构成的导电粘合剂,原因是这种导电粘合剂在制造工艺过程中便于加工且容易测量其粘合力。
但是,上述导电粘合剂包括用于保证导电性的多个导电颗粒。因此,在许多情况下,与不含导电颗粒的绝缘粘合剂相比,导电粘合剂的粘合力通常较低。因而,在利用导电粘合剂将半导体芯片连接并安装到管芯焊盘上而构成的半导体器件中,当在半导体器件上施加热应力时或当将半导体器件置于高湿环境下时,可能会在导电粘合剂与半导体芯片之间的界面中或者在导电粘合剂与管芯焊盘之间的界面中产生剥离。具体地,由于响应保护环境的要求,近来在通过回流焊接而将半导体器件安装于系统板上时,使用无铅(Pb)焊料,例如锡(Sn)银(Ag)焊料或锡银铜(Cu)焊料。因此,与使用含铅的传统焊料(例如锡铅焊料)安装半导体器件的情况相比,半导体器件的安装温度进一步增加。因此,需要一种耐高温的高可靠性半导体器件。
接下来说明的根据第七实施例的半导体器件就是基于上述问题的一种半导体器件。
图21为示出根据第七实施例的半导体器件的内部构造的俯视图。图22示出图21所示半导体器件的引线框,其中图22A为示出该半导体器件的引线框的俯视图,图22B为沿图22A所示引线框的A-A线的剖视图,图22C为沿图22A所示引线框的B-B线的剖视图。
根据第七实施例的半导体器件10f的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
图21所示的半导体器件10f的引线框20f(管芯焊盘21f)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
如图21和图22所示,在除了引线框20f的凹入部分27之外的管芯焊盘21f的几乎整个表面上,以矩阵形状形成多个凹入部分(台阶部分)211,每个凹入部分211具有预定深度(与本实施例的凹入部分27的深度几乎相同的深度)。在管芯焊盘21f的下表面(与具有凹入部分27的表面相对的表面)上也形成凹入部分211。凹入部分211可以通过例如蚀刻形成。
如图22B和22C所示,当规则地设置上述凹入部分211时,在管芯焊盘21f的表面上交替形成凹入部分和凸出部分。此外,通过粘合剂32将半导体元件11设置于上述凹入部分和凸出部分上。
根据第七实施例的半导体器件10f,能够获得与第一实施例的半导体器件10相同的效果。此外,根据第七实施例的半导体器件10f,由于粘固效应而提高了半导体元件11与粘合剂32之间的粘合强度,从而能够更牢固地固定半导体元件11和管芯焊盘21f。此外,由于在管芯焊盘21f的下表面上也形成凹入部分211,所以也能够提高密封剂30与管芯焊盘21f之间的粘合强度。
接下来,说明第八实施例的半导体器件。
图23为示出根据第八实施例的半导体器件的内部构造的俯视图。
根据第八实施例的半导体器件10g的以下说明重点放在与上述第一实施例的差异上,而省略与第一实施例相同内容的解释。
半导体器件10g的引线框20g(管芯焊盘21g)的构造不同于根据第一实施例的引线框20(管芯焊盘21)的构造。
在管芯焊盘21g中分别与各电极端子16、16对应的部分设置开口26、26。
图24为沿图23所示半导体器件的A-A线的剖视图,图25为沿图23所示半导体器件的B-B线的剖视图。
将树脂膜35粘合到管芯焊盘21g的下表面上以覆盖各开口26、26。此外,通过涂覆于膜35上的粘合剂33,将根据本实施例的无源元件15固定在管芯焊盘21g上,从而使元件部分17位于高位部分28上。
膜35的构成材料没有特殊限制。其优选实例包括树脂,例如聚酰亚胺。在制造半导体器件10g时,可以在将膜35固定至管芯焊盘21g上之后涂覆粘合剂33。或者,可以在将膜35临时粘合到管芯焊盘21g上之后涂覆粘合剂33,以在随后最终粘合粘合剂33和无源元件15的步骤中固定膜35和管芯焊盘21g。此外,可以在使用密封剂30密封整个器件的前一步骤固定膜35和管芯焊盘21g。
根据第八实施例的半导体器件10g,能够获得与第一实施例的半导体器件10相同的效果。此外,根据第八实施例的半导体器件10g,具有当粘合剂33和膜35均由树脂构成时不容易发生界面剥离的优点。
接下来,说明第九实施例的半导体器件。
图26为示出根据第九实施例的半导体器件的内部构造的俯视图。图27示出图26所示半导体器件的引线框,其中图27A示出该半导体器件的引线框的俯视图,图27B为沿图27A所示引线框的A-A线的剖视图,图27C为沿图27A所示引线框的B-B线的剖视图。
根据第九实施例的半导体器件10h的以下说明重点放在与上述第二实施例的差异上,而省略与第二实施例相同内容的解释。
半导体器件10h的引线框20h(管芯焊盘21h)的构造不同于根据第二实施例的引线框20a(管芯焊盘21a)的构造。
如图26和27所示,在管芯焊盘21h中的与下侧电极端子16(无源元件15的一个电极端子16)相对应的部分上设置槽口(notched)部分25,槽口部分25的形状通过为第一实施例的管芯焊盘21开槽而形成。此外,在俯视图中,下侧电极端子16从管芯焊盘21h突出到槽口部分25中。
根据第九实施例的半导体器件10h,能够获得与第二实施例的半导体器件10a相同的效果。
以上参照附图所示实施例说明了本发明的半导体器件及其制造方法;但是,本发明并不限于此。各部分的要素可由具有相同功能的任意要素置换。此外,其它任意要素或步骤可以添加至本发明中。
此外,在本发明中,可以组合选自上述各实施例的两个或更多任意要素(特征)。
在上述各实施例中说明了SOP型的LSI封装;但是本发明并不限于此。本发明还可以采用J型引脚小外形封装(SOJ)型或四方扁平封装(QFP)型的LSI封装。此外,本发明不仅适用于引线框型半导体器件,而且适用于其中用于安装(装配)半导体芯片和无源元件的管芯焊盘部分由导体构成的全部半导体器件。
此外,在上述各实施例中,半导体元件11通过导线18连接至无源元件15;但是本发明并不限于此。另一半导体封装或发光元件可以通过导线连接至无源元件。
此外,本发明适用于具有导电管芯焊盘的各种半导体器件。
根据本发明,无源元件被支撑为与基础衬底近似平行,并且能够避免电极端子与基础衬底接触。因此,能够避免电极端子与基础衬底之间的接触,并且能够确保进行无源元件的导线接合。
前述说明应仅视为本发明原理的示例。此外,由于本领域的技术人员能够容易地想到许多修改和变化,所以不期望将本发明局限于所示和所述的确切构造和应用,因而所有的适当修改及等效物均仍视为落入所附权利要求书及其等效物的范围内。

Claims (15)

1.一种半导体器件,其由电绝缘密封件密封,该半导体器件包括:
无源元件,其具有绝缘柱状体部分和设置于该柱状体部分的两轴端的一对电极端子;
半导体元件,其通过接合线连接到至少一个所述电极端子;以及
基础衬底,其形成有不与所述电极端子相接触的部分,
其中所述无源元件和半导体元件均通过粘合层安装,且该柱状体部分被支撑为与衬底表面近似平行。
2.根据权利要求1所述的半导体器件,其中在该基础衬底中与所述电极端子相对应的部分上形成凹入部分。
3.根据权利要求2所述的半导体器件,其中在与每个所述电极端子相对应的部分上形成多个所述凹入部分。
4.根据权利要求2所述的半导体器件,其中在任何一个所述电极端子上形成所述凹入部分。
5.根据权利要求1所述的半导体器件,其中在该基础衬底中与该柱状体部分相对应的部分上形成凸出部分。
6.根据权利要求5所述的半导体器件,其中沿该柱状体部分的纵向形成多个所述凸出部分。
7.根据权利要求1所述的半导体器件,其中在该基础衬底中与所述无源元件相对应的部分上形成凹入部分,并在所述凹入部分内与该柱状体部分相对应的部分上形成凸出部分,所述凸出部分的高度小于所述凹入部分的深度。
8.根据权利要求2所述的半导体器件,其中设置一导向部分,用于限制在近似垂直于该无源元件的纵向方向上的移动。
9.根据权利要求1所述的半导体器件,其中在该基础衬底的几乎整个表面上形成多个凹入部分和多个凸出部分。
10.根据权利要求9所述的半导体器件,其中所述多个凹入部分和多个凸出部分规则设置。
11.根据权利要求9所述的半导体器件,其中所述多个凹入部分和多个凸出部分还形成于该基础衬底中与用于安装该半导体元件的表面相对的表面侧上。
12.根据权利要求1所述的半导体器件,其中在该基础衬底中与所述电极端子相对应的部分上形成开口。
13.根据权利要求12所述的半导体器件,其中在该基础衬底中与用于安装该半导体元件的表面相对的表面侧涂覆树脂部件,所形成的该树脂部件覆盖该开口。
14.根据权利要求1所述的半导体器件,其中在俯视图中该无源元件的一个所述电极端子从该基础衬底突出。
15.一种半导体器件的制造方法,该半导体器件通过利用导线接合连接半导体元件与无源元件而构成,该无源元件具有柱状体部分和设置于该柱状体部分的两轴端的一对电极端子,该方法包括如下步骤:
在基材上形成凹入部分,获得基础衬底;
将粘合材料提供至该凹入部分;
将该无源元件设置为使该柱状体部分通过该粘合材料定位在该基础衬底上,且每个所述电极端子通过该粘合材料定位在与该凹入部分相对应的部分上;
在该无源元件上施加预定压力,暂时粘合该无源元件和该基础衬底;以及
固化该粘合材料,最终粘合该无源元件和该基础衬底。
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