CN100501968C - 增强的浅沟槽隔离结构及其制作方法 - Google Patents

增强的浅沟槽隔离结构及其制作方法 Download PDF

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Publication number
CN100501968C
CN100501968C CNB2006101542012A CN200610154201A CN100501968C CN 100501968 C CN100501968 C CN 100501968C CN B2006101542012 A CNB2006101542012 A CN B2006101542012A CN 200610154201 A CN200610154201 A CN 200610154201A CN 100501968 C CN100501968 C CN 100501968C
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China
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semiconductor layer
deposit
isolation structure
window
cavity
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Expired - Fee Related
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CNB2006101542012A
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English (en)
Chinese (zh)
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CN1992194A (zh
Inventor
阿鲁纳·纳恩达
纳斯·罗西
拉恩伯·赛恩
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Avago Technologies International Sales Pte Ltd
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Agere Systems LLC
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
CNB2006101542012A 2005-12-29 2006-09-13 增强的浅沟槽隔离结构及其制作方法 Expired - Fee Related CN100501968C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/321,206 2005-12-29
US11/321,206 US7514336B2 (en) 2005-12-29 2005-12-29 Robust shallow trench isolation structures and a method for forming shallow trench isolation structures

Publications (2)

Publication Number Publication Date
CN1992194A CN1992194A (zh) 2007-07-04
CN100501968C true CN100501968C (zh) 2009-06-17

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CNB2006101542012A Expired - Fee Related CN100501968C (zh) 2005-12-29 2006-09-13 增强的浅沟槽隔离结构及其制作方法

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Country Link
US (2) US7514336B2 (enExample)
EP (1) EP1806780A3 (enExample)
JP (1) JP5579358B2 (enExample)
KR (1) KR101292025B1 (enExample)
CN (1) CN100501968C (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7514336B2 (en) * 2005-12-29 2009-04-07 Agere Systems Inc. Robust shallow trench isolation structures and a method for forming shallow trench isolation structures
US20110244683A1 (en) * 2010-04-01 2011-10-06 Michiaki Sano Fabricating Voids Using Slurry Protect Coat Before Chemical-Mechanical Polishing
CN103531519B (zh) * 2012-07-02 2016-03-23 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US9768055B2 (en) * 2012-08-21 2017-09-19 Stmicroelectronics, Inc. Isolation regions for SOI devices
US10468529B2 (en) 2017-07-11 2019-11-05 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device structure with etch stop layer
KR102661930B1 (ko) 2018-08-13 2024-04-29 삼성전자주식회사 집적회로 소자
CN109273532B (zh) * 2018-09-12 2022-03-11 上海华力微电子有限公司 应用于高压电路防静电保护的无回滞效应硅控整流器
CN116053211A (zh) * 2022-12-30 2023-05-02 联合微电子中心有限责任公司 一种防止源漏区漏电的结构及其制备方法

Citations (3)

* Cited by examiner, † Cited by third party
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CN1239821A (zh) * 1998-06-24 1999-12-29 三星电子株式会社 形成没有凹陷的沟槽隔离的方法
US6187651B1 (en) * 1998-05-07 2001-02-13 Samsung Electronics Co., Ltd. Methods of forming trench isolation regions using preferred stress relieving layers and techniques to inhibit the occurrence of voids
US6319794B1 (en) * 1998-10-14 2001-11-20 International Business Machines Corporation Structure and method for producing low leakage isolation devices

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JPH08330410A (ja) * 1995-05-31 1996-12-13 Sony Corp 素子分離方法、素子分離構造、及び半導体装置
TW388100B (en) * 1997-02-18 2000-04-21 Hitachi Ulsi Eng Corp Semiconductor deivce and process for producing the same
US6228741B1 (en) * 1998-01-13 2001-05-08 Texas Instruments Incorporated Method for trench isolation of semiconductor devices
WO1999044223A2 (en) * 1998-02-27 1999-09-02 Lsi Logic Corporation Process of shallow trench isolating active devices to avoid sub-threshold kinks arising from corner effects without additional processing
TW398053B (en) * 1998-07-31 2000-07-11 United Microelectronics Corp Manufacturing of shallow trench isolation
JP2000223704A (ja) * 1999-01-29 2000-08-11 Sony Corp 半導体装置およびその製造方法
US6255194B1 (en) * 1999-06-03 2001-07-03 Samsung Electronics Co., Ltd. Trench isolation method
US6500729B1 (en) * 2000-06-02 2002-12-31 Agere Systems Guardian Corp. Method for reducing dishing related issues during the formation of shallow trench isolation structures
US6921947B2 (en) * 2000-12-15 2005-07-26 Renesas Technology Corp. Semiconductor device having recessed isolation insulation film
KR100568100B1 (ko) * 2001-03-05 2006-04-05 삼성전자주식회사 트렌치형 소자 분리막 형성 방법
JP2003151956A (ja) * 2001-11-19 2003-05-23 Sony Corp 半導体装置製造工程における窒化シリコン膜のエッチング方法
TW540135B (en) * 2002-04-24 2003-07-01 Nanya Technology Corp Method of forming shallow trench isolation region
KR20040002147A (ko) * 2002-06-29 2004-01-07 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
JP2004311487A (ja) * 2003-04-02 2004-11-04 Hitachi Ltd 半導体装置の製造方法
KR100505419B1 (ko) * 2003-04-23 2005-08-04 주식회사 하이닉스반도체 반도체 소자의 소자분리막 제조방법
JP2004363486A (ja) * 2003-06-06 2004-12-24 Renesas Technology Corp トレンチ分離を有する半導体装置およびその製造方法
JP2005166700A (ja) * 2003-11-28 2005-06-23 Toshiba Corp 半導体装置及びその製造方法
KR100538811B1 (ko) * 2003-12-29 2005-12-23 주식회사 하이닉스반도체 반도체 소자의 제조방법
US7514336B2 (en) 2005-12-29 2009-04-07 Agere Systems Inc. Robust shallow trench isolation structures and a method for forming shallow trench isolation structures

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6187651B1 (en) * 1998-05-07 2001-02-13 Samsung Electronics Co., Ltd. Methods of forming trench isolation regions using preferred stress relieving layers and techniques to inhibit the occurrence of voids
CN1239821A (zh) * 1998-06-24 1999-12-29 三星电子株式会社 形成没有凹陷的沟槽隔离的方法
US6319794B1 (en) * 1998-10-14 2001-11-20 International Business Machines Corporation Structure and method for producing low leakage isolation devices

Also Published As

Publication number Publication date
JP5579358B2 (ja) 2014-08-27
EP1806780A2 (en) 2007-07-11
EP1806780A3 (en) 2011-06-01
KR20070072408A (ko) 2007-07-04
US7514336B2 (en) 2009-04-07
US20070152294A1 (en) 2007-07-05
CN1992194A (zh) 2007-07-04
JP2007184588A (ja) 2007-07-19
US8022481B2 (en) 2011-09-20
US20090127651A1 (en) 2009-05-21
KR101292025B1 (ko) 2013-08-01

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