CN100487880C - 用于形成双金属栅极结构的处理过程 - Google Patents

用于形成双金属栅极结构的处理过程 Download PDF

Info

Publication number
CN100487880C
CN100487880C CNB2004800094963A CN200480009496A CN100487880C CN 100487880 C CN100487880 C CN 100487880C CN B2004800094963 A CNB2004800094963 A CN B2004800094963A CN 200480009496 A CN200480009496 A CN 200480009496A CN 100487880 C CN100487880 C CN 100487880C
Authority
CN
China
Prior art keywords
metal
region
forming
layer
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2004800094963A
Other languages
English (en)
Chinese (zh)
Other versions
CN1771590A (zh
Inventor
奥卢邦米·O·阿德图图
埃里克·D·卢科斯基
斯里坎斯·B·萨马韦当
小阿图罗·M·马丁内斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN1771590A publication Critical patent/CN1771590A/zh
Application granted granted Critical
Publication of CN100487880C publication Critical patent/CN100487880C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/014Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0147Manufacturing their gate sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
CNB2004800094963A 2003-04-09 2004-04-08 用于形成双金属栅极结构的处理过程 Expired - Fee Related CN100487880C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/410,043 US6790719B1 (en) 2003-04-09 2003-04-09 Process for forming dual metal gate structures
US10/410,043 2003-04-09

Publications (2)

Publication Number Publication Date
CN1771590A CN1771590A (zh) 2006-05-10
CN100487880C true CN100487880C (zh) 2009-05-13

Family

ID=32927360

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004800094963A Expired - Fee Related CN100487880C (zh) 2003-04-09 2004-04-08 用于形成双金属栅极结构的处理过程

Country Status (6)

Country Link
US (1) US6790719B1 (enExample)
JP (1) JP4653735B2 (enExample)
KR (1) KR101159339B1 (enExample)
CN (1) CN100487880C (enExample)
TW (1) TWI342044B (enExample)
WO (1) WO2004093182A1 (enExample)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3790237B2 (ja) * 2003-08-26 2006-06-28 株式会社東芝 半導体装置の製造方法
US7125775B1 (en) * 2004-03-18 2006-10-24 Integrated Device Technology, Inc. Method for forming hybrid device gates
US7030001B2 (en) * 2004-04-19 2006-04-18 Freescale Semiconductor, Inc. Method for forming a gate electrode having a metal
DE102004026232B4 (de) * 2004-05-28 2006-05-04 Infineon Technologies Ag Verfahren zum Ausbilden einer integrierten Halbleiterschaltungsanordnung
KR100602122B1 (ko) * 2004-12-03 2006-07-19 동부일렉트로닉스 주식회사 반도체 소자의 제조방법
US7109079B2 (en) * 2005-01-26 2006-09-19 Freescale Semiconductor, Inc. Metal gate transistor CMOS process and method for making
JP4764030B2 (ja) 2005-03-03 2011-08-31 株式会社東芝 半導体装置及びその製造方法
JP4626411B2 (ja) * 2005-06-13 2011-02-09 ソニー株式会社 半導体装置および半導体装置の製造方法
US20070048920A1 (en) * 2005-08-25 2007-03-01 Sematech Methods for dual metal gate CMOS integration
US7332433B2 (en) * 2005-09-22 2008-02-19 Sematech Inc. Methods of modulating the work functions of film layers
JP4723975B2 (ja) * 2005-10-25 2011-07-13 株式会社東芝 半導体装置およびその製造方法
JP2007123548A (ja) * 2005-10-28 2007-05-17 Renesas Technology Corp 半導体装置の製造方法
US20070178634A1 (en) * 2006-01-31 2007-08-02 Hyung Suk Jung Cmos semiconductor devices having dual work function metal gate stacks
KR100827435B1 (ko) * 2006-01-31 2008-05-06 삼성전자주식회사 반도체 소자에서 무산소 애싱 공정을 적용한 게이트 형성방법
JP4929867B2 (ja) * 2006-06-19 2012-05-09 富士通セミコンダクター株式会社 半導体装置の製造方法
KR100835430B1 (ko) * 2007-05-21 2008-06-04 주식회사 동부하이텍 반도체 소자의 듀얼 게이트 전극 형성 방법
US7696036B2 (en) * 2007-06-14 2010-04-13 International Business Machines Corporation CMOS transistors with differential oxygen content high-k dielectrics
US7666730B2 (en) * 2007-06-29 2010-02-23 Freescale Semiconductor, Inc. Method for forming a dual metal gate structure
KR100903383B1 (ko) * 2007-07-31 2009-06-23 주식회사 하이닉스반도체 일함수가 조절된 게이트전극을 구비한 트랜지스터 및 그를구비하는 메모리소자
JP2009044051A (ja) * 2007-08-10 2009-02-26 Panasonic Corp 半導体装置及びその製造方法
US20090206416A1 (en) * 2008-02-19 2009-08-20 International Business Machines Corporation Dual metal gate structures and methods
US7691701B1 (en) * 2009-01-05 2010-04-06 International Business Machines Corporation Method of forming gate stack and structure thereof
DE102009039418B4 (de) * 2009-08-31 2013-08-22 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Einstellung der Austrittsarbeit in Gate-Stapeln mit großem ε, die Gatedielektrika mit unterschiedlicher Dicke enthalten
US8435878B2 (en) 2010-04-06 2013-05-07 International Business Machines Corporation Field effect transistor device and fabrication
US8211775B1 (en) 2011-03-09 2012-07-03 United Microelectronics Corp. Method of making transistor having metal gate
US8519487B2 (en) 2011-03-21 2013-08-27 United Microelectronics Corp. Semiconductor device
US9384962B2 (en) 2011-04-07 2016-07-05 United Microelectronics Corp. Oxygen treatment of replacement work-function metals in CMOS transistor gates
US8530980B2 (en) 2011-04-27 2013-09-10 United Microelectronics Corp. Gate stack structure with etch stop layer and manufacturing process thereof
US9490342B2 (en) 2011-06-16 2016-11-08 United Microelectronics Corp. Method for fabricating semiconductor device
US8673758B2 (en) 2011-06-16 2014-03-18 United Microelectronics Corp. Structure of metal gate and fabrication method thereof
US8536038B2 (en) 2011-06-21 2013-09-17 United Microelectronics Corp. Manufacturing method for metal gate using ion implantation
US8486790B2 (en) 2011-07-18 2013-07-16 United Microelectronics Corp. Manufacturing method for metal gate
US8551876B2 (en) 2011-08-18 2013-10-08 United Microelectronics Corp. Manufacturing method for semiconductor device having metal gate
US8872286B2 (en) 2011-08-22 2014-10-28 United Microelectronics Corp. Metal gate structure and fabrication method thereof
US8691681B2 (en) 2012-01-04 2014-04-08 United Microelectronics Corp. Semiconductor device having a metal gate and fabricating method thereof
US8860181B2 (en) 2012-03-07 2014-10-14 United Microelectronics Corp. Thin film resistor structure
US9105623B2 (en) 2012-05-25 2015-08-11 United Microelectronics Corp. Semiconductor device having metal gate and manufacturing method thereof
US8975666B2 (en) 2012-08-22 2015-03-10 United Microelectronics Corp. MOS transistor and process thereof
US9054172B2 (en) 2012-12-05 2015-06-09 United Microelectrnics Corp. Semiconductor structure having contact plug and method of making the same
US8735269B1 (en) 2013-01-15 2014-05-27 United Microelectronics Corp. Method for forming semiconductor structure having TiN layer
US9653300B2 (en) 2013-04-16 2017-05-16 United Microelectronics Corp. Structure of metal gate structure and manufacturing method of the same
US9159798B2 (en) 2013-05-03 2015-10-13 United Microelectronics Corp. Replacement gate process and device manufactured using the same
US9196542B2 (en) 2013-05-22 2015-11-24 United Microelectronics Corp. Method for manufacturing semiconductor devices
US8921947B1 (en) 2013-06-10 2014-12-30 United Microelectronics Corp. Multi-metal gate semiconductor device having triple diameter metal opening
US20150069534A1 (en) 2013-09-11 2015-03-12 United Microelectronics Corp. Semiconductor device and method for fabricating the same
US9105720B2 (en) 2013-09-11 2015-08-11 United Microelectronics Corp. Semiconductor device having metal gate and manufacturing method thereof
US9196546B2 (en) 2013-09-13 2015-11-24 United Microelectronics Corp. Metal gate transistor
US9231071B2 (en) 2014-02-24 2016-01-05 United Microelectronics Corp. Semiconductor structure and manufacturing method of the same

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1227407A (zh) * 1998-02-27 1999-09-01 联诚积体电路股份有限公司 制作双电压金属氧化物半导体晶体管的方法
US6171910B1 (en) * 1999-07-21 2001-01-09 Motorola Inc. Method for forming a semiconductor device
US6171959B1 (en) * 1998-01-20 2001-01-09 Motorola, Inc. Method for making a semiconductor device
US6214681B1 (en) * 2000-01-26 2001-04-10 Advanced Micro Devices, Inc. Process for forming polysilicon/germanium thin films without germanium outgassing
US20020151125A1 (en) * 2001-04-11 2002-10-17 Samsung Electronics Co., Ltd. Method of forming a CMOS type semiconductor device having dual gates
US6492217B1 (en) * 1998-06-30 2002-12-10 Intel Corporation Complementary metal gates and a process for implementation

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6004869A (en) 1997-04-25 1999-12-21 Micron Technology, Inc. Method for making a low resistivity electrode having a near noble metal
JP2002083812A (ja) * 1999-06-29 2002-03-22 Semiconductor Energy Lab Co Ltd 配線材料およびこれを用いた配線を備えた半導体装置およびその作製方法
US6444512B1 (en) 2000-06-12 2002-09-03 Motorola, Inc. Dual metal gate transistors for CMOS process

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6171959B1 (en) * 1998-01-20 2001-01-09 Motorola, Inc. Method for making a semiconductor device
CN1227407A (zh) * 1998-02-27 1999-09-01 联诚积体电路股份有限公司 制作双电压金属氧化物半导体晶体管的方法
US6492217B1 (en) * 1998-06-30 2002-12-10 Intel Corporation Complementary metal gates and a process for implementation
US6171910B1 (en) * 1999-07-21 2001-01-09 Motorola Inc. Method for forming a semiconductor device
US6214681B1 (en) * 2000-01-26 2001-04-10 Advanced Micro Devices, Inc. Process for forming polysilicon/germanium thin films without germanium outgassing
US20020151125A1 (en) * 2001-04-11 2002-10-17 Samsung Electronics Co., Ltd. Method of forming a CMOS type semiconductor device having dual gates

Also Published As

Publication number Publication date
TW200507099A (en) 2005-02-16
KR20050120785A (ko) 2005-12-23
TWI342044B (en) 2011-05-11
US6790719B1 (en) 2004-09-14
JP2006523037A (ja) 2006-10-05
CN1771590A (zh) 2006-05-10
JP4653735B2 (ja) 2011-03-16
WO2004093182A1 (en) 2004-10-28
KR101159339B1 (ko) 2012-06-25

Similar Documents

Publication Publication Date Title
CN100487880C (zh) 用于形成双金属栅极结构的处理过程
US6902969B2 (en) Process for forming dual metal gate structures
JP4299791B2 (ja) Cmosデバイスのゲート構造を作製する方法
US6894353B2 (en) Capped dual metal gate transistors for CMOS process and method for making the same
US20080283879A1 (en) Transistor having gate dielectric layer of partial thickness difference and method of fabricating the same
US6844602B2 (en) Semiconductor device, and method for manufacturing the same
US6559013B1 (en) Method for fabricating mask ROM device
JP2010537425A (ja) 低コンタクト抵抗を示すmos構造およびその形成方法
JP2002289700A (ja) 半導体素子のデュアルゲート製造方法
US7091071B2 (en) Semiconductor fabrication process including recessed source/drain regions in an SOI wafer
US5989987A (en) Method of forming a self-aligned contact in semiconductor fabrications
US6524938B1 (en) Method for gate formation with improved spacer profile control
US7259105B2 (en) Methods of fabricating gate spacers for semiconductor devices
US7169676B1 (en) Semiconductor devices and methods for forming the same including contacting gate to source
US6828187B1 (en) Method for uniform reactive ion etching of dual pre-doped polysilicon regions
CN101621030A (zh) 具有多晶硅接触的自对准mos结构
CN100533692C (zh) 绝缘栅型场效应晶体管的制造方法
JPH11330262A (ja) 半導体装置の製造方法
US20050164460A1 (en) Salicide process for metal gate CMOS devices
JPS6342173A (ja) 絶縁ゲ−ト型半導体装置の製造方法
KR100424185B1 (ko) 트랜지스터 형성 방법
KR100806135B1 (ko) 금속 게이트전극을 갖는 반도체소자의 제조 방법
JP2001044443A (ja) 半導体製造方法および半導体装置
JP2000091564A (ja) 半導体装置の製造方法
JP2005311339A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP America Co Ltd

Address before: Texas in the United States

Patentee before: Fisical Semiconductor Inc.

CP01 Change in the name or title of a patent holder
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090513

Termination date: 20190408

CF01 Termination of patent right due to non-payment of annual fee