CN100481507C - 包括横向延伸的有源区的晶体管及其制造方法 - Google Patents
包括横向延伸的有源区的晶体管及其制造方法 Download PDFInfo
- Publication number
- CN100481507C CN100481507C CNB2006101074258A CN200610107425A CN100481507C CN 100481507 C CN100481507 C CN 100481507C CN B2006101074258 A CNB2006101074258 A CN B2006101074258A CN 200610107425 A CN200610107425 A CN 200610107425A CN 100481507 C CN100481507 C CN 100481507C
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- trench
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/025—Manufacture or treatment forming recessed gates, e.g. by using local oxidation
- H10D64/027—Manufacture or treatment forming recessed gates, e.g. by using local oxidation by etching at gate locations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050088333 | 2005-09-22 | ||
| KR1020050088333A KR100642650B1 (ko) | 2005-09-22 | 2005-09-22 | 측방확장 활성영역을 갖는 반도체소자 및 그 제조방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1941411A CN1941411A (zh) | 2007-04-04 |
| CN100481507C true CN100481507C (zh) | 2009-04-22 |
Family
ID=37653774
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006101074258A Active CN100481507C (zh) | 2005-09-22 | 2006-07-24 | 包括横向延伸的有源区的晶体管及其制造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7470588B2 (enExample) |
| JP (1) | JP5165212B2 (enExample) |
| KR (1) | KR100642650B1 (enExample) |
| CN (1) | CN100481507C (enExample) |
Families Citing this family (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006324488A (ja) * | 2005-05-19 | 2006-11-30 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| TWI278067B (en) * | 2006-01-09 | 2007-04-01 | Nanya Technology Corp | Method for fabricating a recessed-gate MOS transistor device |
| US8618601B2 (en) * | 2009-08-14 | 2013-12-31 | Alpha And Omega Semiconductor Incorporated | Shielded gate trench MOSFET with increased source-metal contact |
| US8236651B2 (en) * | 2009-08-14 | 2012-08-07 | Alpha And Omega Semiconductor Incorporated | Shielded gate trench MOSFET device and fabrication |
| US8193580B2 (en) | 2009-08-14 | 2012-06-05 | Alpha And Omega Semiconductor, Inc. | Shielded gate trench MOSFET device and fabrication |
| TWI309067B (en) * | 2006-03-15 | 2009-04-21 | Nanya Technology Corp | Method for fabricating a recessed-gate mos transistor device |
| JP2007250855A (ja) * | 2006-03-16 | 2007-09-27 | Elpida Memory Inc | 半導体装置及びその製造方法 |
| KR100702302B1 (ko) * | 2006-03-24 | 2007-03-30 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
| US8860174B2 (en) * | 2006-05-11 | 2014-10-14 | Micron Technology, Inc. | Recessed antifuse structures and methods of making the same |
| US20070262395A1 (en) | 2006-05-11 | 2007-11-15 | Gibbons Jasper S | Memory cell access devices and methods of making the same |
| US8008144B2 (en) | 2006-05-11 | 2011-08-30 | Micron Technology, Inc. | Dual work function recessed access device and methods of forming |
| JP4560820B2 (ja) * | 2006-06-20 | 2010-10-13 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
| KR100724575B1 (ko) * | 2006-06-28 | 2007-06-04 | 삼성전자주식회사 | 매립 게이트전극을 갖는 반도체소자 및 그 형성방법 |
| KR100780598B1 (ko) * | 2006-12-05 | 2007-11-30 | 주식회사 하이닉스반도체 | 벌브형 리세스 게이트를 갖는 반도체 소자의 제조 방법 |
| KR101026479B1 (ko) * | 2006-12-28 | 2011-04-01 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조 방법 |
| US7696568B2 (en) * | 2007-05-21 | 2010-04-13 | Micron Technology, Inc. | Semiconductor device having reduced sub-threshold leakage |
| US20080299740A1 (en) * | 2007-05-29 | 2008-12-04 | Macronix International Co., Ltd. | Method for forming sti structure |
| JP2008305942A (ja) * | 2007-06-07 | 2008-12-18 | Tokyo Electron Ltd | 半導体メモリ装置およびその製造方法 |
| US7816216B2 (en) | 2007-07-09 | 2010-10-19 | Micron Technology, Inc. | Semiconductor device comprising transistor structures and methods for forming same |
| TW200905752A (en) * | 2007-07-18 | 2009-02-01 | Nanya Technology Corp | Semeconductor device with long channel and manufacturing method thereof |
| KR100942961B1 (ko) * | 2007-10-24 | 2010-02-17 | 주식회사 하이닉스반도체 | 주상 구조의 폴리실리콘 게이트전극을 구비한 반도체소자의제조 방법 |
| JP2009224520A (ja) * | 2008-03-14 | 2009-10-01 | Elpida Memory Inc | 半導体装置及び半導体装置の製造方法 |
| KR101003496B1 (ko) * | 2008-09-29 | 2010-12-30 | 주식회사 하이닉스반도체 | 소자분리 구조 및 리세스 게이트를 포함하는 반도체 소자 및 제조 방법 |
| US8431457B2 (en) * | 2010-03-11 | 2013-04-30 | Alpha And Omega Semiconductor Incorporated | Method for fabricating a shielded gate trench MOS with improved source pickup layout |
| US8912595B2 (en) | 2011-05-12 | 2014-12-16 | Nanya Technology Corp. | Trench MOS structure and method for forming the same |
| US8829603B2 (en) | 2011-08-18 | 2014-09-09 | Alpha And Omega Semiconductor Incorporated | Shielded gate trench MOSFET package |
| KR101964262B1 (ko) * | 2011-11-25 | 2019-04-02 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
| KR102008317B1 (ko) * | 2012-03-07 | 2019-08-07 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자의 제조방법 |
| TWI470733B (zh) * | 2012-08-28 | 2015-01-21 | Anpec Electronics Corp | 溝渠絕緣製程 |
| CN107195546A (zh) * | 2017-07-12 | 2017-09-22 | 张凯 | 一种沟槽形成方法 |
| TWI685951B (zh) * | 2018-10-08 | 2020-02-21 | 力晶積成電子製造股份有限公司 | 非揮發性記憶體結構及其製造方法 |
| US11164874B2 (en) * | 2018-12-19 | 2021-11-02 | Xia Tai Xin Semiconductor (Qing Dao) Ltd. | Semiconductor device and method for fabricating the same |
| US11233058B2 (en) | 2018-12-19 | 2022-01-25 | Xia Tai Xin Semiconductor (Qing Dao) Ltd. | Semiconductor device and method for fabricating the same |
| CN111341726B (zh) * | 2018-12-19 | 2023-05-02 | 夏泰鑫半导体(青岛)有限公司 | 半导体器件及其制造方法 |
| WO2022026768A1 (en) * | 2020-07-29 | 2022-02-03 | Hsu Fu Chang | Transistor structures and associated processes |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5895253A (en) * | 1997-08-22 | 1999-04-20 | Micron Technology, Inc. | Trench isolation for CMOS devices |
| JP3196830B2 (ja) * | 1998-01-06 | 2001-08-06 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JP2000150634A (ja) * | 1998-11-13 | 2000-05-30 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| KR100282452B1 (ko) | 1999-03-18 | 2001-02-15 | 김영환 | 반도체 소자 및 그의 제조 방법 |
| KR100319642B1 (ko) | 2000-02-11 | 2002-01-05 | 박종섭 | 트랜지스터 형성방법 |
| JP4200626B2 (ja) * | 2000-02-28 | 2008-12-24 | 株式会社デンソー | 絶縁ゲート型パワー素子の製造方法 |
| JP2002353445A (ja) | 2001-05-30 | 2002-12-06 | Sony Corp | 溝ゲート型電界効果トランジスタの製造方法 |
| US20030085435A1 (en) | 2001-11-02 | 2003-05-08 | Zhongze Wang | Transistor structure and process to fabricate same |
| KR100558544B1 (ko) * | 2003-07-23 | 2006-03-10 | 삼성전자주식회사 | 리세스 게이트 트랜지스터 구조 및 그에 따른 형성방법 |
| US6844591B1 (en) | 2003-09-17 | 2005-01-18 | Micron Technology, Inc. | Method of forming DRAM access transistors |
| KR100518606B1 (ko) * | 2003-12-19 | 2005-10-04 | 삼성전자주식회사 | 실리콘 기판과 식각 선택비가 큰 마스크층을 이용한리세스 채널 어레이 트랜지스터의 제조 방법 |
| KR100618861B1 (ko) * | 2004-09-09 | 2006-08-31 | 삼성전자주식회사 | 로컬 리세스 채널 트랜지스터를 구비하는 반도체 소자 및그 제조 방법 |
| US20060113590A1 (en) * | 2004-11-26 | 2006-06-01 | Samsung Electronics Co., Ltd. | Method of forming a recess structure, recessed channel type transistor and method of manufacturing the recessed channel type transistor |
| KR20060077543A (ko) | 2004-12-30 | 2006-07-05 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스 게이트 형성 방법 |
| KR100632640B1 (ko) | 2005-03-10 | 2006-10-12 | 주식회사 하이닉스반도체 | 플래쉬 메모리 소자의 제조방법 |
| KR20060102878A (ko) | 2005-03-25 | 2006-09-28 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
| US7141486B1 (en) | 2005-06-15 | 2006-11-28 | Agere Systems Inc. | Shallow trench isolation structures comprising a graded doped sacrificial silicon dioxide material and a method for forming shallow trench isolation structures |
-
2005
- 2005-09-22 KR KR1020050088333A patent/KR100642650B1/ko not_active Expired - Fee Related
-
2006
- 2006-03-22 US US11/387,029 patent/US7470588B2/en active Active
- 2006-05-12 JP JP2006133328A patent/JP5165212B2/ja active Active
- 2006-07-24 CN CNB2006101074258A patent/CN100481507C/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN1941411A (zh) | 2007-04-04 |
| JP5165212B2 (ja) | 2013-03-21 |
| KR100642650B1 (ko) | 2006-11-10 |
| US7470588B2 (en) | 2008-12-30 |
| JP2007088418A (ja) | 2007-04-05 |
| US20070063270A1 (en) | 2007-03-22 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |