CN100452236C - 具有需要刷新操作的动态存储器单元的半导体存储器 - Google Patents
具有需要刷新操作的动态存储器单元的半导体存储器 Download PDFInfo
- Publication number
- CN100452236C CN100452236C CNB200510001828XA CN200510001828A CN100452236C CN 100452236 C CN100452236 C CN 100452236C CN B200510001828X A CNB200510001828X A CN B200510001828XA CN 200510001828 A CN200510001828 A CN 200510001828A CN 100452236 C CN100452236 C CN 100452236C
- Authority
- CN
- China
- Prior art keywords
- address
- circuit
- signal
- request
- redundancy determination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 230000015654 memory Effects 0.000 claims abstract description 128
- 230000004044 response Effects 0.000 claims description 37
- 230000002950 deficient Effects 0.000 claims description 26
- 238000006243 chemical reaction Methods 0.000 claims description 19
- 238000004321 preservation Methods 0.000 claims description 9
- 230000007257 malfunction Effects 0.000 abstract 1
- 230000004913 activation Effects 0.000 description 21
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 20
- 230000005540 biological transmission Effects 0.000 description 9
- 230000001360 synchronised effect Effects 0.000 description 9
- 238000003860 storage Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 3
- 239000007858 starting material Substances 0.000 description 3
- 230000003213 activating effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 108010032595 Antibody Binding Sites Proteins 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005755 formation reaction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/783—Masking faults in memories by using spares or by reconfiguring using programmable devices with refresh of replacement cells, e.g. in DRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004144905A JP4566621B2 (ja) | 2004-05-14 | 2004-05-14 | 半導体メモリ |
JP144905/2004 | 2004-05-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1697077A CN1697077A (zh) | 2005-11-16 |
CN100452236C true CN100452236C (zh) | 2009-01-14 |
Family
ID=34930927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200510001828XA Expired - Fee Related CN100452236C (zh) | 2004-05-14 | 2005-01-13 | 具有需要刷新操作的动态存储器单元的半导体存储器 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7099208B2 (zh) |
EP (1) | EP1596399B1 (zh) |
JP (1) | JP4566621B2 (zh) |
KR (1) | KR100571329B1 (zh) |
CN (1) | CN100452236C (zh) |
DE (1) | DE602004002280T2 (zh) |
TW (1) | TWI276109B (zh) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006185488A (ja) * | 2004-12-27 | 2006-07-13 | Elpida Memory Inc | 半導体記憶装置 |
US7562180B2 (en) * | 2006-03-28 | 2009-07-14 | Nokia Corporation | Method and device for reduced read latency of non-volatile memory |
JP2007299485A (ja) * | 2006-05-01 | 2007-11-15 | Toshiba Corp | 半導体メモリ |
KR100856069B1 (ko) * | 2007-03-29 | 2008-09-02 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그의 구동방법 |
KR100894099B1 (ko) * | 2007-06-27 | 2009-04-20 | 주식회사 하이닉스반도체 | 워드라인 블럭 선택 회로 |
JP5612244B2 (ja) * | 2007-10-30 | 2014-10-22 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置及びリフレッシュ方法 |
KR101455253B1 (ko) | 2007-11-15 | 2014-10-28 | 삼성전자주식회사 | 메모리 컨트롤러 |
WO2009116117A1 (ja) * | 2008-03-19 | 2009-09-24 | 富士通マイクロエレクトロニクス株式会社 | 半導体メモリ、システム、半導体メモリの動作方法および半導体メモリの製造方法 |
KR101009337B1 (ko) * | 2008-12-30 | 2011-01-19 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
US8392687B2 (en) | 2009-01-21 | 2013-03-05 | Micron Technology, Inc. | Solid state memory formatting |
US9236110B2 (en) * | 2012-06-30 | 2016-01-12 | Intel Corporation | Row hammer refresh command |
US9384821B2 (en) | 2012-11-30 | 2016-07-05 | Intel Corporation | Row hammer monitoring based on stored row hammer threshold value |
KR102124987B1 (ko) * | 2013-08-14 | 2020-06-22 | 에스케이하이닉스 주식회사 | 메모리 및 이를 포함하는 메모리 시스템 |
US10373667B2 (en) | 2013-08-28 | 2019-08-06 | Hewlett Packard Enterprise Development Lp | Refresh rate adjust |
US9583219B2 (en) * | 2014-09-27 | 2017-02-28 | Qualcomm Incorporated | Method and apparatus for in-system repair of memory in burst refresh |
KR20160044850A (ko) * | 2014-10-16 | 2016-04-26 | 에스케이하이닉스 주식회사 | 어드레스 디코딩 회로 및 그것을 포함하는 반도체 장치 |
KR20180085184A (ko) * | 2017-01-18 | 2018-07-26 | 에스케이하이닉스 주식회사 | 로우 해머링을 개선할 수 있는 메모리 모듈 및 이의 동작 방법 |
US10210923B2 (en) | 2017-07-12 | 2019-02-19 | International Business Machines Corporation | Activation of memory core circuits in an integrated circuit |
JP6970244B1 (ja) | 2020-06-23 | 2021-11-24 | 華邦電子股▲ふん▼有限公司Winbond Electronics Corp. | メモリコントローラ |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1112699A (zh) * | 1993-06-28 | 1995-11-29 | 卡西欧计算机公司 | 使用伪-sram的电子设备 |
US6118710A (en) * | 1998-06-08 | 2000-09-12 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device including disturb refresh test circuit |
US20030043672A1 (en) * | 2001-08-30 | 2003-03-06 | Hitachi, Ltd. | Semiconductor memory |
US20030202413A1 (en) * | 2002-04-26 | 2003-10-30 | Fujitsu Limited | Semiconductor memory device and control method thereof |
CN1471164A (zh) * | 2002-06-28 | 2004-01-28 | ��ʿͨ��ʽ���� | 半导体器件 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07105697A (ja) * | 1993-10-07 | 1995-04-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3226425B2 (ja) * | 1994-09-09 | 2001-11-05 | 富士通株式会社 | 半導体記憶装置 |
KR100273293B1 (ko) | 1998-05-13 | 2001-01-15 | 김영환 | 리던던트 워드라인의 리프레쉬 구조 |
JP3376998B2 (ja) * | 2000-03-08 | 2003-02-17 | 日本電気株式会社 | 半導体記憶装置 |
JP2002208274A (ja) * | 2000-11-10 | 2002-07-26 | Hitachi Ltd | 半導体記憶装置 |
JP4187084B2 (ja) | 2001-07-31 | 2008-11-26 | 株式会社ルネサステクノロジ | 半導体メモリ |
-
2004
- 2004-05-14 JP JP2004144905A patent/JP4566621B2/ja not_active Expired - Fee Related
- 2004-12-15 US US11/011,114 patent/US7099208B2/en not_active Expired - Fee Related
- 2004-12-16 EP EP04257847A patent/EP1596399B1/en not_active Expired - Fee Related
- 2004-12-16 DE DE602004002280T patent/DE602004002280T2/de active Active
- 2004-12-17 TW TW093139386A patent/TWI276109B/zh not_active IP Right Cessation
- 2004-12-28 KR KR1020040114026A patent/KR100571329B1/ko not_active IP Right Cessation
-
2005
- 2005-01-13 CN CNB200510001828XA patent/CN100452236C/zh not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1112699A (zh) * | 1993-06-28 | 1995-11-29 | 卡西欧计算机公司 | 使用伪-sram的电子设备 |
US6118710A (en) * | 1998-06-08 | 2000-09-12 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device including disturb refresh test circuit |
US20030043672A1 (en) * | 2001-08-30 | 2003-03-06 | Hitachi, Ltd. | Semiconductor memory |
US20030202413A1 (en) * | 2002-04-26 | 2003-10-30 | Fujitsu Limited | Semiconductor memory device and control method thereof |
CN1471164A (zh) * | 2002-06-28 | 2004-01-28 | ��ʿͨ��ʽ���� | 半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
DE602004002280D1 (de) | 2006-10-19 |
TWI276109B (en) | 2007-03-11 |
US20050254321A1 (en) | 2005-11-17 |
US7099208B2 (en) | 2006-08-29 |
KR20050109042A (ko) | 2005-11-17 |
EP1596399A1 (en) | 2005-11-16 |
JP2005327382A (ja) | 2005-11-24 |
TW200537514A (en) | 2005-11-16 |
CN1697077A (zh) | 2005-11-16 |
JP4566621B2 (ja) | 2010-10-20 |
KR100571329B1 (ko) | 2006-04-17 |
DE602004002280T2 (de) | 2006-12-28 |
EP1596399B1 (en) | 2006-09-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100452236C (zh) | 具有需要刷新操作的动态存储器单元的半导体存储器 | |
US11955158B2 (en) | Apparatuses and methods for access based refresh timing | |
US11380382B2 (en) | Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit | |
CN100578665C (zh) | 半导体存储器 | |
CN111354393A (zh) | 用于目标刷新操作的时序交错的设备和方法 | |
US8050121B2 (en) | Semiconductor memory, system, operating method of semiconductor memory, and manufacturing method of semiconductor memory | |
CN100456386C (zh) | 半导体存储器 | |
CN100550198C (zh) | 具有延迟自动预充电功能的半导体存储器件及其相关方法 | |
KR100618068B1 (ko) | 반도체 집적 회로 및 그 제어 방법 | |
CN101276640B (zh) | 半导体存储器、系统及半导体存储器的操作方法 | |
CN101154435B (zh) | 半导体存储器及系统 | |
US7447098B2 (en) | Semiconductor memory device having complete hidden refresh function | |
CN102655022A (zh) | 半导体存储器件的刷新控制电路和方法 | |
KR20030014629A (ko) | 반도체기억장치 | |
JP4597470B2 (ja) | 半導体メモリ | |
US6219292B1 (en) | Semiconductor memory device having reduced power requirements during refresh operation by performing refresh operation in a burst method | |
JPH06318393A (ja) | 集積回路用ビット選択回路 | |
US11409674B2 (en) | Memory with improved command/address bus utilization | |
CN100592420C (zh) | 半导体存储器 | |
CN111326188B (zh) | 用于半导体存储器中的刷新操作的设备和方法 | |
US6657920B2 (en) | Circuit for generating internal address in semiconductor memory device | |
US20060044912A1 (en) | Method and apparatus for refreshing memory device | |
KR20010102846A (ko) | 동기형 반도체 기억 장치 | |
JPH11339469A (ja) | 半導体記憶装置 | |
JP4137060B2 (ja) | 半導体メモリおよびダイナミックメモリセルの電荷蓄積方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20081212 Address after: Tokyo, Japan, Japan Patentee after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Patentee before: Fujitsu Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081212 |
|
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTORS CO., LTD Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
|
CP03 | Change of name, title or address |
Address after: Kanagawa Patentee after: Fujitsu Semiconductor Co., Ltd. Address before: Tokyo, Japan Patentee before: Fujitsu Microelectronics Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: SUOSI FUTURE CO., LTD. Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20150513 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150513 Address after: Kanagawa Patentee after: Co., Ltd. Suo Si future Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090114 Termination date: 20180113 |