CN100399560C - 集成电路结构及其形成方法 - Google Patents
集成电路结构及其形成方法 Download PDFInfo
- Publication number
- CN100399560C CN100399560C CNB2005100684327A CN200510068432A CN100399560C CN 100399560 C CN100399560 C CN 100399560C CN B2005100684327 A CNB2005100684327 A CN B2005100684327A CN 200510068432 A CN200510068432 A CN 200510068432A CN 100399560 C CN100399560 C CN 100399560C
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- Prior art keywords
- carrier
- compressible
- connector
- integrated circuit
- lead
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
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- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
- H01R43/02—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections
- H01R43/0256—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections for soldering or welding connectors to a printed circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0133—Elastomeric or compliant polymer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/711,076 US7332821B2 (en) | 2004-08-20 | 2004-08-20 | Compressible films surrounding solder connectors |
| US10/711,076 | 2004-08-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1738042A CN1738042A (zh) | 2006-02-22 |
| CN100399560C true CN100399560C (zh) | 2008-07-02 |
Family
ID=35910206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100684327A Expired - Fee Related CN100399560C (zh) | 2004-08-20 | 2005-04-29 | 集成电路结构及其形成方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7332821B2 (enExample) |
| JP (1) | JP4686300B2 (enExample) |
| CN (1) | CN100399560C (enExample) |
| TW (1) | TWI346518B (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006056999A2 (en) * | 2004-11-29 | 2006-06-01 | N-Trig Ltd. | Methods for manufacturing a sensor assembly |
| US20070063344A1 (en) * | 2005-09-22 | 2007-03-22 | Chun-Hung Lin | Chip package structure and bumping process |
| US20100224395A1 (en) * | 2006-03-28 | 2010-09-09 | Panasonic Corporation | Multilayer wiring board and its manufacturing method |
| US7727805B2 (en) * | 2007-06-11 | 2010-06-01 | Intel Corporation | Reducing stress in a flip chip assembly |
| US20090108442A1 (en) * | 2007-10-25 | 2009-04-30 | International Business Machines Corporation | Self-assembled stress relief interface |
| US8507325B2 (en) * | 2010-01-28 | 2013-08-13 | International Business Machines Corporation | Co-axial restraint for connectors within flip-chip packages |
| FR2957748B1 (fr) * | 2010-03-16 | 2012-09-07 | St Microelectronics Grenoble 2 | Composant electronique a montage en surface |
| US9082780B2 (en) * | 2012-03-23 | 2015-07-14 | Stats Chippac, Ltd. | Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer |
| US20140291834A1 (en) * | 2013-03-27 | 2014-10-02 | Micron Technology, Inc. | Semiconductor devices and packages including conductive underfill material and related methods |
| US9711474B2 (en) * | 2014-09-24 | 2017-07-18 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor package structure with polymeric layer and manufacturing method thereof |
| WO2016064350A1 (en) * | 2014-10-23 | 2016-04-28 | Agency For Science, Technology And Research | Method of bonding a first substrate and a second substrate |
| KR102458034B1 (ko) | 2015-10-16 | 2022-10-25 | 삼성전자주식회사 | 반도체 패키지, 반도체 패키지의 제조방법, 및 반도체 모듈 |
| US10597486B2 (en) | 2016-11-02 | 2020-03-24 | Seagate Technology Llc | Encapsulant composition for use with electrical components in hard disk drives, and related electrical components and hard disk drives |
| US10163847B2 (en) * | 2017-03-03 | 2018-12-25 | Tdk Corporation | Method for producing semiconductor package |
| CN108538726B (zh) * | 2017-03-03 | 2022-08-26 | Tdk株式会社 | 半导体芯片的制造方法 |
| US11304303B2 (en) * | 2020-04-30 | 2022-04-12 | Dujud Llc | Methods and processes for forming electrical circuitries on three-dimensional geometries |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003158223A (ja) * | 2001-11-20 | 2003-05-30 | Matsushita Electric Ind Co Ltd | 電子部品実装構造 |
| JP2003234362A (ja) * | 2002-02-12 | 2003-08-22 | Yokogawa Electric Corp | 半導体装置 |
| US20040094842A1 (en) * | 1999-05-10 | 2004-05-20 | Jimarez Miguel A. | Flip chip C4 extension structure and process |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5274913A (en) | 1991-10-25 | 1994-01-04 | International Business Machines Corporation | Method of fabricating a reworkable module |
| US5956605A (en) * | 1996-09-20 | 1999-09-21 | Micron Technology, Inc. | Use of nitrides for flip-chip encapsulation |
| JPH10178121A (ja) * | 1996-12-18 | 1998-06-30 | Toshiba Corp | 半導体パッケージ用金属ボール配設板、半導体装置及びその製造方法 |
| AU8502798A (en) * | 1997-07-21 | 1999-02-10 | Aguila Technologies, Inc. | Semiconductor flip-chip package and method for the fabrication thereof |
| JP3876953B2 (ja) * | 1998-03-27 | 2007-02-07 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
| US6100114A (en) | 1998-08-10 | 2000-08-08 | International Business Machines Corporation | Encapsulation of solder bumps and solder connections |
| US6281452B1 (en) | 1998-12-03 | 2001-08-28 | International Business Machines Corporation | Multi-level thin-film electronic packaging structure and related method |
| JP2001007502A (ja) * | 1999-06-23 | 2001-01-12 | Sony Corp | 電子部品パッケージの接続構造及び接続方法 |
| JP2001127108A (ja) | 1999-10-25 | 2001-05-11 | Hitachi Ltd | 半導体装置 |
| US6700209B1 (en) * | 1999-12-29 | 2004-03-02 | Intel Corporation | Partial underfill for flip-chip electronic packages |
| JP2001339012A (ja) | 2000-05-30 | 2001-12-07 | Nec Kyushu Ltd | 半導体装置およびその製造方法 |
| US6680436B2 (en) * | 2000-07-12 | 2004-01-20 | Seagate Technology Llc | Reflow encapsulant |
| US6573122B2 (en) | 2001-03-28 | 2003-06-03 | International Rectifier Corporation | Wafer level insulation underfill for die attach |
| JP2001313315A (ja) * | 2001-04-25 | 2001-11-09 | Hitachi Ltd | 実装用半導体装置とその実装方法 |
| CN1383197A (zh) * | 2001-04-25 | 2002-12-04 | 松下电器产业株式会社 | 半导体装置的制造方法及半导体装置 |
| TW544826B (en) * | 2001-05-18 | 2003-08-01 | Nec Electronics Corp | Flip-chip-type semiconductor device and manufacturing method thereof |
| TW540123B (en) | 2002-06-14 | 2003-07-01 | Siliconware Precision Industries Co Ltd | Flip-chip semiconductor package with lead frame as chip carrier |
| JP2004103928A (ja) * | 2002-09-11 | 2004-04-02 | Fujitsu Ltd | 基板及びハンダボールの形成方法及びその実装構造 |
| US6921860B2 (en) * | 2003-03-18 | 2005-07-26 | Micron Technology, Inc. | Microelectronic component assemblies having exposed contacts |
-
2004
- 2004-08-20 US US10/711,076 patent/US7332821B2/en not_active Expired - Fee Related
-
2005
- 2005-04-29 CN CNB2005100684327A patent/CN100399560C/zh not_active Expired - Fee Related
- 2005-08-02 TW TW094126235A patent/TWI346518B/zh not_active IP Right Cessation
- 2005-08-19 JP JP2005238111A patent/JP4686300B2/ja not_active Expired - Fee Related
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2007
- 2007-09-20 US US11/858,147 patent/US7566649B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040094842A1 (en) * | 1999-05-10 | 2004-05-20 | Jimarez Miguel A. | Flip chip C4 extension structure and process |
| JP2003158223A (ja) * | 2001-11-20 | 2003-05-30 | Matsushita Electric Ind Co Ltd | 電子部品実装構造 |
| JP2003234362A (ja) * | 2002-02-12 | 2003-08-22 | Yokogawa Electric Corp | 半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200618685A (en) | 2006-06-01 |
| CN1738042A (zh) | 2006-02-22 |
| JP4686300B2 (ja) | 2011-05-25 |
| US7566649B2 (en) | 2009-07-28 |
| US7332821B2 (en) | 2008-02-19 |
| TWI346518B (en) | 2011-08-01 |
| JP2006059814A (ja) | 2006-03-02 |
| US20060040567A1 (en) | 2006-02-23 |
| US20080009101A1 (en) | 2008-01-10 |
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