JP4686300B2 - デバイス支持構造体及びこれの製造方法 - Google Patents
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Description
本発明は図面を参照しながら以下の詳細な説明からより一層理解されるであろう。
12:コネクタ
20:圧縮性材料
30:マスク
60:支持体
62:アンダーフィル
90:チャネル
Claims (15)
- 支持体と、
前記支持体に結合されるデバイスと、
前記デバイスの表面から突出し該デバイスを前記支持体に電気接続する複数個の無鉛ハンダコネクタと、
隣接する無鉛ハンダコネクタ相互間に隙間を形成するように前記複数個の無鉛ハンダコネクタのそれぞれの側面を囲む圧縮性フィルムであって、前記圧縮性フィルムは前記無鉛ハンダコネクタの融点以上で熱的に安定であり、前記無鉛ハンダコネクタのリフロー時の体積膨張を吸収する、前記圧縮性フィルムと、
前記圧縮性フィルムに接し、前記支持体と前記デバイスの前記表面との間の前記隙間を埋める絶縁性のアンダーフィルと、
を含むデバイス支持構造体。 - 前記圧縮性フィルムは、複数個の前記無鉛ハンダコネクタを囲む正方形または矩形のパターンにパターン化されている、請求項1に記載の構造体。
- 前記パターンは、該パターン相互間に前記隙間に対応するチャネルを形成するように配置されている、請求項2に記載の構造体。
- 前記無鉛ハンダコネクタは、SnAgCuハンダである、請求項1に記載の構造体。
- 前記圧縮性フィルムの材料は、シリコンゴム又はポリイミド発泡体である、請求項1に記載の構造体。
- デバイスの表面上に該表面から突出する複数個の無鉛ハンダコネクタを形成するステップと、
隣接する無鉛ハンダコネクタ相互間に隙間を形成するように前記複数個の無鉛ハンダコネクタのそれぞれの側面を圧縮性フィルムで囲むステップであって、前記圧縮性フィルムは前記無鉛ハンダコネクタの融点以上で熱的に安定であり、前記無鉛ハンダコネクタのリフロー時の体積膨張を吸収する、前記ステップと、
前記デバイスの前記複数個の無鉛ハンダコネクタを支持体に位置決めして前記無鉛ハンダコネクタをリフローすることにより前記デバイスを前記支持体に電気的に接続するステップと、
前記支持体と前記デバイスの前記表面との間の前記隙間を絶縁性のアンダーフィルで埋めるステップとを含むデバイス支持構造体を製造する方法。 - 前記圧縮性フィルムは、複数個の前記無鉛ハンダコネクタを囲む正方形または矩形のパターンにパターン化されている、請求項6に記載の方法。
- 前記パターンは、該パターン相互間に前記隙間に対応するチャネルを形成するように配置されている、請求項7に記載の方法。
- 前記無鉛ハンダコネクタは、SnAgCuハンダである、請求項6に記載の方法。
- 前記圧縮性フィルムの材料は、シリコンゴム又はポリイミド発泡体である、請求項6に記載の方法。
- デバイスの表面上に該表面から突出する複数個の無鉛ハンダコネクタを形成ステップと、
前記複数個の無鉛ハンダコネクタ相互間を埋めるように前記デバイスの表面に圧縮性フィルムを付着するステップであって、前記圧縮性フィルムは前記無鉛ハンダコネクタの融点以上で熱的に安定であり、前記無鉛ハンダコネクタのリフロー時の体積膨張を吸収する、前記ステップと、
前記無鉛ハンダコネクタの上面と、前記圧縮性フィルムの上面のうち前記無鉛ハンダコネクタの上面に隣接する一部分とを覆うマスクを形成するステップと、
前記マスクを介して前記圧縮性フィルムをパターン化することにより、隣接する無鉛ハンダコネクタ相互間に隙間を形成するように前記複数個の無鉛ハンダコネクタのそれぞれの側面に圧縮性フィルムを残すステップと、
前記マスクを除去し、前記デバイスの前記複数個の無鉛ハンダコネクタを支持体に位置決めして前記無鉛ハンダコネクタをリフローすることにより前記デバイスを前記支持体に電気的に接続するステップと、
前記支持体と前記デバイスの前記表面との間の前記隙間を絶縁性のアンダーフィルで埋めるステップとを含むデバイス支持構造体を製造する方法。 - 前記圧縮性フィルムは、複数個の前記無鉛ハンダコネクタを囲む正方形または矩形のパターンにパターン化されている、請求項11に記載の方法。
- 前記パターンは、該パターン相互間に前記隙間に対応するチャネルを形成するように配置されている、請求項12に記載の方法。
- 前記無鉛ハンダコネクタは、SnAgCuハンダである、請求項11に記載の方法。
- 前記圧縮性フィルムの材料は、シリコンゴム又はポリイミド発泡体である、請求項11に記載の方法
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/711076 | 2004-08-20 | ||
US10/711,076 US7332821B2 (en) | 2004-08-20 | 2004-08-20 | Compressible films surrounding solder connectors |
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JP2006059814A JP2006059814A (ja) | 2006-03-02 |
JP2006059814A5 JP2006059814A5 (ja) | 2008-07-10 |
JP4686300B2 true JP4686300B2 (ja) | 2011-05-25 |
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JP2005238111A Expired - Fee Related JP4686300B2 (ja) | 2004-08-20 | 2005-08-19 | デバイス支持構造体及びこれの製造方法 |
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US (2) | US7332821B2 (ja) |
JP (1) | JP4686300B2 (ja) |
CN (1) | CN100399560C (ja) |
TW (1) | TWI346518B (ja) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006056999A2 (en) * | 2004-11-29 | 2006-06-01 | N-Trig Ltd. | Methods for manufacturing a sensor assembly |
US20070063344A1 (en) * | 2005-09-22 | 2007-03-22 | Chun-Hung Lin | Chip package structure and bumping process |
WO2007114111A1 (ja) * | 2006-03-28 | 2007-10-11 | Matsushita Electric Industrial Co., Ltd. | 多層配線基板とその製造方法 |
US7727805B2 (en) * | 2007-06-11 | 2010-06-01 | Intel Corporation | Reducing stress in a flip chip assembly |
US20090108442A1 (en) * | 2007-10-25 | 2009-04-30 | International Business Machines Corporation | Self-assembled stress relief interface |
US8507325B2 (en) | 2010-01-28 | 2013-08-13 | International Business Machines Corporation | Co-axial restraint for connectors within flip-chip packages |
FR2957748B1 (fr) * | 2010-03-16 | 2012-09-07 | St Microelectronics Grenoble 2 | Composant electronique a montage en surface |
US9082780B2 (en) * | 2012-03-23 | 2015-07-14 | Stats Chippac, Ltd. | Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer |
US20140291834A1 (en) * | 2013-03-27 | 2014-10-02 | Micron Technology, Inc. | Semiconductor devices and packages including conductive underfill material and related methods |
US9711474B2 (en) * | 2014-09-24 | 2017-07-18 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor package structure with polymeric layer and manufacturing method thereof |
US20170309584A1 (en) * | 2014-10-23 | 2017-10-26 | Agency For Science, Technology And Research | Method of bonding a first substrate and a second substrate |
KR102458034B1 (ko) | 2015-10-16 | 2022-10-25 | 삼성전자주식회사 | 반도체 패키지, 반도체 패키지의 제조방법, 및 반도체 모듈 |
US10597486B2 (en) | 2016-11-02 | 2020-03-24 | Seagate Technology Llc | Encapsulant composition for use with electrical components in hard disk drives, and related electrical components and hard disk drives |
US10163847B2 (en) * | 2017-03-03 | 2018-12-25 | Tdk Corporation | Method for producing semiconductor package |
CN108538726B (zh) * | 2017-03-03 | 2022-08-26 | Tdk株式会社 | 半导体芯片的制造方法 |
WO2021222582A1 (en) * | 2020-04-30 | 2021-11-04 | Dujud Llc | Methods and processes for forming electrical circuitries on three-dimensional geometries |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10178121A (ja) * | 1996-12-18 | 1998-06-30 | Toshiba Corp | 半導体パッケージ用金属ボール配設板、半導体装置及びその製造方法 |
WO1999050906A1 (en) * | 1998-03-27 | 1999-10-07 | Seiko Epson Corporation | Semiconductor device and method for manufacturing the same, circuit substrate, and electronic device |
JP2001007502A (ja) * | 1999-06-23 | 2001-01-12 | Sony Corp | 電子部品パッケージの接続構造及び接続方法 |
JP2001313315A (ja) * | 2001-04-25 | 2001-11-09 | Hitachi Ltd | 実装用半導体装置とその実装方法 |
JP2004103928A (ja) * | 2002-09-11 | 2004-04-02 | Fujitsu Ltd | 基板及びハンダボールの形成方法及びその実装構造 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5274913A (en) * | 1991-10-25 | 1994-01-04 | International Business Machines Corporation | Method of fabricating a reworkable module |
US5956605A (en) * | 1996-09-20 | 1999-09-21 | Micron Technology, Inc. | Use of nitrides for flip-chip encapsulation |
DE1025587T1 (de) * | 1997-07-21 | 2001-02-08 | Aguila Technologies Inc | Halbleiter-flipchippackung und herstellungsverfahren dafür |
US6100114A (en) * | 1998-08-10 | 2000-08-08 | International Business Machines Corporation | Encapsulation of solder bumps and solder connections |
US6281452B1 (en) * | 1998-12-03 | 2001-08-28 | International Business Machines Corporation | Multi-level thin-film electronic packaging structure and related method |
US6225206B1 (en) * | 1999-05-10 | 2001-05-01 | International Business Machines Corporation | Flip chip C4 extension structure and process |
JP2001127108A (ja) | 1999-10-25 | 2001-05-11 | Hitachi Ltd | 半導体装置 |
US6700209B1 (en) * | 1999-12-29 | 2004-03-02 | Intel Corporation | Partial underfill for flip-chip electronic packages |
JP2001339012A (ja) * | 2000-05-30 | 2001-12-07 | Nec Kyushu Ltd | 半導体装置およびその製造方法 |
US6680436B2 (en) * | 2000-07-12 | 2004-01-20 | Seagate Technology Llc | Reflow encapsulant |
US6573122B2 (en) * | 2001-03-28 | 2003-06-03 | International Rectifier Corporation | Wafer level insulation underfill for die attach |
US20020180029A1 (en) * | 2001-04-25 | 2002-12-05 | Hideki Higashitani | Semiconductor device with intermediate connector |
TW544826B (en) * | 2001-05-18 | 2003-08-01 | Nec Electronics Corp | Flip-chip-type semiconductor device and manufacturing method thereof |
JP3708478B2 (ja) * | 2001-11-20 | 2005-10-19 | 松下電器産業株式会社 | 電子部品の実装方法 |
JP2003234362A (ja) * | 2002-02-12 | 2003-08-22 | Yokogawa Electric Corp | 半導体装置 |
TW540123B (en) * | 2002-06-14 | 2003-07-01 | Siliconware Precision Industries Co Ltd | Flip-chip semiconductor package with lead frame as chip carrier |
US6921860B2 (en) * | 2003-03-18 | 2005-07-26 | Micron Technology, Inc. | Microelectronic component assemblies having exposed contacts |
-
2004
- 2004-08-20 US US10/711,076 patent/US7332821B2/en not_active Expired - Fee Related
-
2005
- 2005-04-29 CN CNB2005100684327A patent/CN100399560C/zh not_active Expired - Fee Related
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- 2005-08-19 JP JP2005238111A patent/JP4686300B2/ja not_active Expired - Fee Related
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- 2007-09-20 US US11/858,147 patent/US7566649B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10178121A (ja) * | 1996-12-18 | 1998-06-30 | Toshiba Corp | 半導体パッケージ用金属ボール配設板、半導体装置及びその製造方法 |
WO1999050906A1 (en) * | 1998-03-27 | 1999-10-07 | Seiko Epson Corporation | Semiconductor device and method for manufacturing the same, circuit substrate, and electronic device |
JP2001007502A (ja) * | 1999-06-23 | 2001-01-12 | Sony Corp | 電子部品パッケージの接続構造及び接続方法 |
JP2001313315A (ja) * | 2001-04-25 | 2001-11-09 | Hitachi Ltd | 実装用半導体装置とその実装方法 |
JP2004103928A (ja) * | 2002-09-11 | 2004-04-02 | Fujitsu Ltd | 基板及びハンダボールの形成方法及びその実装構造 |
Also Published As
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JP2006059814A (ja) | 2006-03-02 |
TWI346518B (en) | 2011-08-01 |
US7566649B2 (en) | 2009-07-28 |
CN1738042A (zh) | 2006-02-22 |
TW200618685A (en) | 2006-06-01 |
US20080009101A1 (en) | 2008-01-10 |
CN100399560C (zh) | 2008-07-02 |
US20060040567A1 (en) | 2006-02-23 |
US7332821B2 (en) | 2008-02-19 |
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