TWI346518B - Compressible films surrounding solder connectors - Google Patents
Compressible films surrounding solder connectorsInfo
- Publication number
- TWI346518B TWI346518B TW094126235A TW94126235A TWI346518B TW I346518 B TWI346518 B TW I346518B TW 094126235 A TW094126235 A TW 094126235A TW 94126235 A TW94126235 A TW 94126235A TW I346518 B TWI346518 B TW I346518B
- Authority
- TW
- Taiwan
- Prior art keywords
- solder connectors
- films surrounding
- surrounding solder
- compressible
- compressible films
- Prior art date
Links
- 229910000679 solder Inorganic materials 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10125—Reinforcing structures
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- H01L2224/13001—Core members of the bump connector
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- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H01L2224/812—Applying energy for connecting
- H01L2224/8121—Applying energy for connecting using a reflow oven
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- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
- H01R43/02—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections
- H01R43/0256—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections for soldering or welding connectors to a printed circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0133—Elastomeric or compliant polymer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/711,076 US7332821B2 (en) | 2004-08-20 | 2004-08-20 | Compressible films surrounding solder connectors |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200618685A TW200618685A (en) | 2006-06-01 |
TWI346518B true TWI346518B (en) | 2011-08-01 |
Family
ID=35910206
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094126235A TWI346518B (en) | 2004-08-20 | 2005-08-02 | Compressible films surrounding solder connectors |
Country Status (4)
Country | Link |
---|---|
US (2) | US7332821B2 (zh) |
JP (1) | JP4686300B2 (zh) |
CN (1) | CN100399560C (zh) |
TW (1) | TWI346518B (zh) |
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TW200629155A (en) * | 2004-11-29 | 2006-08-16 | N trig ltd | Methods for manufacturing a sensor assembly |
US20070063344A1 (en) * | 2005-09-22 | 2007-03-22 | Chun-Hung Lin | Chip package structure and bumping process |
TW200803686A (en) * | 2006-03-28 | 2008-01-01 | Matsushita Electric Ind Co Ltd | Multilayer wiring board and its manufacturing method |
US7727805B2 (en) * | 2007-06-11 | 2010-06-01 | Intel Corporation | Reducing stress in a flip chip assembly |
US20090108442A1 (en) * | 2007-10-25 | 2009-04-30 | International Business Machines Corporation | Self-assembled stress relief interface |
US8507325B2 (en) | 2010-01-28 | 2013-08-13 | International Business Machines Corporation | Co-axial restraint for connectors within flip-chip packages |
FR2957748B1 (fr) * | 2010-03-16 | 2012-09-07 | St Microelectronics Grenoble 2 | Composant electronique a montage en surface |
US9082780B2 (en) * | 2012-03-23 | 2015-07-14 | Stats Chippac, Ltd. | Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer |
US20140291834A1 (en) * | 2013-03-27 | 2014-10-02 | Micron Technology, Inc. | Semiconductor devices and packages including conductive underfill material and related methods |
US9711474B2 (en) * | 2014-09-24 | 2017-07-18 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor package structure with polymeric layer and manufacturing method thereof |
SG11201703125WA (en) * | 2014-10-23 | 2017-05-30 | Agency Science Tech & Res | Method of bonding a first substrate and a second substrate |
KR102458034B1 (ko) | 2015-10-16 | 2022-10-25 | 삼성전자주식회사 | 반도체 패키지, 반도체 패키지의 제조방법, 및 반도체 모듈 |
US10597486B2 (en) | 2016-11-02 | 2020-03-24 | Seagate Technology Llc | Encapsulant composition for use with electrical components in hard disk drives, and related electrical components and hard disk drives |
US10163847B2 (en) * | 2017-03-03 | 2018-12-25 | Tdk Corporation | Method for producing semiconductor package |
CN108538726B (zh) * | 2017-03-03 | 2022-08-26 | Tdk株式会社 | 半导体芯片的制造方法 |
EP4144192A1 (en) * | 2020-04-30 | 2023-03-08 | Dujud LLC | Methods and processes for forming electrical circuitries on three-dimensional geometries |
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2004
- 2004-08-20 US US10/711,076 patent/US7332821B2/en not_active Expired - Fee Related
-
2005
- 2005-04-29 CN CNB2005100684327A patent/CN100399560C/zh not_active Expired - Fee Related
- 2005-08-02 TW TW094126235A patent/TWI346518B/zh not_active IP Right Cessation
- 2005-08-19 JP JP2005238111A patent/JP4686300B2/ja not_active Expired - Fee Related
-
2007
- 2007-09-20 US US11/858,147 patent/US7566649B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2006059814A (ja) | 2006-03-02 |
CN100399560C (zh) | 2008-07-02 |
US7566649B2 (en) | 2009-07-28 |
US20080009101A1 (en) | 2008-01-10 |
CN1738042A (zh) | 2006-02-22 |
TW200618685A (en) | 2006-06-01 |
US20060040567A1 (en) | 2006-02-23 |
US7332821B2 (en) | 2008-02-19 |
JP4686300B2 (ja) | 2011-05-25 |
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MM4A | Annulment or lapse of patent due to non-payment of fees |