CN100385621C - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

Info

Publication number
CN100385621C
CN100385621C CNB2005100093647A CN200510009364A CN100385621C CN 100385621 C CN100385621 C CN 100385621C CN B2005100093647 A CNB2005100093647 A CN B2005100093647A CN 200510009364 A CN200510009364 A CN 200510009364A CN 100385621 C CN100385621 C CN 100385621C
Authority
CN
China
Prior art keywords
semiconductor device
pad electrode
hole
semiconductor chip
silicon wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB2005100093647A
Other languages
English (en)
Chinese (zh)
Other versions
CN1658372A (zh
Inventor
龟山工次郎
铃木彰
冈山芳央
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1658372A publication Critical patent/CN1658372A/zh
Application granted granted Critical
Publication of CN100385621C publication Critical patent/CN100385621C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B62LAND VEHICLES FOR TRAVELLING OTHERWISE THAN ON RAILS
    • B62BHAND-PROPELLED VEHICLES, e.g. HAND CARTS OR PERAMBULATORS; SLEDGES
    • B62B3/00Hand carts having more than one axis carrying transport wheels; Steering devices therefor; Equipment therefor
    • B62B3/10Hand carts having more than one axis carrying transport wheels; Steering devices therefor; Equipment therefor characterised by supports specially adapted to objects of definite shape
    • B62B3/108Hand carts having more than one axis carrying transport wheels; Steering devices therefor; Equipment therefor characterised by supports specially adapted to objects of definite shape the objects being plates, doors, panels, or the like
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/018Manufacture or treatment of image sensors covered by group H10F39/12 of hybrid image sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80Constructional details of image sensors
    • H10F39/811Interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211Through-semiconductor vias, e.g. TSVs
    • H10W20/216Through-semiconductor vias, e.g. TSVs characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/019Manufacture or treatment of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • H10W72/244Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/922Bond pads being integral with underlying chip-level interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/922Bond pads being integral with underlying chip-level interconnections
    • H10W72/9226Bond pads being integral with underlying chip-level interconnections with via interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/942Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Transportation (AREA)
  • Mechanical Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
CNB2005100093647A 2004-02-17 2005-02-17 半导体装置及其制造方法 Expired - Lifetime CN100385621C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP040408/04 2004-02-17
JP2004040408A JP4307284B2 (ja) 2004-02-17 2004-02-17 半導体装置の製造方法
JP040408/2004 2004-02-17

Publications (2)

Publication Number Publication Date
CN1658372A CN1658372A (zh) 2005-08-24
CN100385621C true CN100385621C (zh) 2008-04-30

Family

ID=34697998

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005100093647A Expired - Lifetime CN100385621C (zh) 2004-02-17 2005-02-17 半导体装置及其制造方法

Country Status (6)

Country Link
US (1) US8278213B2 (https=)
EP (1) EP1564807B1 (https=)
JP (1) JP4307284B2 (https=)
KR (1) KR100671921B1 (https=)
CN (1) CN100385621C (https=)
TW (1) TWI346995B (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810549A (zh) * 2012-08-29 2012-12-05 格科微电子(上海)有限公司 图像传感器的晶圆级封装的制作方法
CN108269812A (zh) * 2017-12-20 2018-07-10 武汉新芯集成电路制造有限公司 一种优化的芯片级封装工艺方法

Families Citing this family (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI272683B (en) * 2004-05-24 2007-02-01 Sanyo Electric Co Semiconductor device and manufacturing method thereof
JP3988777B2 (ja) * 2005-07-29 2007-10-10 オムロン株式会社 表面実装用の半導体パッケージおよびその製造方法
WO2007023950A1 (ja) * 2005-08-26 2007-03-01 Hitachi, Ltd. 半導体装置の製造方法
JP4745007B2 (ja) * 2005-09-29 2011-08-10 三洋電機株式会社 半導体装置及びその製造方法
JP2007273941A (ja) * 2006-03-07 2007-10-18 Sanyo Semiconductor Co Ltd 半導体装置の製造方法
CN100477136C (zh) * 2006-01-10 2009-04-08 矽品精密工业股份有限公司 电路板及其构装结构
JP2007317839A (ja) * 2006-05-25 2007-12-06 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP5143382B2 (ja) 2006-07-27 2013-02-13 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
US8101464B2 (en) 2006-08-30 2012-01-24 Micron Technology, Inc. Microelectronic devices and methods for manufacturing microelectronic devices
JP4773307B2 (ja) 2006-09-15 2011-09-14 Okiセミコンダクタ株式会社 半導体装置の製造方法
US20080136012A1 (en) * 2006-12-08 2008-06-12 Advanced Chip Engineering Technology Inc. Imagine sensor package and forming method of the same
TWI341584B (en) * 2007-02-26 2011-05-01 Siliconware Precision Industries Co Ltd Sensor-type semiconductor package and manufacturing method thereof
US7595220B2 (en) * 2007-06-29 2009-09-29 Visera Technologies Company Limited Image sensor package and fabrication method thereof
JP2009021462A (ja) * 2007-07-13 2009-01-29 Disco Abrasive Syst Ltd ウェーハの加工方法
TWI353667B (en) * 2007-07-13 2011-12-01 Xintec Inc Image sensor package and fabrication method thereo
DE102007035902A1 (de) * 2007-07-31 2009-02-05 Siemens Ag Verfahren zum Herstellen eines elektronischen Bausteins und elektronischer Baustein
WO2009063372A1 (en) * 2007-11-12 2009-05-22 Nxp B.V. Thermal stress reduction
JP4939452B2 (ja) * 2008-02-07 2012-05-23 ラピスセミコンダクタ株式会社 半導体装置の製造方法
US8072079B2 (en) * 2008-03-27 2011-12-06 Stats Chippac, Ltd. Through hole vias at saw streets including protrusions or recesses for interconnection
JP5271610B2 (ja) * 2008-06-12 2013-08-21 ラピスセミコンダクタ株式会社 半導体装置の製造方法
JP5455538B2 (ja) 2008-10-21 2014-03-26 キヤノン株式会社 半導体装置及びその製造方法
JP2010103300A (ja) * 2008-10-23 2010-05-06 Sanyo Electric Co Ltd 半導体装置及びその製造方法
TWI388038B (zh) * 2009-07-23 2013-03-01 財團法人工業技術研究院 感測元件結構與製造方法
CN102576789B (zh) 2009-09-20 2016-08-24 维亚甘有限公司 电子器件的晶片级封装
US9502612B2 (en) 2009-09-20 2016-11-22 Viagan Ltd. Light emitting diode package with enhanced heat conduction
US8697574B2 (en) * 2009-09-25 2014-04-15 Infineon Technologies Ag Through substrate features in semiconductor substrates
EP2306506B1 (en) * 2009-10-01 2013-07-31 ams AG Method of producing a semiconductor device having a through-wafer interconnect
JP5532867B2 (ja) * 2009-11-30 2014-06-25 ソニー株式会社 固体撮像装置及びその製造方法、並びに固体撮像素子の製造方法及び半導体装置
CN102088012B (zh) * 2009-12-07 2013-04-17 精材科技股份有限公司 电子元件封装体及其制造方法
US8471289B2 (en) * 2009-12-28 2013-06-25 Sanyo Electric Co., Ltd. Semiconductor laser device, optical pickup device and semiconductor device
JP2013520808A (ja) * 2010-02-26 2013-06-06 精材科技股▲ふん▼有限公司 チップパッケージおよびその製造方法
KR20110134703A (ko) 2010-06-09 2011-12-15 삼성전자주식회사 반도체 패키지의 제조 방법
JP2010245571A (ja) * 2010-07-23 2010-10-28 Oki Semiconductor Co Ltd 半導体装置の製造方法
KR101712630B1 (ko) 2010-12-20 2017-03-07 삼성전자 주식회사 반도체 소자의 형성 방법
TWI459485B (zh) * 2011-01-17 2014-11-01 精材科技股份有限公司 晶片封裝體的形成方法
US8941137B2 (en) 2011-03-06 2015-01-27 Mordehai MARGALIT Light emitting diode package and method of manufacture
US8987855B2 (en) 2011-08-04 2015-03-24 Taiwan Semiconductor Manufacturing Company, Ltd. Pad structures formed in double openings in dielectric layers
US8629043B2 (en) * 2011-11-16 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for de-bonding carriers
EP2693467B1 (en) 2012-08-01 2015-11-18 ams AG A method of producing a semiconductor device having an interconnect through the substrate
US9123732B2 (en) * 2012-09-28 2015-09-01 Intel Corporation Die warpage control for thin die assembly
US20140151095A1 (en) * 2012-12-05 2014-06-05 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
TWI487440B (zh) * 2013-02-05 2015-06-01 Nan Ya Printed Circuit Board 印刷電路板及其製作方法
KR20140104778A (ko) 2013-02-21 2014-08-29 삼성전자주식회사 관통전극을 갖는 반도체 소자의 제조방법
TWI633640B (zh) 2013-12-16 2018-08-21 新力股份有限公司 Semiconductor element, method of manufacturing semiconductor element, and electronic device
US9431350B2 (en) * 2014-03-20 2016-08-30 United Microelectronics Corp. Crack-stopping structure and method for forming the same
US9548248B2 (en) * 2014-08-07 2017-01-17 Infineon Technologies Ag Method of processing a substrate and a method of processing a wafer
US9478453B2 (en) 2014-09-17 2016-10-25 International Business Machines Corporation Sacrificial carrier dicing of semiconductor wafers
CN104392958A (zh) * 2014-11-23 2015-03-04 北京工业大学 晶圆级含硅通孔的半导体封装方法
CN104393009B (zh) * 2014-11-23 2017-02-01 北京工业大学 包含硅通孔的高可靠性影像传感器封装
CN104465581A (zh) * 2014-11-23 2015-03-25 北京工业大学 一种低成本高可靠性芯片尺寸cis封装
KR101637186B1 (ko) * 2014-11-24 2016-07-07 주식회사 에스에프에이반도체 관통 실리콘 비아 웨이퍼의 집적회로 분단 방법
JP6843570B2 (ja) * 2016-09-28 2021-03-17 キヤノン株式会社 半導体装置の製造方法
CN108878461A (zh) * 2017-05-08 2018-11-23 中芯国际集成电路制造(上海)有限公司 半导体器件及其制造方法
US11207744B2 (en) * 2019-10-25 2021-12-28 Micron Technology, Inc. Two-step solder-mask-defined design
FR3104317A1 (fr) * 2019-12-04 2021-06-11 Stmicroelectronics (Tours) Sas Procédé de fabrication de puces électroniques
FR3104315B1 (fr) 2019-12-04 2021-12-17 St Microelectronics Tours Sas Procédé de fabrication de puces électroniques
IT202100014306A1 (it) * 2021-06-01 2022-12-01 St Microelectronics Srl Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente
KR102550141B1 (ko) * 2021-07-19 2023-07-03 네패스 하임 반도체 패키지
KR102550142B1 (ko) * 2021-07-23 2023-07-03 네패스 하임 반도체 패키지
FR3126540A1 (fr) 2021-08-31 2023-03-03 Stmicroelectronics (Tours) Sas Procédé de fabrication de puces électroniques

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814889A (en) * 1995-06-05 1998-09-29 Harris Corporation Intergrated circuit with coaxial isolation and method
JP2002025948A (ja) * 2000-07-10 2002-01-25 Canon Inc ウエハーの分割方法、半導体デバイス、および半導体デバイスの製造方法
US6406934B1 (en) * 2000-09-05 2002-06-18 Amkor Technology, Inc. Wafer level production of chip size semiconductor packages
CN1392610A (zh) * 2001-06-14 2003-01-22 新光电气工业株式会社 半导体器件及其生产方法
CN1445829A (zh) * 2002-03-20 2003-10-01 裕沛科技股份有限公司 一种晶圆型态封装及其制作方法
US6630725B1 (en) * 2000-10-06 2003-10-07 Motorola, Inc. Electronic component and method of manufacture
CN1453865A (zh) * 2002-04-23 2003-11-05 三洋电机株式会社 半导体装置及其制造方法
CN1469447A (zh) * 2002-06-18 2004-01-21 ������������ʽ���� 半导体装置的制造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0215652A (ja) * 1988-07-01 1990-01-19 Mitsubishi Electric Corp 半導体装置及びその製造方法
DE4314907C1 (de) * 1993-05-05 1994-08-25 Siemens Ag Verfahren zur Herstellung von vertikal miteinander elektrisch leitend kontaktierten Halbleiterbauelementen
DE4433845A1 (de) 1994-09-22 1996-03-28 Fraunhofer Ges Forschung Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung
US5851928A (en) 1995-11-27 1998-12-22 Motorola, Inc. Method of etching a semiconductor substrate
IL123207A0 (en) 1998-02-06 1998-09-24 Shellcase Ltd Integrated circuit device
KR100298827B1 (ko) * 1999-07-09 2001-11-01 윤종용 재배선 기판을 사용한 웨이퍼 레벨 칩 스케일 패키지 제조방법
JP2001176898A (ja) 1999-12-20 2001-06-29 Mitsui High Tec Inc 半導体パッケージの製造方法
JP2002094082A (ja) 2000-07-11 2002-03-29 Seiko Epson Corp 光素子及びその製造方法並びに電子機器
US6379982B1 (en) * 2000-08-17 2002-04-30 Micron Technology, Inc. Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing
JP2002100709A (ja) 2000-09-21 2002-04-05 Hitachi Ltd 半導体装置及びその製造方法
JP4183375B2 (ja) * 2000-10-04 2008-11-19 沖電気工業株式会社 半導体装置及びその製造方法
US6693358B2 (en) * 2000-10-23 2004-02-17 Matsushita Electric Industrial Co., Ltd. Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device
WO2003019653A2 (de) * 2001-08-24 2003-03-06 Schott Glas Verfahren zum kontaktieren und gehäusen von integrierten schaltungen
US6697013B2 (en) 2001-12-06 2004-02-24 Atheros Communications, Inc. Radar detection and dynamic frequency selection for wireless local area networks
JP4401330B2 (ja) 2002-04-23 2010-01-20 三洋電機株式会社 半導体装置及びその製造方法
TWI227050B (en) * 2002-10-11 2005-01-21 Sanyo Electric Co Semiconductor device and method for manufacturing the same
JP4130158B2 (ja) * 2003-06-09 2008-08-06 三洋電機株式会社 半導体装置の製造方法、半導体装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814889A (en) * 1995-06-05 1998-09-29 Harris Corporation Intergrated circuit with coaxial isolation and method
JP2002025948A (ja) * 2000-07-10 2002-01-25 Canon Inc ウエハーの分割方法、半導体デバイス、および半導体デバイスの製造方法
US6406934B1 (en) * 2000-09-05 2002-06-18 Amkor Technology, Inc. Wafer level production of chip size semiconductor packages
US6630725B1 (en) * 2000-10-06 2003-10-07 Motorola, Inc. Electronic component and method of manufacture
CN1392610A (zh) * 2001-06-14 2003-01-22 新光电气工业株式会社 半导体器件及其生产方法
CN1445829A (zh) * 2002-03-20 2003-10-01 裕沛科技股份有限公司 一种晶圆型态封装及其制作方法
CN1453865A (zh) * 2002-04-23 2003-11-05 三洋电机株式会社 半导体装置及其制造方法
CN1469447A (zh) * 2002-06-18 2004-01-21 ������������ʽ���� 半导体装置的制造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810549A (zh) * 2012-08-29 2012-12-05 格科微电子(上海)有限公司 图像传感器的晶圆级封装的制作方法
CN102810549B (zh) * 2012-08-29 2015-04-01 格科微电子(上海)有限公司 图像传感器的晶圆级封装的制作方法
CN108269812A (zh) * 2017-12-20 2018-07-10 武汉新芯集成电路制造有限公司 一种优化的芯片级封装工艺方法
CN108269812B (zh) * 2017-12-20 2019-02-15 武汉新芯集成电路制造有限公司 一种优化的芯片级封装工艺方法

Also Published As

Publication number Publication date
KR20060041997A (ko) 2006-05-12
US20050194670A1 (en) 2005-09-08
EP1564807A2 (en) 2005-08-17
EP1564807A3 (en) 2008-10-01
CN1658372A (zh) 2005-08-24
EP1564807B1 (en) 2013-04-10
US8278213B2 (en) 2012-10-02
TWI346995B (en) 2011-08-11
JP4307284B2 (ja) 2009-08-05
TW200531228A (en) 2005-09-16
JP2005235859A (ja) 2005-09-02
KR100671921B1 (ko) 2007-01-24

Similar Documents

Publication Publication Date Title
CN100385621C (zh) 半导体装置及其制造方法
CN100383938C (zh) 半导体装置及其制造方法
KR100658543B1 (ko) 반도체 장치 및 그 제조 방법
CN100370607C (zh) 半导体装置及其制造方法
KR100646722B1 (ko) 반도체 장치 및 그 제조 방법
EP1482553A2 (en) Semiconductor device and manufacturing method thereof
JP3970210B2 (ja) 半導体装置の製造方法
JP3970211B2 (ja) 半導体装置及びその製造方法
US7557017B2 (en) Method of manufacturing semiconductor device with two-step etching of layer
JP4307296B2 (ja) 半導体装置の製造方法
JP4544902B2 (ja) 半導体装置及びその製造方法
JP4282514B2 (ja) 半導体装置の製造方法
JP4845986B2 (ja) 半導体装置
JP4769926B2 (ja) 半導体装置及びその製造方法
JP2004273561A (ja) 半導体装置及びその製造方法
JP2005260080A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20080430

CX01 Expiry of patent term