CN100381926C - 一种液晶显示器件及其制造方法 - Google Patents

一种液晶显示器件及其制造方法 Download PDF

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CN100381926C
CN100381926C CNB2005100723942A CN200510072394A CN100381926C CN 100381926 C CN100381926 C CN 100381926C CN B2005100723942 A CNB2005100723942 A CN B2005100723942A CN 200510072394 A CN200510072394 A CN 200510072394A CN 100381926 C CN100381926 C CN 100381926C
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tft
lightly doped
thin film
film transistor
doped drain
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CN1704827A (zh
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李锡宇
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LG Display Co Ltd
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Abstract

本发明公开了一种液晶显示器件,包括:显示区、开关器件和驱动电路单元,其中所述显示区上设有布置成矩阵形式的单元象素;所述开关器件在所述显示区中形成,根据驱动电压的不同由GOLDD(重叠栅极的轻掺杂漏极)型TFT或LDD(轻掺杂漏极)型TFT或PMOS构成;而所述驱动电路单元具有至少一LDD型TFT和GOLDD型TFT。

Description

一种液晶显示器件及其制造方法
技术领域
本发明涉及一种液晶显示器件及其制造方法,更确切地说,涉及一种具有GOLDD(重叠栅极的轻掺杂漏极)型和LDD(轻掺杂漏极)型薄膜晶体管的液晶显示器件及其制造方法。
背景技术
最近,对更轻、更小巧平板显示器件的研究已使得液晶显示(LCD)器件得以大量生产和广泛应用。LCD器件通常使用薄膜晶体管(TFT)。在LCD器件中用TFT作为开关器件单独驱动各相应的象素。TFT包括半导体层、栅极、源极和漏极,其中半导体层上形成供电流流过的沟道,栅极通过施加扫描信号使得输入数据信号的源极和输出数据信号的漏极上的电流接通和截断来控制电流。
LCD包括象素区和驱动电路单元,所述象素区上具有多个用于显示实像的象素,所述驱动电路单元用于向象素区提供各种信号。TFT构成所有象素区和驱动电路单元。对于在同一基板上具有驱动电路单元和象素区的玻璃上芯片型(COG)LCD而言,通过在驱动电路单元上设置多晶TFT而在形成小巧的LCD研究方面获得了极大的成功。
与形成在象素区中的TFT相比,形成在驱动电路单元中的TFT必须具有更高的电迁移率。因此,在驱动电路单元中通常采用具有高电迁移率的多晶TFT。
近来,在进一步减小LCD以便形成更轻和更小巧的显示器件方面做了很多努力。然而,由于不能进一步减小显示图像的象素区(象素区的尺寸已经确定),所以,减小LCD的尺寸主要是靠减小驱动电路单元的面积实现。因此,当减小驱动电路单元的面积时,也不可避免地将减小设置在驱动电路单元内的TFT的尺寸。通过减小沟道的长度可以减小TFT。然而,减小沟道的长度,将使沟道层易受到沟道上产生的热载流子的伤害。陷在沟道内的热载流子将改变器件的阈值电压进而使其发生故障。
为了解决这一问题,引入了LDD(轻掺杂漏极)型TFT。LDD型TFT具有低浓度杂质区。LDD区与沟道层相邻形成而高浓度杂质区形成在LDD区的外侧。此外,由于LDD型TFT极少产生任何断电流,由此可以防止引起图像质量下降的漏电流。
然而,在LDD型TFT中,沟道长度的减小量受到限制。随着沟道长度变短,TFT的可靠性将下降。因此,当将沟道长度较短的TFT用到HDTV等高图像质量的显示器件上时,由于热载流子效应将使沟道受到损坏。
建议采用具有GOLDD(重叠栅极的LDD)型TFT解决这些问题。在GOLDD型TFT中,由于栅极与LDD区重叠,所以能够形成较短的沟道。因此,可以制造出可靠的小尺寸TFT。
下面将参照图1A到图1F讨论现有技术中GOLDD型TFT的制造工序。
首先,如图1A所示,在用透明材料如玻璃等制成的基板101上形成缓冲层102。接着,通过沉积诸如硅等非晶半导体并对其构图而在缓冲层102上形成半导体层103。随后,在半导体层103上形成光刻胶图案104并将低浓度杂质离子(即,n-离子)注入到半导体层103上未被光刻胶图案遮挡的暴露区。最后形成沟道层103a和低浓度杂质区103b,即n-区。
随之,如图1B所示,在去除沟道层103a上的光刻胶图案104之后,用激光束照射半导体层103以使非晶半导体层结晶。当用激光束照射半导体层103时,将激活注入到n-区103b中的杂质离子。
然后,如图1C所示,在半导体层103上形成栅绝缘层105。随后,在栅绝缘层105上形成金属层106。
参照图1D,在金属层106上形成光刻胶图案107并执行光刻工序从而形成栅极106a。栅极106a的尺寸大于沟道层103a。
下面参照图1E,用栅极106a作为掩模在n-区103b内注入高浓度杂质离子(n+离子)。各n-层103b的一部分(即,未被栅极106a遮挡的区域)变成高浓度杂质区103c(n+区)。因此,栅极106a与低浓度杂质区103b’重叠。
形成高浓度杂质层103c之后,如图1F所示,在栅极106a上形成钝化层108。在钝化层108上沉积导电层并对导电层进行蚀刻形成源极109和漏极110。
源极109和漏极110分别通过用于暴露n+区103c的接触孔与n+区103c相连。
所以,GOLDD型TFT具有与LDD型TFT相似的低浓度杂质离子区和高浓度杂质离子区。GOLDD型TFT具有极佳的可靠性但不容易减小其尺寸。另一方面,LDD型TFT在小尺寸方面有优势,但由于要尽可能减小尺寸,所以其可靠性下降。
发明内容
因此,本发明涉及一种液晶显示器件,该液晶显示器件基本上克服了因现有技术的限制和缺陷而导致的一个或多个问题。
因此,本发明的目的是,通过减小基板上驱动电路单元的面积来形成更小巧的液晶显示器件。更确切地说,本发明的目的是,通过根据驱动电压选择性地将LDD型TFT和GOLDD型TFT应用于形成在驱动电路单元上的不同驱动器件而形成最佳驱动电路单元和更小巧的液晶显示器件。
在以下的说明中将述及本发明的其它特征和优点,这些特征和优点中的一部分将从以下的说明中明显得到,或是通过本发明的实践而获得。通过文字说明部分和权利要求以及所附的附图中特别指出的结构可以实现和获得本发明的目的和其他优点。
为了获得在此以概括和广义形式描述的与本发明目的有关的这些和其他优点,本发明的液晶显示器件包括:显示区,所述显示区上设有布置成矩阵形式的单元象素;开关器件,在所述显示区中形成,所述开关器件根据驱动电压的不同由GOLDD(重叠栅极的轻掺杂漏极)型TFT或LDD(轻掺杂漏极)型TFT或PMOS构成;和驱动电路单元,所述驱动电路单元具有至少一个LDD型TFT和GOLDD型TFT。
按照另一方面,一种液晶显示器件包括:图像显示单元,所述图像显示单元上设有布置成矩阵形式的单元象素;开关器件,在所述显示区中形成,所述开关器件根据驱动电压的不同由GOLDD型TFT或LDD型TFT或PMOS构成;和驱动电路单元,所述驱动电路单元根据驱动电压的不同而由包含LDD型TFT的第一CMOS和包含GOLDD型TFT的第二CMOS构成。
按照另一方面,本发明提供一种制造由驱动电路单元集成的液晶显示器件的方法,所述方法包括的步骤有:在基板上设计显示区和驱动电路区;在显示区上形成矩阵形式的单元象素;在所述显示区中形成开关器件,所述开关器件根据驱动电压的不同由重叠栅极的轻掺杂漏极型薄膜晶体管或轻掺杂漏极型薄膜晶体管或PMOS构成;在驱动电路区上形成至少一个驱动单元,所述驱动单元包括第一驱动部分、第二驱动部分和第三驱动部分;在第一驱动部分上形成LDD型NMOS,在第二驱动部分上形成GOLDD型TFT,和在第三驱动部分上形成PMOS,同时,通过将LDD型NMOS与PMOS配对形成第一CMOS和通过将GOLDD型TFT与PMOS配对形成第二CMOS。
很显然,以上的一般性描述和下面的详细说明都是示例性和解释性的,其意在对要求保护的发明提供进一步的解释。
附图说明
附图表示的是本发明的实施例而且与说明书一起用于解释本发明的原理,所述附图有助于进一步理解本发明,其与说明书相结合并构成说明书一部分。附图中:
图1A到图1F表示现有技术中制造GOLDD型TFT的工序;
图2是表示本发明所述阵列基板的平面图;和
图3A到图3F表示制造本发明所述GOLDD型TFT、LDD型TFT和PMOS的工序;和
图4是表示实验结果的曲线图,该图示出了各种漏电压和LDD型以及GOLDD型TFT的电迁移率,其中沟道的宽度和长度分别设为4μm,而LDD区的长度为1.5μm。
具体实施方式
下面将详细说明本发明的优选实施例,这些实施例的实例示于附图中。
通常,液晶显示板包括阵列基板和滤色片基板,其中所述阵列基板上设有布置成矩阵的单元象素,而滤色片基板面对阵列基板设置。将液晶填充到阵列基板和滤色片基板之间的间隙中。将阵列基板分成形成单元象素的图像显示单元和向图像显示单元提供驱动信号的驱动电路单元。
图2表示本发明所述液晶显示器件中阵列基板的结构。如图2所示,图像显示单元201形成在基板200的预定位置上,而设有不同驱动电路的驱动电路单元202位于图像显示单元201的外侧。
特别是,通过制成多晶硅TFT而发展了在同一基板上形成驱动显示区的驱动电路单元和显示图像的显示区的SOG(硅玻璃)技术。因此,简化了制造液晶显示板的工序,这使得有可能利用SOG技术制造更小巧的液晶板。该工序的主要因素之一是用多晶硅作为TFT的沟道。多晶硅相对于非晶硅来说具有极好的导电性。因此,用将多晶硅作为沟道的多晶硅TFT形成驱动电路单元和显示区的开关器件。
可以选择性地使用P型TFT或N型TFT作为显示区的开关器件。使用将NMOS和PMOS配对的CMOS(互补金属氧化物半导体)作为驱动电路单元的驱动器件。具体地说,NMOS是LDD型多晶硅TFT,其用于控制因载流子引起的漏电流。
驱动电路单元可以采用CMOS作为驱动器件。在此,可以用GOLDD型TFT而不是用LDD型NMOS来形成CMOS。也就是说,在驱动电路单元中可以将CMOS设计成LDD型TFT+PMOS和GOLDD型TFT+PMOS的组合形式,以此来防止漏电流同时最大程度地减小驱动电路单元的尺寸。
如图2中所示,阵列基板200的驱动电路单元202包括用于向显示区201的栅线提供栅信号的栅驱动器203和用于向数据线提供数据信号的数据驱动器204。形成在显示区201内的数据线与栅线垂直交叉。两驱动器203和204与显示区201相邻设置。
驱动电路单元202进一步包括时序控制器205,该控制器接收从外部输入的信号并产生供给栅驱动器和数据驱动器的控制信号。为了将产生的控制信号提供给栅驱动器和数据驱动器,需要设置一将外部输入的DC电压转换成驱动液晶显示板所需的DC电压的DC-DC转换器,将从外部输入的数字信号转换成模拟信号的DA(数字一模拟)转换器,伽玛电压发生器和调节公共电压的公共电压(Vcom)驱动器。CMOS构成了驱动电路单元中的不同器件。
在形成CMOS时,由采用GOLDD型TFT的CMOS形成以较高电压工作的驱动器件从而防止通常在高压下工作时产生的漏电流。由采用LDD型NMOS的CMOS构成以较低电压工作的驱动器件。因此,可实现驱动的可靠性并使面积减小。
例如,栅驱动器内的输出缓冲块、驱动电路单元中的电平移位器、显示区内的象素开关TFT和用大于10V的高压驱动的所有其他器件均由采用GOLDD型TFT的CMOS构成。另一方面,时序控制器、数据驱动器内的移位寄存器、DC-DC转换器、Vcom驱动器和用小于10V的低压驱动的所有其他器件均由采用LDD型TFT的CMOS构成。使用这些结构,驱动电路单元可以利用具有减小面积效果的LDD型TFT和具有高可靠性的GOLDD型TFT在可靠性和减小面积方面达到最佳效果。
下面将参照图3A到图3F说明驱动电路单元中CMOS的制造工序。
本发明所述的驱动电路单元使用了一将LDD型NMOS和PMOS配对的CMOS,和另一将GOLDD型TFT和PMOS配对的CMOS。做为参照,下面将说明LDD型NMOS、GOLDD型TFT和PMOS的制造工序。
首先,参照图3A,在透明基板301的预定区域(即,LDD型TFT区L,GOLDD型TFT区G和PMOS区P)上分别形成有源层302a、302b和302c。
通过用PECVD(等离子体增强化学气相沉积)法在基板301上形成非晶硅层并用光掩模工序对该非晶硅层构图来完成形成有源层302a、302b和302c的工序。换句话说,形成有源层302a、302b和302c的工序包括的步骤有:用PECVD法在基板301上沉积非晶硅层、在非晶硅层上涂敷光刻胶(未示出),用掩模使光刻胶曝光和显影,用显影的光刻胶图案对非晶硅构图。
如图3B所示,在形成有源层302a、302b和302c之后,通过光掩模工序在有源层302a、302b和302c上形成光刻胶图案304。光刻胶图案304在LDD型TFT区L和GOLDD型TFT区G上限定了有源层302a和302b的沟道区,并覆盖了PMOS区上的整个有源层302c。有源层302a和302b上的光刻胶图案304覆盖有源层302a和302b的各沟道区303c并暴露剩余区域。
之后,用光刻胶图案304作为杂质阻挡掩模注入低浓度杂质离子。可以用第五族元素例如磷(P)作为注入的杂质离子。在离子注入的过程中,将低浓度杂质离子注入LDD型TFT区L和GOLDD型TFT区G上的有源层302a和302b的暴露部分中,即,没有被光刻胶304盖住的区域。因此,没有杂质离子注入到PMOS区P上的有源层302c中,这是因为该部分被光刻胶304覆盖。
接着,如图3C所示,用PECVD法在整个有源层302a、302b和302c上形成用二氧化硅膜(SiO2)制成的栅绝缘层305。在栅绝缘层305上形成例如铝(Al)或类似物的金属层。通过光刻工序,在金属层上形成栅极306、307和308。在GOLDD型TFT区G上形成的栅极307比在LDD型TFT区L上形成的栅极306大。这样便在GOLDD型TFT区G的栅极307下方形成低浓度杂质区。
随后,如图3D所示,在栅极306和308上形成光刻胶图案309a和309b。在此,光刻胶图案309a覆盖整个栅极306和LDD型TFT区L上的一部分低浓度杂质区303a和303b。在PMOS区P上形成覆盖整个PMOS区的光刻胶图案309b。在GOLDD型TFT区G上不形成光刻胶图案。
接下来,将高浓度杂质离子注入到LDD型TFT区L和GOLDD型TFT区G上暴露的低浓度杂质区303a和303b。因此,在LDD型TFT区L上分别形成高浓度杂质区310b和310c,以及源区和漏区。在沟道的相邻区域形成LDD区310a。此外,在GOLDD型TFT区G的低浓度杂质区303a和303b中分别形成高浓度杂质区311b和311c,以及源区和漏区。栅极307下方的低浓度杂质区311a构成LDD区311a。注入的高浓度杂质离子可以是第五族元素,例如磷(P)等。在通过注入高浓度杂质离子形成LDD型TFT区L和GOLDD型TFT区G的源区和漏区的同时,可以用光刻胶覆盖PMOS区P上的有源层以防止杂质注入该区。
下面,如图3E所示,用光刻胶图案312覆盖LDD型TFT区L和GOLDD型TFT区G。在此,PMOS区P未被光刻胶覆盖。
此后,用光刻胶312作为阻挡掩模,在这些区域中注入第三族元素例如硼(B)等高浓度杂质离子。此时,将高浓度P型杂质离子注入到PMOS区P的源区和漏区313a和313b中从而形成PMOS。通过这些工序,形成LDD型NMOS,GOLDD型TFT和PMOS。如上所述,在用小于10V驱动的低压驱动器件区内形成LDD型NMOS,而在用大于10V驱动的较高电压驱动器件区内形成GOLDD型TFT。
接着,如图3F所示,通过将LDD型NMOS和PPMOS配成一对形成一CMOS,而同时通过将GOLDD型TFT和PMOS配成一对形成另一CMOS。图3F是将GOLDD型TFT与PMOS相连的CMOS结构的实例。
在制成TFT之后,在整个基板上形成绝缘层314,并在绝缘层314上形成用于暴露TFT源区和漏区的接触孔。
随后,形成通过接触孔与源区和漏区连接的源极320和漏极321。在形成源极320和漏极321的步骤中,形成将PMOS上的漏极313b和GOLDD型TFT上的漏极311c相连的公用漏极315。
然后,在源极和漏极上形成钝化层317,以及与公用漏极315相连的漏极连接端子316。而且,可以在制造驱动电路单元中CMOS工序的同时,形成作为显示区开关器件的TFT。可以选择性地用PMOS或NMOS形成显示区内的TFT。此外,当用高电压驱动图像显示单元的开关器件时,可以用具有极高可靠性的GOLDD型TFT作为开关器件。因此,可以得到既包含LDD型TFT又包含GOLDD型TFT的由驱动电路单元集成的液晶板。
在制造本发明所述由驱动电路单元集成的液晶板时,在用较高驱动电压驱动的器件中形成采用GOLDD型TFT的CMOS,而在用较低驱动电压驱动的器件中形成采用LDD型TFT的另一CMOS。因此,能够制造出既满足减小驱动电路单元面积又具有可靠性的驱动电路单元集成的液晶板。此外,由于是在不增加额外掩模工序的情况下完成这些工序,所以提高了液晶板的生产效率。
按照本发明,在位于驱动电路单元内的TFT中,用大于10V的高电压驱动GOLDD型TFT,而用小于10V的低电压驱动LDD型TFT,这主要基于以下考虑。
图4是表示实验结果的曲线图,其示出了LDD型TFT和GOLDD型TFT中漏电压和电迁移率的变化,其中将沟道的宽度和长度分别设为4μm,而将LDD区的长度设为1.5μm。
如图所示,通过比较LDD型TFT和GOLDD型TFT的电迁移率变化可知,当漏电压Vd大于10V时,即,当电迁移率的变化超过7%时,LDD型TFT的电迁移率发生急剧变化,而GOLDD型TFT的电迁移率则很稳定。因此,优选地,在需要高驱动电压的电路中采用由具备高可靠性的GOLDD型器件和PMOS构成的CMOS,而在需要低驱动电压的电路中采用由尺寸小于GOLDD型器件的LDD器件和PMOS构成的CMOS。
考虑到漏电压和电迁移率的这些变化特性,当多晶硅TFT的电迁移率变化小于7%时,选择LDD型TFT,而当电迁移率的变化大于7%时,选择GOLDD型TFT,由此使得制造出的由驱动电路集成的液晶显示板同时满足了减小尺寸和驱动电路单元可靠的要求。
对于本领域的普通技术人员来说很显然,在不脱离本发明的构思和范围的情况下,可以对本发明的液晶显示器件及其制造方法做出各种改进和改变。因此,本发明意在覆盖那些落入所附权利要求及其等同物所及范围内的改进和改变。

Claims (13)

1.一种液晶显示器件,包括:
显示区,所述显示区上设有布置成矩阵形式的单元象素;
开关器件,在所述显示区中形成,所述开关器件根据驱动电压的不同由重叠栅极的轻掺杂漏极型薄膜晶体管或轻掺杂漏极型薄膜晶体管或PMOS构成;和
驱动电路单元,所述驱动电路单元具有至少一轻掺杂漏极型薄膜晶体管和重叠栅极的轻掺杂漏极型薄膜晶体管。
2.根据权利要求1所述的器件,其特征在于,所述驱动电路单元包括:
时序控制器,所述时序控制器产生控制栅驱动器和数据驱动器的控制信号;
DC-DC转换器,所述转换器将DC电压转换成驱动图像显示单元所需的DC电压;
数据驱动器,所述数据驱动器利用从时序控制器输入的控制信号,向显示区中的至少一条数据线提供数据信号;
栅驱动器,所述栅驱动器利用从时序控制器输入的控制信号,向显示区中的至少一条栅线提供栅信号;
公共电压驱动器,所述公共电压驱动器驱动公共电极的电压,所述公共电极与在图像显示单元中形成的象素电极一起在液晶上形成电场。
3.根据权利要求2所述的器件,其特征在于,所述时序控制器、DC一DC转换器和公共电压驱动器中的至少一个设有包含轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体。
4.根据权利要求2所述的器件,其特征在于,所述数据驱动器包括:
移位寄存器,所述移位寄存器存储从时序控制器输入的控制信号;
数一模转换器,所述数一模转换器将从移位寄存器输入的控制信号转换成图像显示单元所需要的模拟信号;和
输出缓冲块,所述输出缓冲块将从数一模转换器输入的控制信号送到数据线;并且
其中栅驱动器包括:
移位寄存器;
电平移位器,所述电平移位器将从移位寄存器输入的控制信号移到特定电平;和
输出缓冲块,所述输出缓冲块将电平移位器输入的控制信号送到图像显示单元的栅线上。
5.根据权利要求4所述的器件,其特征在于,所述栅驱动器和数据驱动器中的输出缓冲块以及栅驱动器中的电平移位器上均设有包含重叠栅极的轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体。
6.根据权利要求4所述的器件,其特征在于,所述栅驱动器和数据驱动器中的移位寄存器均设有包含轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体。
7.根据权利要求1所述的器件,其特征在于,所述驱动电路单元中的薄膜晶体管是多晶硅薄膜晶体管,其中沟道的宽度和长度为4μm,而轻掺杂漏极区的长度为1.5μm,当多晶硅薄膜晶体管的电迁移率变化小于7%时,驱动电路单元设有包含轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体,而当多晶硅薄膜晶体管的电迁移率变化大于7%时,驱动电路单元设有包含重叠栅极的轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体。
8.一种液晶显示器件,包括:
图像显示单元,所述图像显示单元上设有布置成矩阵形式的单元象素;
开关器件,在所述显示区中形成,所述开关器件根据驱动电压的不同由重叠栅极的轻掺杂漏极型薄膜晶体管或轻掺杂漏极型薄膜晶体管或PMOS构成;和
驱动电路单元,所述驱动电路单元根据驱动电压的不同而由包含轻掺杂漏极型薄膜晶体管的第一互补金属氧化物半导体和包含重叠栅极的轻掺杂漏极型薄膜晶体管的第二互补金属氧化物半导体构成。
9.根据权利要求8所述的器件,其特征在于,所述包含重叠栅极的轻掺杂漏极型薄膜晶体管的第二互补金属氧化物半导体形成在驱动电压大于10V的驱动电路单元的高电压部分,而包含轻掺杂漏极型薄膜晶体管的第一互补金属氧化物半导体形成在驱动电压低于10V的驱动电路单元的低电压部分。
10.根据权利要求8所述的器件,其特征在于,所述驱动电路单元包括:
时序控制器、设在数据驱动器内的移位寄存器、数一模转换器和公共电压驱动器,其中的至少一个由包含轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体构成;和
栅驱动器内的输出缓冲器和电平移位器均由包含重叠栅极的轻掺杂漏极型薄膜晶体管的互补金属氧化物半导体构成。
11.一种制造由驱动电路单元集成的液晶显示器件的方法,所述方法包括的步骤有:
在基板上设计显示区和驱动电路区;
在显示区上形成矩阵形式的单元象素;
在所述显示区中形成开关器件,所述开关器件根据驱动电压的不同由重叠栅极的轻掺杂漏极型薄膜晶体管或轻掺杂漏极型薄膜晶体管或PMOS构成;
在驱动电路区上形成至少一驱动单元,所述驱动单元包括第一驱动部分、第二驱动部分和第三驱动部分;
在第一驱动部分上形成轻掺杂漏极型NMOS,在第二驱动部分上形成重叠栅极的轻掺杂漏极型薄膜晶体管,和在第三驱动部分上形成PMOS,以及
同时通过将轻掺杂漏极型NMOS与PMOS配对形成第一互补金属氧化物半导体和通过将重叠栅极的轻掺杂漏极型薄膜晶体管与PMOS配对形成第二互补金属氧化物半导体。
12.根据权利要求11所述的方法,其特征在于,所述在显示区内形成开关器件的步骤与形成第一和第二互补金属氧化物的步骤同时进行。
13.根据权利要求11所述的方法,其特征在于,在驱动电压大于10V的驱动电路区的高电压部分形成第二互补金属氧化物半导体,而在驱动电压小于10V的驱动电路区的低电压部分形成第一互补金属氧化物半导体。
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Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101382557B1 (ko) 2007-06-28 2014-04-08 삼성디스플레이 주식회사 표시 장치
WO2010050160A1 (ja) 2008-10-27 2010-05-06 シャープ株式会社 半導体装置及びその製造方法
TWI408471B (zh) * 2009-11-23 2013-09-11 Au Optronics Corp 顯示裝置
CN201725288U (zh) * 2010-05-27 2011-01-26 深圳富泰宏精密工业有限公司 触控笔
KR20120140474A (ko) 2011-06-21 2012-12-31 삼성디스플레이 주식회사 유기 발광 디스플레이 장치와, 이의 제조 방법
CN103441128B (zh) * 2013-05-27 2016-01-20 南京中电熊猫液晶显示科技有限公司 一种tft阵列基板及其制造方法
KR102235421B1 (ko) * 2013-12-06 2021-04-01 엘지디스플레이 주식회사 어레이 기판 및 그 제조방법
KR102060377B1 (ko) * 2014-01-27 2020-02-11 한국전자통신연구원 디스플레이 소자, 그 제조 방법, 및 이미지 센서 소자의 제조방법
CN103985716B (zh) * 2014-05-06 2018-03-27 深圳市华星光电技术有限公司 薄膜晶体管阵列基板制造方法及薄膜晶体管阵列基板
CN112635571A (zh) * 2019-09-24 2021-04-09 乐金显示有限公司 薄膜晶体管及其制造方法及包括该薄膜晶体管的显示设备

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1031873A2 (en) * 1999-02-23 2000-08-30 Sel Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
US20020121639A1 (en) * 2001-03-02 2002-09-05 So Woo Young Thin film transistor and manufacturing method thereof, and active matrix display device and manufacturing method thereof

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5198379A (en) * 1990-04-27 1993-03-30 Sharp Kabushiki Kaisha Method of making a MOS thin film transistor with self-aligned asymmetrical structure
US5521107A (en) * 1991-02-16 1996-05-28 Semiconductor Energy Laboratory Co., Ltd. Method for forming a field-effect transistor including anodic oxidation of the gate
US5854494A (en) * 1991-02-16 1998-12-29 Semiconductor Energy Laboratory Co., Ltd. Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors
US5485019A (en) * 1992-02-05 1996-01-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6808965B1 (en) * 1993-07-26 2004-10-26 Seiko Epson Corporation Methodology for fabricating a thin film transistor, including an LDD region, from amorphous semiconductor film deposited at 530° C. or less using low pressure chemical vapor deposition
JPH08220505A (ja) * 1995-02-20 1996-08-30 Sanyo Electric Co Ltd 液晶表示装置
JPH09191111A (ja) * 1995-11-07 1997-07-22 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP3716580B2 (ja) * 1997-02-27 2005-11-16 セイコーエプソン株式会社 液晶装置及びその製造方法、並びに投写型表示装置
TW379360B (en) * 1997-03-03 2000-01-11 Semiconductor Energy Lab Method of manufacturing a semiconductor device
JPH10268254A (ja) * 1997-03-26 1998-10-09 Seiko Epson Corp 液晶表示装置
JP3544280B2 (ja) * 1997-03-27 2004-07-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3794802B2 (ja) 1997-10-28 2006-07-12 株式会社半導体エネルギー研究所 表示パネル駆動回路および表示パネル
JP3702096B2 (ja) * 1998-06-08 2005-10-05 三洋電機株式会社 薄膜トランジスタ及び表示装置
JP2001051292A (ja) * 1998-06-12 2001-02-23 Semiconductor Energy Lab Co Ltd 半導体装置および半導体表示装置
JP4202502B2 (ja) 1998-12-28 2008-12-24 株式会社半導体エネルギー研究所 半導体装置
JP4637315B2 (ja) * 1999-02-24 2011-02-23 株式会社半導体エネルギー研究所 表示装置
US6362507B1 (en) * 1999-04-20 2002-03-26 Semiconductor Energy Laboratory Co., Ltd. Electro-optical devices in which pixel section and the driver circuit are disposed over the same substrate
JP2001007342A (ja) * 1999-04-20 2001-01-12 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US6512504B1 (en) * 1999-04-27 2003-01-28 Semiconductor Energy Laborayory Co., Ltd. Electronic device and electronic apparatus
JP3983460B2 (ja) * 1999-07-06 2007-09-26 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6777254B1 (en) * 1999-07-06 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
JP4801241B2 (ja) * 1999-07-22 2011-10-26 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP3688548B2 (ja) * 2000-03-14 2005-08-31 シャープ株式会社 画像表示装置
JP4712155B2 (ja) * 2000-05-02 2011-06-29 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4352598B2 (ja) * 2000-08-24 2009-10-28 ソニー株式会社 液晶表示装置および携帯端末
TW525216B (en) * 2000-12-11 2003-03-21 Semiconductor Energy Lab Semiconductor device, and manufacturing method thereof
US7189997B2 (en) * 2001-03-27 2007-03-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US6740938B2 (en) * 2001-04-16 2004-05-25 Semiconductor Energy Laboratory Co., Ltd. Transistor provided with first and second gate electrodes with channel region therebetween
JP4439766B2 (ja) 2001-08-02 2010-03-24 シャープ株式会社 薄膜トランジスタ装置及びその製造方法
JP4377139B2 (ja) * 2003-02-19 2009-12-02 株式会社 日立ディスプレイズ 表示装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1031873A2 (en) * 1999-02-23 2000-08-30 Sel Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
US20020121639A1 (en) * 2001-03-02 2002-09-05 So Woo Young Thin film transistor and manufacturing method thereof, and active matrix display device and manufacturing method thereof

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