CN100369532C - 微型组件及其制造方法 - Google Patents

微型组件及其制造方法 Download PDF

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Publication number
CN100369532C
CN100369532C CNB2004100831181A CN200410083118A CN100369532C CN 100369532 C CN100369532 C CN 100369532C CN B2004100831181 A CNB2004100831181 A CN B2004100831181A CN 200410083118 A CN200410083118 A CN 200410083118A CN 100369532 C CN100369532 C CN 100369532C
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China
Prior art keywords
raw material
material sheet
recess
ceramic
ceramic substrate
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CNB2004100831181A
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CN1604721A (zh
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齐藤隆一
加贺田博司
胜又雅昭
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00—Metal working
    • Y10T29/43—Electric condenser making
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/43—Electric condenser making
    • Y10T29/435—Solid dielectric type
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
    • Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating

Abstract

本发明揭示一种微型组件，包括陶瓷基板、设在陶瓷基板上的第一和第二电极、具有与第一和第二电极分别连接的第三和第四电极的器件、及充填入器件和陶瓷基板之间的空间中的树脂。陶瓷基板具有形成凹部的面。第一和第二电极将凹部夹在其间，设置在陶瓷基板的面上。器件设在陶瓷基板凹部的上方，并在和陶瓷基板之间形成包括凹部在内的空间。充填了树脂的空间包括该凹部。这种微型组件所安装的器件其安装强度提高，基板的电极间不会短路，可靠性高。

Description

微型组件及其制造方法
技术领域
本发明涉及在有布线的陶瓷基板上安装IC、SAW滤波器、电阻器、电容器、线圈等电子器件的微型组件及其制造方法。
背景技术
在有布线的陶瓷基板上安装IC、SAW滤波器、各种电阻器、电容器、线圈等电子器件的陶瓷微型组件如特开平3-205857号公报、特开平4-252041号公报所示。
图18为现有的陶瓷微型组件50的剖面图。陶瓷微型组件50具有电容器、线圈等器件60，并具有IC、SAW滤波器等有源器件80、及陶瓷基板70。陶瓷基板70包括多个内部电极51、与它们连接用的通路电极52、安装有源器件80和器件60用的焊盘电极55、及把陶瓷微型组件50安装在母板上用的背面电极56。器件60的端面电极62和焊盘电极55通过焊料等导电接合剂61连接，有源器件80的背面电极81和焊盘电极55通过导电接合剂61连接。安装有源器件80时，为确保可靠性，在基板70和有源器件80之间填入树脂90。
现有的微型组件50中，有源器件80和器件60安装在烧结后的陶瓷基板70上，根据需要利用树脂91将它们浇注成形，得到陶瓷微型组件50。
现有的陶瓷微型组件50中，在器件60具有所谓的1005尺寸、或0603尺寸的微小尺寸时，为了避免安装时电极间短路，导电接合剂61涂布的量要少。在器件60安装后，用树脂91将器件60浇注的工序中，有的情况下树脂91的树脂材料未充分浸透器件60的下部，产生空间92。当陶瓷微型组件50安装在母板上时，焊料等导电接合剂61就会熔融，流向器件60和陶瓷基板70之间的空间92。其结果，在焊盘电极55之间发生短路，陶瓷微型组件50的功能受损，无法得到充够的可靠性。
在有源器件80安装在基板70上的情况下，为了确保安装强度及可靠性，器件80和基板70间填入树脂90。在器件80和基板70之间如树脂90不能将所有的间隙全部填没，则不能获得足够的安装强度及可靠性。
发明内容
本发明第一方面的微型组件包括，包括具有形成凹部、且包围所述凹部的整个外周的第一面、所述凹部的底部位于比所述第一面更内部的陶瓷基板；将所示凹部夹在其间、并设置在所述陶瓷基板的所述第一面上的第一和第二电极；有分别连接所述第一和第二电极的第三和第四电极并设置在所述陶瓷基板的所述凹部的上方、而且在和所述陶瓷基板之间形成包括所述凹部在内的空间的器件；及充填入所述器件和所述陶瓷基板之间的所述空间用的树脂。
本发明第二方面的微型组件的制造方法，包括准备具有形成凹部、且包围所述凹部的整个外周的第一面、所述凹部的底部位于比所述第一面更内部的的陶瓷基板的步骤；将所述凹部夹在其间、在所述陶瓷基板的所述第一面上设置第一和第二电极的步骤；准备具有本体及第三和第四电极的器件的步骤；在所述陶瓷基板所示凹部的上方设置所述器件，使得在所述第一和第二电极的上方将所述第一和第二电极分别与第三和第四电极连接、并在和所述陶瓷基板之间形成包括所述凹部在内的空间的步骤；及将树脂充填入所述器件和所述陶瓷基板之间的所述空间中的步骤。
这种微型组件，所安装的器件其安装强度大，在基板的电极间不会发生短路，可靠性高。
附图说明，
图1为本发明实施形态的陶瓷微型组件的剖面图。
图2为实施形态的陶瓷微型组件的陶瓷基板的俯视图。
图3为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图4为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图5为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图6为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图7为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图8为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图9为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图10为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图11为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图12为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图13为用于说明实施形态的陶瓷微型组件的制造方法的剖面图。
图14为用于说明实施形态的陶瓷微型组件的其它制造方法的剖面图。
图15为用于说明实施形态的陶瓷微型组件的其它制造方法的剖面图。
图16为用于说明实施形态的陶瓷微型组件的其它制造方法的剖面图。
图17为用于说明实施形态的陶瓷微型组件的又一其它制造方法的剖面图。
图18为现有陶瓷微型组件的剖面图。
具体实施方式
图1为本发明实施形态的陶瓷微型组件1的剖面图。图2为微型组件1的陶瓷基板13的俯视图。陶瓷微型组件1有陶瓷基板13。陶瓷基板13具有在其内部构成层状的内部电极2、用于连接内部电极2之间的通路电极3、及绝缘材料即陶瓷材料14。片状电阻器、层叠陶瓷电容器、片状线圈等器件6具有本体6A和端面电极15。IC、SAW滤波器等有源器件8具有本体8A和凸点电极16。器件6的端面电极15和有源器件8的凸点电极16用焊剂7与焊盘电极4连接，器件6、8设在基板13的表面13A上。将陶瓷微型组件1装在母板40上用的背面电极5设在陶瓷基板13的下底面13B上。凹部10B形成于与器件6对向的陶瓷基板13的表面，凹部10A形成于与有源器件8对向的陶瓷基板13的表面。器件6和基板13之间充填环氧树脂等绝缘性树脂11，在有源器件8和基板13之间充填树脂9。器件6、有源器件8、和陶瓷基板13的安装器件6、有源器件8的表面被浇注树脂12覆盖。
陶瓷基板13的内部电极2及通路电极3要和陶瓷基板13同时烧结，因为最好尽可能是高电导率的材料，所以用银糊。陶瓷基板13的陶瓷材料14由于内部电极2采用Ag，故而需要约900℃才能烧结。实施形态中，陶瓷材料14由Al2O3及玻璃组成的玻璃陶瓷组成物构成。内部电极2和陶瓷材料14也可以利用上述以外的材料构成。
浇注树脂12由环氧树脂、酚醛树脂、或环氧硅树脂等绝缘树脂构成，能确保微型组件1的器件60、80的安装强度及耐冲击性。焊料7也可以是采用导电树脂的导电接合剂。
器件6和有源器件8安装在陶瓷基板13上，并电连接。器件6安装在陶瓷基板13的焊盘电极4上后，将树脂11填入元器件6和陶瓷基板13之间的包含凹部10B在内的空间10C。利用凹部10B，树脂11能容易填入器件6和陶瓷基板13之间。通过这样，由于器件6和陶瓷基板13之间无间隙产生，所以，在微型组件1安装在母板40上时，即使进行加热，焊料7也不会流出，能防止电极4间短路。尤其是器件6小的时候，由于电极4间的间隙狭窄，故凹部10B对于充填树脂11是相当有用的。
在安装有源器件8时，为了确保安装强度及安装可靠性，在器件8和基板13之间充填由环氧树脂等绝缘树脂组成的树脂9。树脂9也可由其它树脂构成。尽管器件8和基板13间的间隔狭窄，但凹部10A仍能十分容易地充填树脂9，能防止器件8和基板13之间产生空隙。由此，能获得安装强度及安装可靠性俱佳的陶瓷微型组件1。
为了使器件6和有源器件8的下部稳定充填树脂11、9，如图2所示，器件6和有源器件8的对向焊盘电极4之间的距离W1和凹部10A、10B的宽度W2为W1≥W2，最好凹部10A、10B的深度在10μm以上。通过这样，能确实地防止在将器件6装在基板13上时由于焊料的回流、或导电接合剂的流出而造成电极4间短路、或充填在有源器件8之下的树脂9的量不足，能获得器件6、8的安装强度大、高可靠性的陶瓷微型组件1。
图3～图13为表示陶瓷基板13的制造方法的剖面图。
陶瓷基板13系烧结Al2O3和玻璃粉末组成的玻璃陶瓷原料片后而得。作为玻璃粉末可以从SiO2、B2O3、Al2O3、CaCO3、SrCO3、BaCO3、La2O3、ZrO2、TiO2、MgO、PbO、ZnO、Li2CO3、Na2CO3、及K2CO3中选择适当的组份而构成。通过在Al2O3和玻璃粉末中加入聚乙烯醇缩丁醛系接合剂、增塑剂、有机溶剂并使其分散得到浆料。还有，上述组成是一个示例，也可以用除此以外其它的组成来形成浆料。
用刮片法等将所得的浆料涂布于基膜21上，并使其干燥，如图3所示，在PET膜构成的基膜21上形成所需的厚度和面积的陶瓷原料片20。基膜21也可由PET膜以外的材料构成。
然后如图4所示，用冲孔或激光加工等方法，在陶瓷原料片20上形成贯穿孔22。还择需在基膜上形成层叠用的导向孔27。
然后如图5所示，将银糊等导电糊充填入贯穿孔22，形成通路电极23。此后，如图6所示，利用利网印刷形成内部电极24。内部电极24是通过印刷以Ag为主成分的导电糊形成，但只要能和陶瓷原料片20同时烧结，则也可以用除Ag以外的导电糊。
此后如图7所示，通过使导向销27穿过导向孔27，从而使分别具有原料片20A、通路电极23、和内部电极24的多片基膜21位置对准。然后，将原料片20A放在层叠板25上。此后，通过使导向销26穿过导向孔27而对准位置，再将原料片20B放在层叠板25上已放置的原料片20A上，以后同样地将原料片20C放在原料片20B上，然后又将原料片20D放在原料片20C上。
然后形成图8示出的包括陶瓷原料片20A～20D在内的层叠体块28。层叠体块28的表层形成焊盘电极4。导向孔27形成于基膜21，但也可形成于原料片20A～20D。使陶瓷原料片20A～20D的密度均匀，为了不使陶瓷原料片20A～20D之间分层，在层叠体块28上施加压力F，使陶瓷原料片20A～20D压紧。
然后，在350～600℃下对层叠体块28脱脂，此后在850～950℃下烧结，如图9所示，得到具有用Ag构成的内部电极24的陶瓷基板13。
然后如图10所示，用激光29在陶瓷基板13的表面焊盘电极4之间的部分形成凹部30。利用激光29能在短时间内形成凹部30。
此后，用焊料将器件6的端面电极15和电极4连接后，在凹部30中填入环氧树脂、硅树脂等树脂11后，再使其固化。由此，在这道工序以后，在将其它的元器件装在基板13上时即使进行加热，仍能利用充填在凹部30的树脂11不让焊料7流向电极4之间，防止电极4间短路。
在安装有源器件8时，为确保安装强度及安装可靠性，在基板13上将凹部30形成于有源器件8的下面后将树脂9充填入凹部30使其固化。由此，树脂9能无空隙地充填入器件8和基板13之间，能得到安装强度及可靠性俱佳的陶瓷微型组件1。
在形成焊盘电极4时，如图11所示，形成作为连续的大的焊盘电极4A，并将陶瓷基板13烧结。此后，如图12所示，用激光29在基板13上形成凹部30，同时分割焊盘电极4A，凹部30和电极4能同时形成。由此，即使在焊盘电极4极其小时，也不必过分地确保导电糊的不被擦伤、或印刷精度等，能在焊盘电极4之间高精度地形成凹部30。
然后如图13所示，安装器件6及有源器件8(未图示)后，利用环氧树脂等树脂材料将树脂11填入器件6的下面及凹部30。此后，形成浇注树脂12后，用划片等切断成规定的尺寸，得到陶瓷微型组件1。
陶瓷基板13上的电极4、4A可以和陶瓷基板13同时烧结，也可以在陶瓷基板13烧结之后再烧结。
图14至图16为说明实施形态的陶瓷微型组件的其它制造方法用的剖面图。在图4所示的陶瓷原料片上利用冲孔或激光的激光加工形成贯穿孔22时，如图14所示，在陶瓷基板13的最表层的陶瓷原料片20D上，同时在焊盘电极4之间形成凹部10A、10B的部分上形成贯穿孔22A。此后，和图5～图11一样，如图15所示，在贯穿孔22中形成通路电极23，如图16所示，形成内部电极24，再将原料片20A～20D层叠在一起后烧结。由此，层叠体块28上贯穿孔22A成为凹部10A、10B。此后，如图13所示，安装上器件6、8，形成树脂9、10和浇注树脂12得到陶瓷微型组件1。通过这样，不在陶瓷原料片20A～20D烧结后形成凹部，而能形成凹部10A、10B。
还有，也可以通过对烧结前的层叠体块28进行激光加工而形成规定凹部30。此后，利用层叠体块28的烧结、器件6及8的安装、树脂9及11和浇注树脂23的形成，得到陶瓷微型组件1。
又如图17所示，在对层叠体块28加压时，通过将金属模具41配置在焊盘电极4之间加压，而在焊盘电极4之间形成凹部30。又如图12所示，在烧结前，可利用激光对层叠体块28在焊盘电极4之间形成凹部30。还有，能在加压前后的无论前或后，利用激光形成凹部30。此后，利用层叠体块28的烧结、器件6及8的安装、树脂9及11和浇注树脂12的形成，能简便而可靠地获得具有在焊盘电极4之间形成的凹部10A、10B的陶瓷微型组件1。

Claims (19)

1.一种微型组件，其特征在于，包括
具有形成凹部、且包围所述凹部的整个外周的第一面、所述凹部的底部位于比所述第一面更内部的陶瓷基板；
将所示凹部夹在其间、并设置在所述陶瓷基板的所述第一面上的第一和第二电极；
有分别连接所述第一和第二电极的第三和第四电极并设置在所述陶瓷基板的所述凹部的上方、而且在和所述陶瓷基板之间形成包括所述凹部在内的空间的器件；及
充填入所述器件和所述陶瓷基板之间的所述空间用的树脂。
2.如权利要求1所述的微型组件，其特征在于，还包括
覆盖所述器件的浇注树脂。
3.如权利要求2所述的微型组件，其特征在于，
所述浇注树脂覆盖所述器件和所述陶瓷基板的所述第一面。
4.如权利要求1所述的微型组件，其特征在于，
所述凹部的深度在10μm以上。
5.如权利要求1所述的微型组件，其特征在于，
所述陶瓷基板还有第二面，还包括设在所述陶瓷基板的所述第二面上的第五电极。
6.一种微型组件的制造方法，其特征在于，包括
准备具有形成凹部、且包围所述凹部的整个外周的第一面、所述凹部的底部位于比所述第一面更内部的陶瓷基板的步骤；
将所述凹部夹在其间、在所述陶瓷基板的所述第一面上设置第一和第二电极的步骤；
准备具有本体及第三和第四电极的器件的步骤；
在所述陶瓷基板所示凹部的上方设置所述器件，使得在所述第一和第二电极的上方将所述第一和第二电极分别与第三和第四电极连接、并在和所述陶瓷基板之间形成包括所述凹部在内的空间的步骤；及
将树脂充填入所述器件和所述陶瓷基板之间的所述空间中的步骤。
7.如权利要求6所述的制造方法，其特征在于，还包括
设置覆盖所述器件和所述陶瓷基板的所述第一面的浇注树脂。
8.如权利要求6所述的制造方法，其特征在于，
所述凹部的深度为10μm以上。
9.如权利要求6所述的制造方法，其特征在于，
所述陶瓷基板还有第二面，还包括在所述陶瓷基板的所述第二面上设置第五电极的步骤。
10.如权利要求6所述的制造方法，其特征在于，
准备所述陶瓷基板的步骤包括
烧结具有与所述陶瓷基板的所述第一面对应的第一面的陶瓷原料片的步骤；及
在所述烧结的陶瓷原料片的所述第一面上形成所述凹部的步骤。
11.如权利要求10所述的制造方法，其特征在于，
在所述烧结的陶瓷原料片的所述第一面形成所述凹部的步骤还包括利用激光在所述烧结的陶瓷原料片的所述第一面上形成所述凹部的步骤。
12.如权利要求6所述的制造方法，其特征在于，
准备具有形成所述凹部的所述第一面的所述陶瓷基板的步骤包括在陶瓷基板上形成所述凹部的步骤，
在所述陶瓷基板的所述第一面上设置所述第一和第二电极的步骤包括
在所述陶瓷基板的所述第一面的所述凹部形成所述第一和第二电极的部分上设置第六电极的步骤；及
和在所述陶瓷基板的所述第一面上形成所述凹部的步骤同时分割所述第六电极而设置所述第一和第二的电极的步骤。
13.如权利要求6所述的制造方法，其特征在于，
准备所述陶瓷基板的步骤包括
准备具有与所述陶瓷基板的所述第一面对应的第一面和所述第一面相反一侧的第二面的第一陶瓷原料片的步骤；
在所述第一原料片的所述第一面上形成与所述陶瓷基板的所述凹部对应的规定凹部的步骤；及
烧结形成所述规定凹部的所述第一陶瓷原料片的步骤。
14.如权利要求13所述的制造方法，其特征在于，
在所述陶瓷原料片的所述第一面上形成所述规定凹部的步骤包括利用激光加工在所述第一陶瓷原料片的所述第一面上形成所述规定凹部的步骤。
15.如权利要求13所述的制造方法，其特征在于，
准备所述陶瓷基板的步骤还包括在具有形成所述规定凹部的所述第一面的所述第一陶瓷原料片的第二面上层叠第二陶瓷原料片的步骤，
烧结形成所述凹部的所述第一陶瓷原料片的步骤包括烧结层叠着所述第二陶瓷原料片的所述第一陶瓷原料片的步骤。
16.如权利要求13所述的制造方法，其特征在于，
准备所述陶瓷基板的步骤包括
将第二陶瓷原料片层叠在所述第一陶瓷原料片的所述第二面上形成层叠体块的步骤；及
对所述层叠体块加压使所述第一陶瓷原料片和所述第二陶瓷原料片压紧的步骤，
在所述第一陶瓷原料片的所述第一面形成所述规定凹部的步骤包括对所述层叠体块加压使所述第一陶瓷原料片和所述第二陶瓷原料片压紧的步骤的同时在所述第一陶瓷原料片的所述第一面形成所述规定凹部的步骤。
17.如权利要求6所述的制造方法，其特征在于，
准备所述陶瓷基板的步骤包括
准备具有与所述陶瓷基板的所述第一面对应的第一面和所述第一面相反一侧的第二面的第一陶瓷原料片的步骤；
在所述第一陶瓷原料片上形成贯穿所述第一陶瓷原料片的所述第一面和所述第二面的第一贯穿孔的步骤；
在与所述凹部对应的部分、在所述第一陶瓷原料片上形成贯穿所述第一陶瓷原料片的所述第一面和所述第二面的第二贯穿孔的步骤；
将导电糊充填入所述第一贯穿孔的步骤；
在所述第一陶瓷原料片的所述第二面上层叠第二陶瓷原料片、形成层叠体块的步骤；及
烧结所述层叠体块的步骤。
18.如权利要求16所述的制造方法，其特征在于，
在所述第一陶瓷原料片上形成所述第一贯穿孔的步骤包括利用冲孔在所述第一陶瓷原料片上形成所述第一贯穿孔的步骤，在所述第一陶瓷原料片上形成所述第二贯穿孔的步骤包括利用冲孔在所述第一陶瓷原料片上形成所述第二贯穿孔的步骤。
19.如权利要求16所述的制造方法，其特征在于，
在所述第一陶瓷原料片上形成所述第一贯穿孔的步骤包括利用激光加工在所述第一陶瓷原料片上形成所述第一贯穿孔的步骤，在所述第一陶瓷原料片上形成所述第二贯穿孔的步骤包括利用激光加工在所述第一陶瓷原料片上形成所述第二贯穿孔的步骤。
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CN103929880A (zh) * 2013-01-10 2014-07-16 元太科技工业股份有限公司 电路基板结构及其制作方法
US9791753B2 (en) 2013-01-10 2017-10-17 E Ink Holdings Inc. Circuit substrate structure and method for manufacturing thereof

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EP1519641A2 (en) 2005-03-30
EP1519641A3 (en) 2005-08-24
CN1604721A (zh) 2005-04-06
US7231712B2 (en) 2007-06-19

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