CN100345256C - 半导体电路器件的制造方法 - Google Patents
半导体电路器件的制造方法 Download PDFInfo
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- CN100345256C CN100345256C CNB200310102320XA CN200310102320A CN100345256C CN 100345256 C CN100345256 C CN 100345256C CN B200310102320X A CNB200310102320X A CN B200310102320XA CN 200310102320 A CN200310102320 A CN 200310102320A CN 100345256 C CN100345256 C CN 100345256C
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- wafer
- semiconductor
- die bonding
- bonding film
- semiconductor wafer
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Dicing (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Die Bonding (AREA)
Abstract
Description
Claims (4)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002310787A JP4471563B2 (ja) | 2002-10-25 | 2002-10-25 | 半導体装置の製造方法 |
JP310787/2002 | 2002-10-25 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNB2007101054598A Division CN100517564C (zh) | 2002-10-25 | 2003-10-24 | 半导体电路器件的制造方法 |
Publications (2)
Publication Number | Publication Date |
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CN1499579A CN1499579A (zh) | 2004-05-26 |
CN100345256C true CN100345256C (zh) | 2007-10-24 |
Family
ID=32289499
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Application Number | Title | Priority Date | Filing Date |
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CNB2007101054598A Expired - Fee Related CN100517564C (zh) | 2002-10-25 | 2003-10-24 | 半导体电路器件的制造方法 |
CNB200310102320XA Expired - Fee Related CN100345256C (zh) | 2002-10-25 | 2003-10-24 | 半导体电路器件的制造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
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CNB2007101054598A Expired - Fee Related CN100517564C (zh) | 2002-10-25 | 2003-10-24 | 半导体电路器件的制造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7122447B2 (zh) |
JP (1) | JP4471563B2 (zh) |
KR (1) | KR101043836B1 (zh) |
CN (2) | CN100517564C (zh) |
TW (1) | TWI316286B (zh) |
Families Citing this family (79)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8049947B2 (en) | 2002-06-10 | 2011-11-01 | E Ink Corporation | Components and methods for use in electro-optic displays |
JP4471563B2 (ja) * | 2002-10-25 | 2010-06-02 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
KR100484088B1 (ko) * | 2002-12-06 | 2005-04-20 | 삼성전자주식회사 | 멀티 칩 패키지용 다이 어태치와 경화 인라인 장치 |
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KR100538158B1 (ko) * | 2004-01-09 | 2005-12-22 | 삼성전자주식회사 | 웨이퍼 레벨 적층 칩 접착 방법 |
US7306971B2 (en) * | 2004-03-02 | 2007-12-11 | Chippac Inc. | Semiconductor chip packaging method with individually placed film adhesive pieces |
US7190058B2 (en) * | 2004-04-01 | 2007-03-13 | Chippac, Inc. | Spacer die structure and method for attaching |
JP2005303218A (ja) * | 2004-04-16 | 2005-10-27 | Renesas Technology Corp | 半導体装置およびその製造方法 |
TW200539357A (en) * | 2004-04-28 | 2005-12-01 | Lintec Corp | Adhering apparatus and adhering method |
KR100539271B1 (ko) * | 2004-07-26 | 2005-12-27 | 삼성전자주식회사 | 휨 방지 재질을 사용하는 반도체 칩의 다이 접착 방법 |
TWI234234B (en) * | 2004-08-09 | 2005-06-11 | Touch Micro System Tech | Method of segmenting a wafer |
JP2006150500A (ja) * | 2004-11-29 | 2006-06-15 | Elpida Memory Inc | レジンボンド砥石およびそれを用いた半導体チップの製造方法 |
US7713846B2 (en) * | 2004-12-29 | 2010-05-11 | Siliconware Precision Industries Co., Ltd. | Process applied to semiconductor |
TWI251924B (en) * | 2004-12-29 | 2006-03-21 | Siliconware Precision Industries Co Ltd | A process applied to semiconductor |
US8124455B2 (en) * | 2005-04-02 | 2012-02-28 | Stats Chippac Ltd. | Wafer strength reinforcement system for ultra thin wafer thinning |
JP2006310846A (ja) * | 2005-04-28 | 2006-11-09 | Ls Cable Ltd | 半導体用ダイシングダイ接着フィルム |
JP5201805B2 (ja) * | 2005-05-31 | 2013-06-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
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JP2007134390A (ja) * | 2005-11-08 | 2007-05-31 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
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US20070144668A1 (en) * | 2005-12-27 | 2007-06-28 | Kabushiki Kaisha Toshiba | Double-side mounting apparatus, and method of manufacturing electrical apparatus |
US8420505B2 (en) * | 2006-03-25 | 2013-04-16 | International Rectifier Corporation | Process for manufacture of thin wafer |
JP2007266557A (ja) * | 2006-03-30 | 2007-10-11 | Renesas Technology Corp | 半導体装置の製造方法 |
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JP2008066653A (ja) * | 2006-09-11 | 2008-03-21 | Tokyo Seimitsu Co Ltd | ウェーハ処理方法およびウェーハ処理装置 |
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US8048777B2 (en) | 2006-09-29 | 2011-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US8017502B2 (en) * | 2006-12-22 | 2011-09-13 | Stats Chippac Ltd. | Wafer system with partial cuts |
US20100317155A1 (en) * | 2007-02-09 | 2010-12-16 | Byoung-Un Kang | Multifunctional die attachment film and semiconductor packaging using the same |
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US20090159703A1 (en) | 2007-12-24 | 2009-06-25 | Dynamics Inc. | Credit, security, debit cards and the like with buttons |
US7960247B2 (en) * | 2008-04-04 | 2011-06-14 | The Charles Stark Draper Laboratory, Inc. | Die thinning processes and structures |
US8017451B2 (en) | 2008-04-04 | 2011-09-13 | The Charles Stark Draper Laboratory, Inc. | Electronic modules and methods for forming the same |
US8273603B2 (en) * | 2008-04-04 | 2012-09-25 | The Charles Stark Draper Laboratory, Inc. | Interposers, electronic modules, and methods for forming the same |
JP5343261B2 (ja) * | 2008-11-18 | 2013-11-13 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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JP5805367B2 (ja) * | 2009-01-30 | 2015-11-04 | 日東電工株式会社 | ダイシングテープ一体型ウエハ裏面保護フィルム |
JP5456441B2 (ja) * | 2009-01-30 | 2014-03-26 | 日東電工株式会社 | ダイシングテープ一体型ウエハ裏面保護フィルム |
JP5456440B2 (ja) | 2009-01-30 | 2014-03-26 | 日東電工株式会社 | ダイシングテープ一体型ウエハ裏面保護フィルム |
US7985662B2 (en) * | 2009-04-14 | 2011-07-26 | Powertech Technology Inc. | Method for manufacturing dies formed with a dielectric layer |
JP2010272682A (ja) * | 2009-05-21 | 2010-12-02 | Denki Kagaku Kogyo Kk | 電子部品の製造装置及びその製造方法 |
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JP2012195388A (ja) * | 2011-03-15 | 2012-10-11 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
US8535983B2 (en) * | 2011-06-02 | 2013-09-17 | Infineon Technologies Ag | Method of manufacturing a semiconductor device |
CH705229B1 (de) * | 2011-07-08 | 2015-06-15 | Esec Ag | Verfahren und Vorrichtung für die Montage von Halbleiterchips. |
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WO2013126349A1 (en) * | 2012-02-20 | 2013-08-29 | Dynamics Inc. | Systems and methods for flexible components, flexible cards, multi-layer boards, multiple sensor detectors, non-time smearing detection mechanisms and electromagnetic field generators for powered cards and devices |
US9916992B2 (en) | 2012-02-20 | 2018-03-13 | Dynamics Inc. | Systems and methods for flexible components for powered cards and devices |
US9064195B2 (en) | 2012-06-29 | 2015-06-23 | Dynamics Inc. | Multiple layer card circuit boards |
US9010647B2 (en) | 2012-10-29 | 2015-04-21 | Dynamics Inc. | Multiple sensor detector systems and detection methods of magnetic cards and devices |
US8809166B2 (en) * | 2012-12-20 | 2014-08-19 | Nxp B.V. | High die strength semiconductor wafer processing method and system |
US10949627B2 (en) | 2012-12-20 | 2021-03-16 | Dynamics Inc. | Systems and methods for non-time smearing detection mechanisms for magnetic cards and devices |
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DE102014111744B4 (de) * | 2014-08-18 | 2022-01-05 | Infineon Technologies Ag | Baugruppe zum handhaben eines halbleiterchips und verfahren zum handhaben eines halbleiterchips |
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US10259207B2 (en) | 2016-01-26 | 2019-04-16 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming separation starting point and separation method |
SG11201910017WA (en) * | 2017-03-28 | 2019-11-28 | Shinkawa Kk | Electronic component mounting device |
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JP7143019B2 (ja) * | 2018-06-06 | 2022-09-28 | 株式会社ディスコ | ウェーハの加工方法 |
JP7154686B2 (ja) * | 2018-06-06 | 2022-10-18 | 株式会社ディスコ | ウェーハの加工方法 |
CN110581057A (zh) * | 2018-06-11 | 2019-12-17 | 江西萨瑞微电子技术有限公司 | 一种单一芯片双信道保护组件的制造方法 |
JP7143023B2 (ja) * | 2018-08-06 | 2022-09-28 | 株式会社ディスコ | ウェーハの加工方法 |
JP7191458B2 (ja) * | 2018-08-06 | 2022-12-19 | 株式会社ディスコ | ウェーハの加工方法 |
US10896840B2 (en) * | 2018-09-19 | 2021-01-19 | Semiconductor Components Industries, Llc | Tape heating methods |
CN111816602A (zh) * | 2020-07-21 | 2020-10-23 | 上海韦尔半导体股份有限公司 | 一种芯片制备方法及芯片 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181197A (ja) * | 1994-12-27 | 1996-07-12 | Hitachi Ltd | 半導体装置の製造方法およびそれに用いるウエハマウンタ |
JPH10112494A (ja) * | 1996-08-09 | 1998-04-28 | Lintec Corp | 接着シート貼付装置 |
JP2002026039A (ja) * | 2000-07-06 | 2002-01-25 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0722358A (ja) | 1993-06-15 | 1995-01-24 | Sharp Corp | 半導体装置の製造方法 |
JP4240711B2 (ja) | 1999-12-27 | 2009-03-18 | 日立化成工業株式会社 | ダイボンディング用接着フィルム及び半導体装置の製造方法 |
JP3827520B2 (ja) * | 2000-11-02 | 2006-09-27 | 株式会社ルネサステクノロジ | 半導体装置 |
US7534498B2 (en) * | 2002-06-03 | 2009-05-19 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
JP3563730B2 (ja) * | 2002-06-07 | 2004-09-08 | 松下電器産業株式会社 | フレキシブルプリント回路基板 |
KR100468748B1 (ko) * | 2002-07-12 | 2005-01-29 | 삼성전자주식회사 | 프리컷 다이싱 테이프와 범용 다이싱 테이프를 웨이퍼에 마운팅할 수 있는 다이싱 테이프 부착 장비 및 이를포함하는 인라인 시스템 |
JP4471563B2 (ja) * | 2002-10-25 | 2010-06-02 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JP3933118B2 (ja) * | 2003-10-02 | 2007-06-20 | ソニー株式会社 | 半導体装置の製造方法および半導体装置の製造装置 |
JP2007048958A (ja) * | 2005-08-10 | 2007-02-22 | Renesas Technology Corp | 半導体装置の製造方法および半導体装置 |
-
2002
- 2002-10-25 JP JP2002310787A patent/JP4471563B2/ja not_active Expired - Fee Related
-
2003
- 2003-10-20 TW TW092129018A patent/TWI316286B/zh not_active IP Right Cessation
- 2003-10-21 US US10/688,992 patent/US7122447B2/en not_active Expired - Fee Related
- 2003-10-24 KR KR1020030074542A patent/KR101043836B1/ko not_active IP Right Cessation
- 2003-10-24 CN CNB2007101054598A patent/CN100517564C/zh not_active Expired - Fee Related
- 2003-10-24 CN CNB200310102320XA patent/CN100345256C/zh not_active Expired - Fee Related
-
2006
- 2006-09-21 US US11/524,294 patent/US7968428B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181197A (ja) * | 1994-12-27 | 1996-07-12 | Hitachi Ltd | 半導体装置の製造方法およびそれに用いるウエハマウンタ |
JPH10112494A (ja) * | 1996-08-09 | 1998-04-28 | Lintec Corp | 接着シート貼付装置 |
JP2002026039A (ja) * | 2000-07-06 | 2002-01-25 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
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CN100517564C (zh) | 2009-07-22 |
US20040097054A1 (en) | 2004-05-20 |
JP4471563B2 (ja) | 2010-06-02 |
TW200415754A (en) | 2004-08-16 |
US20070015342A1 (en) | 2007-01-18 |
JP2004146645A (ja) | 2004-05-20 |
CN1499579A (zh) | 2004-05-26 |
TWI316286B (en) | 2009-10-21 |
CN101064242A (zh) | 2007-10-31 |
US7122447B2 (en) | 2006-10-17 |
KR101043836B1 (ko) | 2011-06-22 |
KR20040036654A (ko) | 2004-04-30 |
US7968428B2 (en) | 2011-06-28 |
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