ATE79201T1 - Metallkontakt mit niedrigem widerstand fuer siliziumanordnungen. - Google Patents

Metallkontakt mit niedrigem widerstand fuer siliziumanordnungen.

Info

Publication number
ATE79201T1
ATE79201T1 AT87303643T AT87303643T ATE79201T1 AT E79201 T1 ATE79201 T1 AT E79201T1 AT 87303643 T AT87303643 T AT 87303643T AT 87303643 T AT87303643 T AT 87303643T AT E79201 T1 ATE79201 T1 AT E79201T1
Authority
AT
Austria
Prior art keywords
silicon
layer
aluminum
metal contact
contact
Prior art date
Application number
AT87303643T
Other languages
English (en)
Inventor
Robin W Cheung
Bernard W K Ho
Hsiang-Wen Chen
Hugo W K Chan
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE79201T1 publication Critical patent/ATE79201T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/019Contacts of silicides

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Contacts (AREA)
  • Conductive Materials (AREA)
AT87303643T 1986-05-02 1987-04-24 Metallkontakt mit niedrigem widerstand fuer siliziumanordnungen. ATE79201T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/858,994 US4796081A (en) 1986-05-02 1986-05-02 Low resistance metal contact for silicon devices
EP87303643A EP0244995B1 (de) 1986-05-02 1987-04-24 Metallkontakt mit niedrigem Widerstand für Siliziumanordnungen

Publications (1)

Publication Number Publication Date
ATE79201T1 true ATE79201T1 (de) 1992-08-15

Family

ID=25329704

Family Applications (1)

Application Number Title Priority Date Filing Date
AT87303643T ATE79201T1 (de) 1986-05-02 1987-04-24 Metallkontakt mit niedrigem widerstand fuer siliziumanordnungen.

Country Status (5)

Country Link
US (2) US4796081A (de)
EP (1) EP0244995B1 (de)
JP (1) JP2569327B2 (de)
AT (1) ATE79201T1 (de)
DE (1) DE3780856T2 (de)

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* Cited by examiner, † Cited by third party
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US4796081A (en) * 1986-05-02 1989-01-03 Advanced Micro Devices, Inc. Low resistance metal contact for silicon devices
JP2695185B2 (ja) * 1988-05-02 1997-12-24 株式会社日立製作所 半導体集積回路装置及びその製造方法
US4985371A (en) * 1988-12-09 1991-01-15 At&T Bell Laboratories Process for making integrated-circuit device metallization
NL8900010A (nl) * 1989-01-04 1990-08-01 Philips Nv Halfgeleiderinrichting en werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US5196233A (en) * 1989-01-18 1993-03-23 Sgs-Thomson Microelectronics, Inc. Method for fabricating semiconductor circuits
US6271137B1 (en) 1989-11-30 2001-08-07 Stmicroelectronics, Inc. Method of producing an aluminum stacked contact/via for multilayer
US6242811B1 (en) 1989-11-30 2001-06-05 Stmicroelectronics, Inc. Interlevel contact including aluminum-refractory metal alloy formed during aluminum deposition at an elevated temperature
US5658828A (en) * 1989-11-30 1997-08-19 Sgs-Thomson Microelectronics, Inc. Method for forming an aluminum contact through an insulating layer
US5108951A (en) * 1990-11-05 1992-04-28 Sgs-Thomson Microelectronics, Inc. Method for forming a metal contact
EP0430403B1 (de) * 1989-11-30 1998-01-07 STMicroelectronics, Inc. Verfahren zum Herstellen von Zwischenschicht-Kontakten
US5472912A (en) * 1989-11-30 1995-12-05 Sgs-Thomson Microelectronics, Inc. Method of making an integrated circuit structure by using a non-conductive plug
US4975386A (en) * 1989-12-22 1990-12-04 Micro Power Systems, Inc. Process enhancement using molybdenum plugs in fabricating integrated circuits
US5172211A (en) * 1990-01-12 1992-12-15 Paradigm Technology, Inc. High resistance polysilicon load resistor
US6287963B1 (en) 1990-11-05 2001-09-11 Stmicroelectronics, Inc. Method for forming a metal contact
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
DE69323513T2 (de) * 1992-07-27 1999-08-12 St Microelectronics Inc Planaxer Kontakt mit einer Lücke
EP0594300B1 (de) * 1992-09-22 1998-07-29 STMicroelectronics, Inc. Methode zur Herstellung eines Metallkontaktes
KR960008558B1 (en) * 1993-03-02 1996-06-28 Samsung Electronics Co Ltd Low resistance contact structure and manufacturing method of high integrated semiconductor device
US5416034A (en) 1993-06-30 1995-05-16 Sgs-Thomson Microelectronics, Inc. Method of making resistor with silicon-rich silicide contacts for an integrated circuit
US6696351B1 (en) * 1995-08-15 2004-02-24 Sony Corporation Semiconductor device having a selectively deposited conductive layer
US5665644A (en) * 1995-11-03 1997-09-09 Micron Technology, Inc. Semiconductor processing method of forming electrically conductive interconnect lines and integrated circuitry
US5872387A (en) * 1996-01-16 1999-02-16 The Board Of Trustees Of The University Of Illinois Deuterium-treated semiconductor devices
US6091150A (en) * 1996-09-03 2000-07-18 Micron Technology, Inc. Integrated circuitry comprising electrically insulative material over interconnect line tops, sidewalls and bottoms
EP0890979A1 (de) * 1997-07-11 1999-01-13 EM Microelectronic-Marin SA Methode zur Optimierung eines Abscheide- und Ätzverfahrens als Funktion der Struktur des abzuscheidenden un zu ätzenden polykristallinen Films
US5985759A (en) * 1998-02-24 1999-11-16 Applied Materials, Inc. Oxygen enhancement of ion metal plasma (IMP) sputter deposited barrier layers
US6117793A (en) * 1998-09-03 2000-09-12 Micron Technology, Inc. Using silicide cap as an etch stop for multilayer metal process and structures so formed
JP3534626B2 (ja) * 1998-11-09 2004-06-07 株式会社リコー 半導体装置とその製造方法
US6239018B1 (en) * 1999-02-01 2001-05-29 United Microelectronics Corp. Method for forming dielectric layers
US6399447B1 (en) * 2000-07-19 2002-06-04 International Business Machines Corporation Method of producing dynamic random access memory (DRAM) cell with folded bitline vertical transistor
AU2003213844B2 (en) * 2002-03-11 2008-10-02 Dow Global Technologies Inc. Reversible, heat-set, elastic fibers, and method of making and articles made from same
US7498188B2 (en) * 2004-09-02 2009-03-03 Aptina Imaging Corporation Contacts for CMOS imagers and method of formation

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155986A (en) * 1976-06-22 1977-12-24 Nec Corp Semiconductor device
US4333099A (en) * 1978-02-27 1982-06-01 Rca Corporation Use of silicide to bridge unwanted polycrystalline silicon P-N junction
IT1110843B (it) * 1978-02-27 1986-01-06 Rca Corp Contatto affondato per dispositivi mos di tipo complementare
JPS5696850A (en) * 1979-12-30 1981-08-05 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS5745228A (en) * 1980-08-29 1982-03-15 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS5739568A (en) * 1981-06-22 1982-03-04 Hitachi Ltd Semiconductor integrated circuit memory
JPS58103168A (ja) * 1981-12-16 1983-06-20 Fujitsu Ltd 半導体装置
US4531144A (en) * 1982-05-14 1985-07-23 Burroughs Corporation Aluminum-refractory metal interconnect with anodized periphery
JPS58202551A (ja) * 1982-05-21 1983-11-25 Hitachi Ltd 耐エレクトロマイグレ−シヨン性配線材料
JPS5913345A (ja) * 1982-07-14 1984-01-24 Fujitsu Ltd 半導体装置
JPS5961147A (ja) * 1982-09-30 1984-04-07 Toshiba Corp 半導体装置の製造方法
JPS59501845A (ja) * 1982-09-30 1984-11-01 アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド 集積回路のためのアルミニウム−金属シリサイドの相互接続構造及びその製造方法
JPS59125621A (ja) * 1982-12-28 1984-07-20 Fujitsu Ltd 半導体製造装置
DE3304588A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene
JPS59231836A (ja) * 1983-06-14 1984-12-26 Toshiba Corp 多層構造アルミニウム層の形成方法
JPS609167A (ja) * 1983-06-28 1985-01-18 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
DE3326142A1 (de) * 1983-07-20 1985-01-31 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus aluminium oder aus einer aluminiumlegierung bestehenden aeusseren kontaktleiterbahnebene
US4507852A (en) * 1983-09-12 1985-04-02 Rockwell International Corporation Method for making a reliable ohmic contact between two layers of integrated circuit metallizations
JPS60130155A (ja) * 1983-12-17 1985-07-11 Toshiba Corp 半導体装置
JPS60201655A (ja) * 1984-03-27 1985-10-12 Seiko Epson Corp 半導体装置
JPS60245255A (ja) * 1984-05-21 1985-12-05 Hitachi Ltd 半導体装置の配線構造
JPS61208869A (ja) * 1985-03-14 1986-09-17 Nec Corp 半導体装置及びその製造方法
US4648175A (en) * 1985-06-12 1987-03-10 Ncr Corporation Use of selectively deposited tungsten for contact formation and shunting metallization
JPS6221214A (ja) * 1985-07-19 1987-01-29 Fujitsu Ltd スパツタ装置
JPS62111432A (ja) * 1985-11-08 1987-05-22 Fujitsu Ltd 半導体装置の製造方法
JPS62163342A (ja) * 1986-01-14 1987-07-20 Fujitsu Ltd 半導体装置
US4796081A (en) 1986-05-02 1989-01-03 Advanced Micro Devices, Inc. Low resistance metal contact for silicon devices
US4824803A (en) * 1987-06-22 1989-04-25 Standard Microsystems Corporation Multilayer metallization method for integrated circuits

Also Published As

Publication number Publication date
EP0244995B1 (de) 1992-08-05
EP0244995A2 (de) 1987-11-11
EP0244995A3 (en) 1988-05-04
JPS62283643A (ja) 1987-12-09
US4892844A (en) 1990-01-09
JP2569327B2 (ja) 1997-01-08
DE3780856T2 (de) 1993-01-07
US4796081A (en) 1989-01-03
DE3780856D1 (de) 1992-09-10

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties