ATE480049T1 - Analog/digitales dll - Google Patents
Analog/digitales dllInfo
- Publication number
- ATE480049T1 ATE480049T1 AT03785447T AT03785447T ATE480049T1 AT E480049 T1 ATE480049 T1 AT E480049T1 AT 03785447 T AT03785447 T AT 03785447T AT 03785447 T AT03785447 T AT 03785447T AT E480049 T1 ATE480049 T1 AT E480049T1
- Authority
- AT
- Austria
- Prior art keywords
- phase adjustment
- analog
- delay
- locked loop
- digital
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0818—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Pulse Circuits (AREA)
- Saccharide Compounds (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/335,535 US7336752B2 (en) | 2002-12-31 | 2002-12-31 | Wide frequency range delay locked loop |
PCT/CA2003/002040 WO2004059846A1 (en) | 2002-12-31 | 2003-12-29 | Analogue/digital delay locked loop |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE480049T1 true ATE480049T1 (de) | 2010-09-15 |
Family
ID=32655375
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT03785447T ATE480049T1 (de) | 2002-12-31 | 2003-12-29 | Analog/digitales dll |
Country Status (10)
Country | Link |
---|---|
US (7) | US7336752B2 (de) |
EP (3) | EP2264902A1 (de) |
KR (2) | KR101106369B1 (de) |
CN (2) | CN102522986B (de) |
AT (1) | ATE480049T1 (de) |
AU (1) | AU2003294604A1 (de) |
DE (1) | DE60334032D1 (de) |
ES (2) | ES2385786T3 (de) |
HK (1) | HK1170079A1 (de) |
WO (1) | WO2004059846A1 (de) |
Families Citing this family (131)
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2002
- 2002-12-31 US US10/335,535 patent/US7336752B2/en active Active
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- 2003-12-29 ES ES10171395T patent/ES2385786T3/es not_active Expired - Lifetime
- 2003-12-29 AU AU2003294604A patent/AU2003294604A1/en not_active Abandoned
- 2003-12-29 EP EP10183259A patent/EP2264902A1/de not_active Withdrawn
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- 2003-12-29 WO PCT/CA2003/002040 patent/WO2004059846A1/en not_active Application Discontinuation
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Also Published As
Publication number | Publication date |
---|---|
ES2385786T3 (es) | 2012-07-31 |
US7336752B2 (en) | 2008-02-26 |
US8000430B2 (en) | 2011-08-16 |
US8599984B2 (en) | 2013-12-03 |
US20080089459A1 (en) | 2008-04-17 |
CN102522986A (zh) | 2012-06-27 |
US8213561B2 (en) | 2012-07-03 |
HK1170079A1 (en) | 2013-02-15 |
CN1732623B (zh) | 2012-02-08 |
US20130271192A1 (en) | 2013-10-17 |
EP1588489B1 (de) | 2010-09-01 |
US10122369B2 (en) | 2018-11-06 |
EP2251980A1 (de) | 2010-11-17 |
US20130003483A1 (en) | 2013-01-03 |
CN1732623A (zh) | 2006-02-08 |
KR20050091038A (ko) | 2005-09-14 |
US20040125905A1 (en) | 2004-07-01 |
US20140084977A1 (en) | 2014-03-27 |
US20110291721A1 (en) | 2011-12-01 |
US8411812B2 (en) | 2013-04-02 |
DE60334032D1 (de) | 2010-10-14 |
KR20100080864A (ko) | 2010-07-12 |
EP2251980B1 (de) | 2012-05-23 |
EP1588489A1 (de) | 2005-10-26 |
CN102522986B (zh) | 2014-08-13 |
AU2003294604A1 (en) | 2004-07-22 |
US20170272085A1 (en) | 2017-09-21 |
ES2349123T3 (es) | 2010-12-28 |
EP2264902A1 (de) | 2010-12-22 |
KR101051875B1 (ko) | 2011-07-25 |
KR101106369B1 (ko) | 2012-01-18 |
WO2004059846A1 (en) | 2004-07-15 |
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