ATE124186T1 - Zeitverzögerungsschaltungen mit temperaturkompensation. - Google Patents

Zeitverzögerungsschaltungen mit temperaturkompensation.

Info

Publication number
ATE124186T1
ATE124186T1 AT90310649T AT90310649T ATE124186T1 AT E124186 T1 ATE124186 T1 AT E124186T1 AT 90310649 T AT90310649 T AT 90310649T AT 90310649 T AT90310649 T AT 90310649T AT E124186 T1 ATE124186 T1 AT E124186T1
Authority
AT
Austria
Prior art keywords
time delay
temperature
delay circuit
reference current
insensitive
Prior art date
Application number
AT90310649T
Other languages
English (en)
Inventor
Kou-Su Chen
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE124186T1 publication Critical patent/ATE124186T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • H03K2005/00058Variable delay controlled by a digital setting
    • H03K2005/00065Variable delay controlled by a digital setting by current control, e.g. by parallel current control transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078Fixed delay
    • H03K2005/00143Avoiding variations of delay due to temperature
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015Layout of the delay element
    • H03K2005/00195Layout of the delay element using FET's

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
AT90310649T 1989-10-16 1990-09-28 Zeitverzögerungsschaltungen mit temperaturkompensation. ATE124186T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/422,321 US5081380A (en) 1989-10-16 1989-10-16 Temperature self-compensated time delay circuits

Publications (1)

Publication Number Publication Date
ATE124186T1 true ATE124186T1 (de) 1995-07-15

Family

ID=23674364

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90310649T ATE124186T1 (de) 1989-10-16 1990-09-28 Zeitverzögerungsschaltungen mit temperaturkompensation.

Country Status (5)

Country Link
US (1) US5081380A (de)
EP (1) EP0423963B1 (de)
JP (1) JP2587318B2 (de)
AT (1) ATE124186T1 (de)
DE (1) DE69020295T2 (de)

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US11281249B2 (en) 2019-09-23 2022-03-22 International Business Machines Corporation Voltage sensitive current circuit
US10833653B1 (en) * 2019-09-23 2020-11-10 International Business Machines Corporation Voltage sensitive delay
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CN114553216B (zh) * 2020-11-25 2025-02-07 长鑫存储技术有限公司 电位产生电路、反相器、延时电路和逻辑门电路
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Also Published As

Publication number Publication date
JP2587318B2 (ja) 1997-03-05
US5081380A (en) 1992-01-14
DE69020295T2 (de) 1996-01-11
EP0423963B1 (de) 1995-06-21
JPH03171812A (ja) 1991-07-25
EP0423963A2 (de) 1991-04-24
DE69020295D1 (de) 1995-07-27
EP0423963A3 (en) 1991-09-18

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties