FR2699023B1 - Circuit à retard commandé. - Google Patents
Circuit à retard commandé.Info
- Publication number
- FR2699023B1 FR2699023B1 FR9214861A FR9214861A FR2699023B1 FR 2699023 B1 FR2699023 B1 FR 2699023B1 FR 9214861 A FR9214861 A FR 9214861A FR 9214861 A FR9214861 A FR 9214861A FR 2699023 B1 FR2699023 B1 FR 2699023B1
- Authority
- FR
- France
- Prior art keywords
- current source
- delay
- circuit
- current
- proportional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
- H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Abstract
Circuit à retard comprenant une cellule à retard formée d'une source de courant (I) connectée entre drain et source de deux transistors à effet de champ (P0, N0) dont les grilles sont connectées l'une à l'autre pour constituer l'entrée de la cellule et un inverseur (INV) relié à l'une ou l'autre des bornes de la source de courant (I) selon que le retard doit affecter le front avant ou le front arrière du signal à retarder, un condensateur (C) de définition d'un temps de retard (Te) proportionnel à la tension d'alimentation et inversement proportionnel au courant (I) délivré par la source de courant, étant connecté entre l'entrée de l'inverseur (INV) et la masse, caractérisé en ce qu'il comporte outre un circuit (CI, Cu, S1, S3, AMPLO, P1) de régulation du courant délivré par la source de courant pour le rendre proportionnel à la tension d'alimentation du circuit.
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9214861A FR2699023B1 (fr) | 1992-12-09 | 1992-12-09 | Circuit à retard commandé. |
CA002110247A CA2110247A1 (fr) | 1992-12-09 | 1993-11-29 | Circuit a retard commande |
JP5308161A JPH06232708A (ja) | 1992-12-09 | 1993-12-08 | 遅延回路 |
KR1019930027069A KR100338482B1 (ko) | 1992-12-09 | 1993-12-09 | 제어가능지연회로 |
US08/164,606 US5610546A (en) | 1992-12-09 | 1993-12-09 | Controlled delay circuit |
DE69328409T DE69328409T2 (de) | 1992-12-09 | 1993-12-09 | Gesteuerte Verzögerungsschaltung |
EP93402978A EP0601935B1 (fr) | 1992-12-09 | 1993-12-09 | Circuit de retard réglé |
TW083101877A TW246756B (fr) | 1992-12-09 | 1994-03-04 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9214861A FR2699023B1 (fr) | 1992-12-09 | 1992-12-09 | Circuit à retard commandé. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2699023A1 FR2699023A1 (fr) | 1994-06-10 |
FR2699023B1 true FR2699023B1 (fr) | 1995-02-24 |
Family
ID=9436406
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9214861A Expired - Fee Related FR2699023B1 (fr) | 1992-12-09 | 1992-12-09 | Circuit à retard commandé. |
Country Status (8)
Country | Link |
---|---|
US (1) | US5610546A (fr) |
EP (1) | EP0601935B1 (fr) |
JP (1) | JPH06232708A (fr) |
KR (1) | KR100338482B1 (fr) |
CA (1) | CA2110247A1 (fr) |
DE (1) | DE69328409T2 (fr) |
FR (1) | FR2699023B1 (fr) |
TW (1) | TW246756B (fr) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1283363B1 (it) * | 1996-07-30 | 1998-04-17 | Sgs Thomson Microelectronics | Rete a ritardo asimmetrico e impulsivo e relativo generatore di impulsi costanti |
US5748542A (en) * | 1996-12-13 | 1998-05-05 | Micron Technology, Inc. | Circuit and method for providing a substantially constant time delay over a range of supply voltages |
JP3714762B2 (ja) * | 1997-03-19 | 2005-11-09 | 富士通株式会社 | 遅延回路および半導体記憶装置 |
KR100453886B1 (ko) * | 1997-07-29 | 2004-12-17 | 삼성전자주식회사 | 링 오실레이터 |
US6067648A (en) * | 1998-03-02 | 2000-05-23 | Tanisys Technology, Inc. | Programmable pulse generator |
US6307417B1 (en) | 1999-08-24 | 2001-10-23 | Robert J. Proebsting | Integrated circuit output buffers having reduced power consumption requirements and methods of operating same |
US6356132B1 (en) | 2000-01-31 | 2002-03-12 | Agere Systems Guardian Corp. | Programmable delay cell |
US6348827B1 (en) * | 2000-02-10 | 2002-02-19 | International Business Machines Corporation | Programmable delay element and synchronous DRAM using the same |
US6549042B2 (en) | 2000-06-23 | 2003-04-15 | Integrated Device Technology, Inc. | Complementary data line driver circuits with conditional charge recycling capability that may be used in random access and content addressable memory devices and method of operating same |
US7019576B1 (en) * | 2003-03-24 | 2006-03-28 | Cypress Semiconductor Corporation | Delay circuit that scales with clock cycle time |
KR101005156B1 (ko) * | 2003-05-30 | 2011-01-04 | 주식회사 하이닉스반도체 | 지연 회로 |
JP2006041175A (ja) * | 2004-07-27 | 2006-02-09 | Toshiba Corp | 半導体集積回路装置 |
JP4810132B2 (ja) * | 2005-06-15 | 2011-11-09 | 三洋電機株式会社 | 遅延回路およびリップルコンバータ |
JP2006352398A (ja) * | 2005-06-15 | 2006-12-28 | Sanyo Electric Co Ltd | 遅延回路 |
US7705600B1 (en) | 2006-02-13 | 2010-04-27 | Cypress Semiconductor Corporation | Voltage stress testing of core blocks and regulator transistors |
DE102006049233B4 (de) * | 2006-10-18 | 2008-06-26 | Texas Instruments Deutschland Gmbh | Schaltkreis zur Erzeugung von sich überlappenden Signalen |
JP5224942B2 (ja) | 2008-06-30 | 2013-07-03 | キヤノン株式会社 | 固体撮像装置 |
JP5389524B2 (ja) * | 2009-05-14 | 2014-01-15 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 遅延回路 |
JP2010273186A (ja) * | 2009-05-22 | 2010-12-02 | Renesas Electronics Corp | 遅延回路 |
JP5967362B2 (ja) * | 2012-06-29 | 2016-08-10 | セイコーNpc株式会社 | 遅延回路 |
JP2021129255A (ja) * | 2020-02-17 | 2021-09-02 | ミツミ電機株式会社 | パルス信号送信回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4704547A (en) * | 1984-12-10 | 1987-11-03 | American Telephone And Telegraph Company, At&T Bell Laboratories | IGFET gating circuit having reduced electric field degradation |
US4617477A (en) * | 1985-05-21 | 1986-10-14 | At&T Bell Laboratories | Symmetrical output complementary buffer |
JPS62180607A (ja) * | 1986-02-04 | 1987-08-07 | Fujitsu Ltd | 半導体集積回路 |
JP2681972B2 (ja) * | 1988-02-26 | 1997-11-26 | 日本電気株式会社 | マスタスライス型半導体集積回路 |
US5068553A (en) * | 1988-10-31 | 1991-11-26 | Texas Instruments Incorporated | Delay stage with reduced Vdd dependence |
US5081380A (en) * | 1989-10-16 | 1992-01-14 | Advanced Micro Devices, Inc. | Temperature self-compensated time delay circuits |
DE4004135A1 (de) * | 1990-02-10 | 1991-08-14 | Thomson Brandt Gmbh | Frequenzgangkompensierte schaltung |
US5117130A (en) * | 1990-06-01 | 1992-05-26 | At&T Bell Laboratories | Integrated circuits which compensate for local conditions |
US5066868A (en) * | 1990-08-13 | 1991-11-19 | Thomson Consumer Electronics, Inc. | Apparatus for generating phase shifted clock signals |
KR940005004B1 (ko) * | 1991-03-21 | 1994-06-09 | 삼성전자 주식회사 | 신호지연회로 |
US5214320A (en) * | 1992-06-12 | 1993-05-25 | Smos Systems, Inc. | System and method for reducing ground bounce in integrated circuit output buffers |
-
1992
- 1992-12-09 FR FR9214861A patent/FR2699023B1/fr not_active Expired - Fee Related
-
1993
- 1993-11-29 CA CA002110247A patent/CA2110247A1/fr not_active Abandoned
- 1993-12-08 JP JP5308161A patent/JPH06232708A/ja active Pending
- 1993-12-09 DE DE69328409T patent/DE69328409T2/de not_active Expired - Fee Related
- 1993-12-09 KR KR1019930027069A patent/KR100338482B1/ko not_active IP Right Cessation
- 1993-12-09 EP EP93402978A patent/EP0601935B1/fr not_active Expired - Lifetime
- 1993-12-09 US US08/164,606 patent/US5610546A/en not_active Expired - Lifetime
-
1994
- 1994-03-04 TW TW083101877A patent/TW246756B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69328409D1 (de) | 2000-05-25 |
CA2110247A1 (fr) | 1994-06-10 |
US5610546A (en) | 1997-03-11 |
DE69328409T2 (de) | 2000-09-21 |
KR940017156A (ko) | 1994-07-26 |
EP0601935A1 (fr) | 1994-06-15 |
KR100338482B1 (ko) | 2002-08-21 |
FR2699023A1 (fr) | 1994-06-10 |
EP0601935B1 (fr) | 2000-04-19 |
TW246756B (fr) | 1995-05-01 |
JPH06232708A (ja) | 1994-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2699023B1 (fr) | Circuit à retard commandé. | |
KR930005363A (ko) | 온도 감지 회로 및 정전류 회로 | |
FR2377137A1 (fr) | Empaquetage commun pour dispositifs semiconducteurs a haute frequence, montes en push-pull | |
FR2658968B1 (fr) | Dispositif de protection contre les perturbations engendrees par la connexion a une source d'alimentation electrique continue ou la deconnexion de cette source d'un ensemble electronique, sur l'alimentation delivree par cette source. | |
DE69223719D1 (de) | Feldeffekttransistor mit isoliertem Gate vom Anreicherungstyp mit gesteuerter Anstiegszeit an der Drain-Ausgangselektrode | |
KR910015114A (ko) | 반도체 디지탈 회로 | |
FR2365248A1 (fr) | Inverseur avec une caracteristique de ligne de charge amelioree | |
KR860007783A (ko) | 개선된 출력특성을 갖는 비교기 회로 | |
FR2445642A1 (fr) | Agencement de securite en cas de chute d'une tension d'alimentation continue | |
KR940008262A (ko) | 시모스(cmos)입력단 | |
EP0292641A3 (fr) | Tampon de sortie pour circuit intégré semi-conducteur MOS | |
CA1261391A (fr) | Circuit de commande rapide de transistor a effet de champ de puissance | |
KR870002596A (ko) | 바이어스 전압 발생기를 포함하는 반도체 메모리 회로 | |
FR2457598A1 (fr) | Circuit d'inhibition pour un amplificateur differentiel | |
KR910001775A (ko) | 반도체 기억장치 | |
JPS6467795A (en) | Reading amplifier | |
JPS57117181A (en) | Semiconductor load circuit | |
FR2677171B1 (fr) | Transistor de gain en courant predetermine dans un circuit integre bipolaire. | |
FR2363226A1 (fr) | Circuit miroir de courant notamment destine a des demodulateurs stereophoniques | |
SU1453384A1 (ru) | Стабилизатор посто нного тока | |
JPS57203334A (en) | Semiconductor integrated circuit device | |
JPS57122574A (en) | Mos type integrated circuit | |
JPS5557919A (en) | Voltage-current control circuit | |
KR930024261A (ko) | 돌입 전류 방지 회로 | |
KR880012012A (ko) | 논리회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |