ATE101750T1 - Herstellen von kundenspezifischen integrierten schaltungen. - Google Patents

Herstellen von kundenspezifischen integrierten schaltungen.

Info

Publication number
ATE101750T1
ATE101750T1 AT88303020T AT88303020T ATE101750T1 AT E101750 T1 ATE101750 T1 AT E101750T1 AT 88303020 T AT88303020 T AT 88303020T AT 88303020 T AT88303020 T AT 88303020T AT E101750 T1 ATE101750 T1 AT E101750T1
Authority
AT
Austria
Prior art keywords
integrated circuits
custom integrated
integrated circuit
making custom
circuit blank
Prior art date
Application number
AT88303020T
Other languages
English (en)
Inventor
Zvi Orbach
Meir Israel Janai
Original Assignee
Quick Tech Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quick Tech Ltd filed Critical Quick Tech Ltd
Application granted granted Critical
Publication of ATE101750T1 publication Critical patent/ATE101750T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12535—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.] with additional, spatially distinct nonmetal component
    • Y10T428/12542—More than one such component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12535—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.] with additional, spatially distinct nonmetal component
    • Y10T428/12611—Oxide-containing component
    • Y10T428/12618—Plural oxides
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
AT88303020T 1987-04-05 1988-04-05 Herstellen von kundenspezifischen integrierten schaltungen. ATE101750T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IL82113A IL82113A (en) 1987-04-05 1987-04-05 Fabrication of customized integrated circuits
EP88303020A EP0336026B1 (de) 1987-04-05 1988-04-05 Herstellen von kundenspezifischen integrierten Schaltungen

Publications (1)

Publication Number Publication Date
ATE101750T1 true ATE101750T1 (de) 1994-03-15

Family

ID=11057692

Family Applications (1)

Application Number Title Priority Date Filing Date
AT88303020T ATE101750T1 (de) 1987-04-05 1988-04-05 Herstellen von kundenspezifischen integrierten schaltungen.

Country Status (12)

Country Link
US (1) US4875971A (de)
EP (1) EP0336026B1 (de)
JP (1) JP2664403B2 (de)
KR (1) KR920004654B1 (de)
AT (1) ATE101750T1 (de)
AU (1) AU607747B2 (de)
CA (3) CA1294377C (de)
ES (1) ES2051297T3 (de)
HK (1) HK1004031A1 (de)
IL (1) IL82113A (de)
IN (1) IN171991B (de)
ZA (1) ZA882018B (de)

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US5679967A (en) * 1985-01-20 1997-10-21 Chip Express (Israel) Ltd. Customizable three metal layer gate array devices
US5329152A (en) * 1986-11-26 1994-07-12 Quick Technologies Ltd. Ablative etch resistant coating for laser personalization of integrated circuits
WO1989009492A1 (en) * 1988-03-31 1989-10-05 Advanced Micro Devices, Inc. Gate array structure and process to allow optioning at second metal mask only
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US5185291A (en) * 1989-06-30 1993-02-09 At&T Bell Laboratories Method of making severable conductive path in an integrated-circuit device
US5111273A (en) * 1990-03-28 1992-05-05 Quick Technologies Ltd. Fabrication of personalizable integrated circuits
US5094900A (en) * 1990-04-13 1992-03-10 Micron Technology, Inc. Self-aligned sloped contact
US5404033A (en) * 1992-08-20 1995-04-04 Swift Microelectronics Corporation Application specific integrated circuit and placement and routing software with non-customizable first metal layer and vias and customizable second metal grid pattern
US5541814A (en) * 1993-10-08 1996-07-30 Quick Technologies Ltd. Personalizable multi-chip carrier including removable fuses
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US6429113B1 (en) 1994-04-26 2002-08-06 International Business Machines Corporation Method for connecting an electrical device to a circuit substrate
US5712192A (en) * 1994-04-26 1998-01-27 International Business Machines Corporation Process for connecting an electrical device to a circuit substrate
IL109491A (en) * 1994-05-01 1999-11-30 Quick Tech Ltd Customizable logic array device
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US5844416A (en) * 1995-11-02 1998-12-01 Sandia Corporation Ion-beam apparatus and method for analyzing and controlling integrated circuits
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US5985518A (en) * 1997-03-24 1999-11-16 Clear Logic, Inc. Method of customizing integrated circuits using standard masks and targeting energy beams
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US5885749A (en) * 1997-06-20 1999-03-23 Clear Logic, Inc. Method of customizing integrated circuits by selective secondary deposition of layer interconnect material
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US5953577A (en) * 1998-09-29 1999-09-14 Clear Logic, Inc. Customization of integrated circuits
US6486527B1 (en) 1999-06-25 2002-11-26 Macpherson John Vertical fuse structure for integrated circuits containing an exposure window in the layer over the fuse structure to facilitate programming thereafter
US7316934B2 (en) * 2000-12-18 2008-01-08 Zavitan Semiconductors, Inc. Personalized hardware
US6613611B1 (en) 2000-12-22 2003-09-02 Lightspeed Semiconductor Corporation ASIC routing architecture with variable number of custom masks
US6885043B2 (en) * 2002-01-18 2005-04-26 Lightspeed Semiconductor Corporation ASIC routing architecture
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US10714427B2 (en) 2016-09-08 2020-07-14 Asml Netherlands B.V. Secure chips with serial numbers
US10079206B2 (en) 2016-10-27 2018-09-18 Mapper Lithography Ip B.V. Fabricating unique chips using a charged particle multi-beamlet lithography system

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Also Published As

Publication number Publication date
IN171991B (de) 1993-03-06
IL82113A (en) 1992-08-18
EP0336026B1 (de) 1994-02-16
ES2051297T3 (es) 1994-06-16
AU1350888A (en) 1988-10-06
KR880013249A (ko) 1988-11-30
CA1294377C (en) 1992-01-14
US4875971A (en) 1989-10-24
CA1300762C (en) 1992-05-12
CA1298669C (en) 1992-04-07
ZA882018B (en) 1988-09-29
HK1004031A1 (en) 1998-11-13
KR920004654B1 (ko) 1992-06-12
JPS6413739A (en) 1989-01-18
EP0336026A1 (de) 1989-10-11
JP2664403B2 (ja) 1997-10-15
IL82113A0 (en) 1987-10-30
AU607747B2 (en) 1991-03-14

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee