IT1213261B - Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione. - Google Patents

Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.

Info

Publication number
IT1213261B
IT1213261B IT8424139A IT2413984A IT1213261B IT 1213261 B IT1213261 B IT 1213261B IT 8424139 A IT8424139 A IT 8424139A IT 2413984 A IT2413984 A IT 2413984A IT 1213261 B IT1213261 B IT 1213261B
Authority
IT
Italy
Prior art keywords
metallisation
procedure
manufacture
thickness
semiconductor device
Prior art date
Application number
IT8424139A
Other languages
English (en)
Other versions
IT8424139A0 (it
Inventor
Claudio Contiero
Giulio Iannuzzi
Giorgio De Santi
Fabrizio Andreani
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT8424139A priority Critical patent/IT1213261B/it
Publication of IT8424139A0 publication Critical patent/IT8424139A0/it
Priority to US06/773,319 priority patent/US4718977A/en
Priority to DE3544539A priority patent/DE3544539C2/de
Priority to JP60286815A priority patent/JPS61152042A/ja
Priority to GB08531175A priority patent/GB2168846B/en
Priority to FR8518793A priority patent/FR2575332B1/fr
Priority to NL8503486A priority patent/NL193808C/nl
Application granted granted Critical
Publication of IT1213261B publication Critical patent/IT1213261B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
IT8424139A 1984-12-20 1984-12-20 Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione. IT1213261B (it)

Priority Applications (7)

Application Number Priority Date Filing Date Title
IT8424139A IT1213261B (it) 1984-12-20 1984-12-20 Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.
US06/773,319 US4718977A (en) 1984-12-20 1985-09-06 Process for forming semiconductor device having multi-thickness metallization
DE3544539A DE3544539C2 (de) 1984-12-20 1985-12-17 Halbleiteranordnung mit Metallisierungsmuster verschiedener Schichtdicke sowie Verfahren zu deren Herstellung
JP60286815A JPS61152042A (ja) 1984-12-20 1985-12-18 半導体素子の金属化パターンおよびその方法
GB08531175A GB2168846B (en) 1984-12-20 1985-12-18 Semiconductor device having multi-thickness metallization and process for the fabrication thereof
FR8518793A FR2575332B1 (fr) 1984-12-20 1985-12-18 Dispositif semi-conducteur ayant une couche metallisee de plusieurs epaisseurs et procede pour sa fabrication
NL8503486A NL193808C (nl) 1984-12-20 1985-12-18 Metalliseringspatroon voor een halfgeleiderinrichting, en werkwijze voor het vervaardigen daarvan.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8424139A IT1213261B (it) 1984-12-20 1984-12-20 Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.

Publications (2)

Publication Number Publication Date
IT8424139A0 IT8424139A0 (it) 1984-12-20
IT1213261B true IT1213261B (it) 1989-12-14

Family

ID=11212175

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8424139A IT1213261B (it) 1984-12-20 1984-12-20 Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.

Country Status (7)

Country Link
US (1) US4718977A (it)
JP (1) JPS61152042A (it)
DE (1) DE3544539C2 (it)
FR (1) FR2575332B1 (it)
GB (1) GB2168846B (it)
IT (1) IT1213261B (it)
NL (1) NL193808C (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4924287A (en) * 1985-01-20 1990-05-08 Avner Pdahtzur Personalizable CMOS gate array device and technique
IL82113A (en) * 1987-04-05 1992-08-18 Zvi Orbach Fabrication of customized integrated circuits
GB2206540B (en) * 1987-06-30 1991-03-27 British Aerospace Aperture forming method
JPH0290651A (ja) * 1988-09-28 1990-03-30 Nec Corp 半導体集積回路
FR2713397B1 (fr) * 1993-12-03 1996-02-16 Sgs Thomson Microelectronics Procédé de formation de couches métalliques minces et épaisses.
GB2290167B (en) 1994-06-08 1999-01-20 Hyundai Electronics Ind Method for fabricating a semiconductor device
TW318261B (it) * 1995-09-21 1997-10-21 Handotai Energy Kenkyusho Kk
JP4179483B2 (ja) 1996-02-13 2008-11-12 株式会社半導体エネルギー研究所 表示装置の作製方法
FR2780202A1 (fr) * 1998-06-23 1999-12-24 St Microelectronics Sa Circuit integre a niveau de metallisation d'epaisseur variable
TW453139B (en) * 1998-07-13 2001-09-01 Siemens Ag Method to produce circuit-plates with coarse conductive patterns and at least one region with fine conductive patterns
DE19912441A1 (de) * 1999-03-19 2000-09-21 Elfo Ag Sachseln Sachseln Multi-Chip-Modul
US6077766A (en) * 1999-06-25 2000-06-20 International Business Machines Corporation Variable thickness pads on a substrate surface
DE102004003538B3 (de) * 2004-01-23 2005-09-08 Infineon Technologies Ag Integrierte Halbleiterschaltung mit einer Logik- und Leistungs-Metallisierung ohne Intermetall-Dielektrikum und Verfahren zu ihrer Herstellung
DE102004009296B4 (de) * 2004-02-26 2011-01-27 Siemens Ag Verfahren zum Herstellen einer Anordnung eines elektrischen Bauelements

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6706868A (it) * 1967-05-18 1968-11-19
US3700510A (en) * 1970-03-09 1972-10-24 Hughes Aircraft Co Masking techniques for use in fabricating microelectronic components
US4000842A (en) * 1975-06-02 1977-01-04 National Semiconductor Corporation Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices
US4017890A (en) * 1975-10-24 1977-04-12 International Business Machines Corporation Intermetallic compound layer in thin films for improved electromigration resistance
JPS52149990A (en) * 1976-06-09 1977-12-13 Hitachi Ltd Production of multilayer wirings
JPS5365088A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device
JPS53121490A (en) * 1977-03-31 1978-10-23 Toshiba Corp Semiconductor device
US4233337A (en) * 1978-05-01 1980-11-11 International Business Machines Corporation Method for forming semiconductor contacts
JPS5640260A (en) * 1979-09-11 1981-04-16 Mitsubishi Electric Corp Manufacture of semiconductor device
WO1982001102A1 (en) * 1980-09-15 1982-04-01 Mulholland W Integrated circuit power distribution network
JPS58137231A (ja) * 1982-02-09 1983-08-15 Nec Corp 集積回路装置
JPS59500542A (ja) * 1982-04-12 1984-03-29 モトロ−ラ・インコ−ポレ−テツド Ｎ型ＧａＡｓ用のオ−ム接触装置
JPS58204558A (ja) * 1982-05-25 1983-11-29 Nec Corp 配線方法
DE3232837A1 (de) * 1982-09-03 1984-03-08 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen einer 2-ebenen-metallisierung fuer halbleiterbauelemente, insbesondere fuer leistungshalbleiterbauelemente wie thyristoren
JPS59198734A (ja) * 1983-04-25 1984-11-10 Mitsubishi Electric Corp 多層配線構造
GB8316476D0 (en) * 1983-06-16 1983-07-20 Plessey Co Plc Producing layered structure

Also Published As

Publication number Publication date
US4718977A (en) 1988-01-12
GB8531175D0 (en) 1986-01-29
NL193808C (nl) 2000-11-06
DE3544539A1 (de) 1986-07-03
IT8424139A0 (it) 1984-12-20
FR2575332B1 (fr) 1996-05-24
NL193808B (nl) 2000-07-03
NL8503486A (nl) 1986-07-16
DE3544539C2 (de) 1996-02-08
GB2168846B (en) 1988-11-30
GB2168846A (en) 1986-06-25
FR2575332A1 (fr) 1986-06-27
JPS61152042A (ja) 1986-07-10

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227