IT8424246A0 - Dispositivo a semiconduttori eprocedimento per la sua fabbricazione. - Google Patents

Dispositivo a semiconduttori eprocedimento per la sua fabbricazione.

Info

Publication number
IT8424246A0
IT8424246A0 IT8424246A IT2424684A IT8424246A0 IT 8424246 A0 IT8424246 A0 IT 8424246A0 IT 8424246 A IT8424246 A IT 8424246A IT 2424684 A IT2424684 A IT 2424684A IT 8424246 A0 IT8424246 A0 IT 8424246A0
Authority
IT
Italy
Prior art keywords
procedure
manufacture
semiconductor device
semiconductor
Prior art date
Application number
IT8424246A
Other languages
English (en)
Other versions
IT1179545B (it
Inventor
Hidetoshi Iwai
Kazumichi Mitsusada
Masamichi Ishihara
Tetsuro Matsumoto
Kazuyuki Miyazawa
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8424246A0 publication Critical patent/IT8424246A0/it
Application granted granted Critical
Publication of IT1179545B publication Critical patent/IT1179545B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/605Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having significant overlap between the lightly-doped extensions and the gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/611Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
IT24246/84A 1983-12-26 1984-12-24 Dispositivo a semiconduttori e procedimento per la sua fabbricazione IT1179545B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58243801A JPH0646662B2 (ja) 1983-12-26 1983-12-26 半導体装置

Publications (2)

Publication Number Publication Date
IT8424246A0 true IT8424246A0 (it) 1984-12-24
IT1179545B IT1179545B (it) 1987-09-16

Family

ID=17109142

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24246/84A IT1179545B (it) 1983-12-26 1984-12-24 Dispositivo a semiconduttori e procedimento per la sua fabbricazione

Country Status (7)

Country Link
JP (1) JPH0646662B2 (it)
KR (1) KR930001564B1 (it)
DE (1) DE3446928A1 (it)
FR (1) FR2561042B1 (it)
GB (2) GB2152284B (it)
HK (2) HK41790A (it)
IT (1) IT1179545B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62169468A (ja) * 1986-01-22 1987-07-25 Nec Corp 半導体集積回路装置
JPS63119574A (ja) * 1986-11-07 1988-05-24 Toshiba Corp 半導体装置の製造方法
US5142345A (en) * 1989-04-13 1992-08-25 Mitsubishi Denki Kabushiki Kaisha Structure of input protection transistor in semiconductor device including memory transistor having double-layered gate and method of manufacturing semiconductor device including such input protection transistor
US5183773A (en) * 1989-04-13 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device including such input protection transistor
JP2953192B2 (ja) * 1991-05-29 1999-09-27 日本電気株式会社 半導体集積回路
JP3456242B2 (ja) * 1993-01-07 2003-10-14 セイコーエプソン株式会社 半導体装置及びその製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US373249A (en) * 1887-11-15 Clock
GB1170705A (en) * 1967-02-27 1969-11-12 Hitachi Ltd An Insulated Gate Type Field Effect Semiconductor Device having a Breakdown Preventing Circuit Device and a method of manufacturing the same
US3999212A (en) * 1967-03-03 1976-12-21 Hitachi, Ltd. Field effect semiconductor device having a protective diode
DE2545871B2 (de) * 1974-12-06 1980-06-19 International Business Machines Corp., Armonk, N.Y. (V.St.A.) Feldeffekttransistor mit verbesserter Stabilität der Schwellenspannung
NL176322C (nl) * 1976-02-24 1985-03-18 Philips Nv Halfgeleiderinrichting met beveiligingsschakeling.
DE2940954A1 (de) * 1979-10-09 1981-04-23 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur herstellung von hochspannungs-mos-transistoren enthaltenden mos-integrierten schaltkreisen sowie schaltungsanordnung zum schalten von leistungsstromkreisen unter verwendung derartiger hochspannungs-mos-transistoren
US4342045A (en) * 1980-04-28 1982-07-27 Advanced Micro Devices, Inc. Input protection device for integrated circuits
JPS5715459A (en) * 1980-07-01 1982-01-26 Fujitsu Ltd Semiconductor integrated circuit
US4366613A (en) * 1980-12-17 1983-01-04 Ibm Corporation Method of fabricating an MOS dynamic RAM with lightly doped drain
JPS57188364U (it) * 1981-05-25 1982-11-30
JPS57211272A (en) * 1981-06-23 1982-12-25 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
GB8432417D0 (en) 1985-02-06
DE3446928A1 (de) 1985-07-04
JPS60136374A (ja) 1985-07-19
HK48090A (en) 1990-06-29
GB8702881D0 (en) 1987-03-18
GB2186426B (en) 1988-01-06
FR2561042B1 (fr) 1988-11-10
JPH0646662B2 (ja) 1994-06-15
GB2152284B (en) 1988-01-06
FR2561042A1 (fr) 1985-09-13
HK41790A (en) 1990-06-08
GB2152284A (en) 1985-07-31
IT1179545B (it) 1987-09-16
KR930001564B1 (ko) 1993-03-04
GB2186426A (en) 1987-08-12
KR850005166A (ko) 1985-08-21

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961223