IT1184402B - Dispositivo a circuito integrato a semiconduttori e procedimento per la produzione di esso - Google Patents

Dispositivo a circuito integrato a semiconduttori e procedimento per la produzione di esso

Info

Publication number
IT1184402B
IT1184402B IT20269/85A IT2026985A IT1184402B IT 1184402 B IT1184402 B IT 1184402B IT 20269/85 A IT20269/85 A IT 20269/85A IT 2026985 A IT2026985 A IT 2026985A IT 1184402 B IT1184402 B IT 1184402B
Authority
IT
Italy
Prior art keywords
procedure
production
integrated circuit
semiconductor integrated
circuit device
Prior art date
Application number
IT20269/85A
Other languages
English (en)
Other versions
IT8520269A0 (it
Inventor
Mitani Shinichiro
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8520269A0 publication Critical patent/IT8520269A0/it
Application granted granted Critical
Publication of IT1184402B publication Critical patent/IT1184402B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors with potential-jump barrier or surface barrier
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/109—Memory devices
IT20269/85A 1984-04-11 1985-04-05 Dispositivo a circuito integrato a semiconduttori e procedimento per la produzione di esso IT1184402B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59070859A JPH073858B2 (ja) 1984-04-11 1984-04-11 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
IT8520269A0 IT8520269A0 (it) 1985-04-05
IT1184402B true IT1184402B (it) 1987-10-28

Family

ID=13443705

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20269/85A IT1184402B (it) 1984-04-11 1985-04-05 Dispositivo a circuito integrato a semiconduttori e procedimento per la produzione di esso

Country Status (8)

Country Link
US (1) US5100822A (it)
JP (1) JPH073858B2 (it)
KR (1) KR930007521B1 (it)
DE (1) DE3513034C2 (it)
GB (2) GB2159326B (it)
HK (2) HK91190A (it)
IT (1) IT1184402B (it)
SG (1) SG82390G (it)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4735824A (en) * 1985-05-31 1988-04-05 Kabushiki Kaisha Toshiba Method of manufacturing an MOS capacitor
JPS6376330A (ja) * 1986-09-18 1988-04-06 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH0620108B2 (ja) * 1987-03-23 1994-03-16 三菱電機株式会社 半導体装置の製造方法
JPS63234534A (ja) * 1987-03-24 1988-09-29 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPS63287024A (ja) * 1987-05-19 1988-11-24 Seiko Epson Corp 半導体装置の製造方法
JP2635607B2 (ja) * 1987-08-28 1997-07-30 株式会社東芝 半導体装置の製造方法
US4931409A (en) * 1988-01-30 1990-06-05 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device having trench isolation
US5057887A (en) * 1989-05-14 1991-10-15 Texas Instruments Incorporated High density dynamic ram cell
KR960006714B1 (ko) * 1990-05-28 1996-05-22 가부시끼가이샤 도시바 반도체 장치의 제조 방법
US5223729A (en) * 1990-09-26 1993-06-29 Matsushita Electric Industrial Co., Ltd. Semiconductor device and a method of producing the same
JP3556679B2 (ja) 1992-05-29 2004-08-18 株式会社半導体エネルギー研究所 電気光学装置
US5256588A (en) * 1992-03-23 1993-10-26 Motorola, Inc. Method for forming a transistor and a capacitor for use in a vertically stacked dynamic random access memory cell
US5523252A (en) * 1993-08-26 1996-06-04 Seiko Instruments Inc. Method for fabricating and inspecting semiconductor integrated circuit substrate, and semi-finished product used for the sustrate
JP3396553B2 (ja) * 1994-02-04 2003-04-14 三菱電機株式会社 半導体装置の製造方法及び半導体装置
US5719085A (en) * 1995-09-29 1998-02-17 Intel Corporation Shallow trench isolation technique
US6103635A (en) * 1997-10-28 2000-08-15 Fairchild Semiconductor Corp. Trench forming process and integrated circuit device including a trench
US6004850A (en) * 1998-02-23 1999-12-21 Motorola Inc. Tantalum oxide anti-reflective coating (ARC) integrated with a metallic transistor gate electrode and method of formation
JP2009032808A (ja) * 2007-07-25 2009-02-12 Toshiba Corp 半導体装置
US20100264478A1 (en) * 2007-10-31 2010-10-21 Agere Systems Inc. Method to reduce trench capacitor leakage for random access memory device
US8916868B2 (en) * 2011-04-22 2014-12-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US8809854B2 (en) 2011-04-22 2014-08-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN114743997A (zh) * 2021-01-07 2022-07-12 群创光电股份有限公司 感测装置的制造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812739B2 (ja) * 1975-05-07 1983-03-10 株式会社日立製作所 半導体記憶装置
CA1090006A (en) * 1976-12-27 1980-11-18 Wolfgang M. Feist Semiconductor structures and methods for manufacturing such structures
US4296429A (en) * 1978-08-09 1981-10-20 Harris Corporation VMOS Transistor and method of fabrication
US4295924A (en) * 1979-12-17 1981-10-20 International Business Machines Corporation Method for providing self-aligned conductor in a V-groove device
US4353086A (en) * 1980-05-07 1982-10-05 Bell Telephone Laboratories, Incorporated Silicon integrated circuits
JPS56160050A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Semiconductor device and manufacture thereof
US4397075A (en) * 1980-07-03 1983-08-09 International Business Machines Corporation FET Memory cell structure and process
GB2081506B (en) * 1980-07-21 1984-06-06 Data General Corp Resin-filled groove isolation of integrated circuit elements in a semi-conductor body
JPS57138162A (en) * 1981-02-20 1982-08-26 Nec Corp Manufacture of semiconductor device
JPS58137245A (ja) * 1982-02-10 1983-08-15 Hitachi Ltd 大規模半導体メモリ
JPS58154256A (ja) * 1982-03-10 1983-09-13 Hitachi Ltd 半導体装置
JPS58202560A (ja) * 1982-05-21 1983-11-25 Hitachi Ltd 半導体装置およびその製造方法
JPH0666436B2 (ja) * 1983-04-15 1994-08-24 株式会社日立製作所 半導体集積回路装置

Also Published As

Publication number Publication date
SG82390G (en) 1990-11-23
GB2206448A (en) 1989-01-05
JPS60214558A (ja) 1985-10-26
GB2159326B (en) 1989-01-18
IT8520269A0 (it) 1985-04-05
KR930007521B1 (ko) 1993-08-12
US5100822A (en) 1992-03-31
JPH073858B2 (ja) 1995-01-18
GB8819232D0 (en) 1988-09-14
KR850007716A (ko) 1985-12-07
DE3513034A1 (de) 1985-10-24
GB8508932D0 (en) 1985-05-09
GB2159326A (en) 1985-11-27
DE3513034C2 (de) 1994-12-15
GB2206448B (en) 1989-05-24
HK11392A (en) 1992-02-21
HK91190A (en) 1990-11-16

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970424