WO2020174529A1 - 半導体素子の製造方法 - Google Patents
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Abstract
Description
以下、本発明の実施の形態1に係る半導体素子の製造方法について説明する。図1は、本実施の形態1に係る半導体素子の製造工程を示すフローチャートである。図2から図12は、その製造工程を示す断面図である。本実施の形態1では、複数の回路素子が形成された半導体基板上における接着保護層及び接着層の形成、接着層と支持基板との接着(貼り合わせ)、基板薄膜化(研磨)、ダイシングなどによる分割(切断)、転写基板の接合、支持基板の剥離、接着層の剥離、接着保護層の剥離をこの順に行う。
以上のような本実施の形態1に係る半導体素子の製造方法によれば、接着保護層3を形成することによって、高周波デバイス素子などの半導体素子の不良を抑制することができる。
以下、本発明の実施の形態2に係る半導体素子の製造方法について説明する。図13は、本実施の形態2に係る半導体素子の製造工程を示すフローチャートであり、図14から図17は、その一部の製造工程を示す断面図である。以下、本実施の形態2に係る構成要素のうち、上述の構成要素と同じまたは類似する構成要素については同じ参照符号を付し、異なる構成要素について主に説明する。
本実施の形態2でも実施の形態1と同様に、接着保護層3を形成することによって、高周波デバイス素子などの半導体素子の不良を抑制することができる。
接着層4と接着保護層3とは強固に接着しており、研磨、分割工程時にはほぼ剥離しないので、回路素子2の破損等は発生しない。しかしながら、接着層4は剥離しにくく、剥離テープを貼ってピールする方法では簡単に剥離できない。そこで実施の形態1及び2のステップS8(図1及び図13)の加熱処理では、接着保護層3から有機溶剤成分を放出し、接着層4と接着保護層3との間の界面の接合力を低下させることによって、ピール法などで簡単に接着層4を剥離することを可能にしている。
以上のような本実施の形態3に係る半導体素子の製造方法によれば、接着層4の剥離をより容易に行うことができる。
実施の形態1の製造方法(図1)では、分割工程(ステップS5)は、半導体基板1の研磨を含む薄膜化工程(ステップS4)と、転写基板7の接合工程(ステップS6)との間に行われた。また実施の形態2の製造方法(図13)では、分割工程(ステップS5)は、接着層4の剥離工程(ステップS8)と、接着保護層3の剥離工程(ステップS9)との間に行われた。しかしこれらに限ったものではなく、分割工程(ステップS5)は、薄膜化工程(ステップS4)の後で行われればよい。
Claims (7)
- (a)半導体基板の、複数の回路素子が形成された第1主面上に、接着保護層、接着層、剥離層、支持基板がこの順に配設された積層体を形成する工程と、
(b)前記半導体基板の第1主面と逆側の第2主面から研磨を行うことによって、前記複数の回路素子が形成された部分以外の前記半導体基板を除去する工程と、
(c)前記回路素子が形成された部分を転写基板に接合する工程と、
(d)前記剥離層を光照射することによって、前記剥離層及び前記支持基板を除去する工程と、
(e)前記接着層を加熱処理によって除去する工程と、
(f)前記接着保護層を化学処理によって除去する工程と、
(g)前記複数の回路素子を分割する工程と
を備える、半導体素子の製造方法。 - 請求項1に記載の半導体素子の製造方法であって、
前記工程(g)は、前記工程(b)と前記工程(c)との間、または、前記工程(e)と前記工程(f)との間にて行われる、半導体素子の製造方法。 - 請求項1または請求項2に記載の半導体素子の製造方法であって、
前記工程(e)の前記加熱処理の温度は、前記工程(a)の前記接着保護層を形成する温度よりも高い、半導体素子の製造方法。 - 請求項1から請求項3のうちのいずれか1項に記載の半導体素子の製造方法であって、
前記回路素子は、エアブリッジ構造の電極を含む、半導体素子の製造方法。 - 請求項1から請求項4のうちのいずれか1項に記載の半導体素子の製造方法であって、
前記工程(c)は前記回路素子を転写基板に接合する常温接合を含む、半導体素子の製造方法。 - 請求項1から請求項5のうちのいずれか1項に記載の半導体素子の製造方法であって、
前記接着保護層は、沸点が異なる複数種類の有機溶剤成分を含む、半導体素子の製造方法。 - 請求項1から請求項6のうちのいずれか1項に記載の半導体素子の製造方法であって、
前記接着層は、紫外線硬化樹脂を含む、半導体素子の製造方法。
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JP2021501387A JP7016445B2 (ja) | 2019-02-25 | 2019-02-25 | 半導体素子の製造方法 |
CN201980091663.XA CN113454758B (zh) | 2019-02-25 | 半导体元件的制造方法 | |
US17/298,961 US11854856B2 (en) | 2019-02-25 | 2019-02-25 | Method of manufacturing semiconductor element |
DE112019006915.2T DE112019006915T5 (de) | 2019-02-25 | 2019-02-25 | Verfahren zur herstellung eines halbleiterelements |
KR1020217025832A KR102588785B1 (ko) | 2019-02-25 | 2019-02-25 | 반도체 소자의 제조 방법 |
PCT/JP2019/007036 WO2020174529A1 (ja) | 2019-02-25 | 2019-02-25 | 半導体素子の製造方法 |
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CN114551323B (zh) * | 2022-02-25 | 2023-06-16 | 广东芯粤能半导体有限公司 | 半导体器件及形成方法 |
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EP4191652A1 (en) * | 2021-11-30 | 2023-06-07 | InnoLux Corporation | Manufacturing method of electronic device |
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