WO2016187903A1 - 一种液晶面板和阵列基板 - Google Patents

一种液晶面板和阵列基板 Download PDF

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Publication number
WO2016187903A1
WO2016187903A1 PCT/CN2015/081302 CN2015081302W WO2016187903A1 WO 2016187903 A1 WO2016187903 A1 WO 2016187903A1 CN 2015081302 W CN2015081302 W CN 2015081302W WO 2016187903 A1 WO2016187903 A1 WO 2016187903A1
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Prior art keywords
light shielding
array substrate
disposed
data lines
liquid crystal
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PCT/CN2015/081302
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English (en)
French (fr)
Inventor
杜鹏
Original Assignee
深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/759,225 priority Critical patent/US20170139293A1/en
Publication of WO2016187903A1 publication Critical patent/WO2016187903A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/52—RGB geometrical arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00—Function characteristic
    • G02F2203/01—Function characteristic transmissive

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to a liquid crystal panel and an array substrate.
  • the liquid crystal display device is a main flat display device, and the liquid crystal panel is mainly composed of an array substrate and a color filter substrate.
  • the liquid crystal panel is currently manufactured, after the array substrate and the color filter substrate are separately manufactured, the two substrates are aligned.
  • a method for solving this problem is generally to provide a black matrix as a light-shielding structure on the color filter substrate to prevent light leakage on both sides of the data line;
  • the alignment of the array substrate and the color filter substrate is required, and the array substrate and the color filter substrate have alignment errors, and the array substrate and the color filter substrate are far apart. Therefore, the width of the black matrix tends to be larger than the width of the data line, so that when the upper and lower substrates are misaligned, the light shielding effect can still be achieved and light leakage can be prevented.
  • an excessively large width of the black matrix adversely affects the aperture ratio and the transmittance of the liquid crystal panel.
  • the technical problem to be solved by the present invention is to provide a liquid crystal panel and an array substrate, which can prevent light leakage on both sides of the data line and improve the accuracy of the relative position of the light shielding layer and the data line, thereby further reducing the width of the light shielding layer. It is possible to increase the aperture ratio and penetration rate.
  • a technical solution adopted by the present invention is to provide a liquid crystal panel, including:
  • Array substrate including:
  • each of the pixel units respectively includes a top gate type thin film transistor and a pixel electrode;
  • a light shielding layer directly under the plurality of data lines for preventing light leakage on each side of each of the data lines
  • liquid crystal layer disposed between the array substrate and the color filter substrate
  • a width of the light shielding layer is greater than a width of the data line
  • the color filter substrate includes:
  • a transparent substrate comprising a plurality of pixel regions corresponding to the pixel regions on the array substrate;
  • the color filter layer is composed of a color layer of RGB three primary colors, and the color layers of the RGB three primary colors are disposed in the corresponding pixel regions in RGB order.
  • the width of the light shielding layer is not more than 110% of the width of the data line.
  • each of the top gate thin film transistors respectively comprises:
  • the light shielding layer is disposed on the transparent substrate of the array substrate;
  • a source and a drain respectively covering the first insulating layer, and the source is adjacent to the drain;
  • a gate disposed over the second insulating layer and between the source and the drain;
  • the semiconductor layer forms a channel region between the source and the drain, and the light shielding layer further extends below the channel region to shield the light shielding region from light.
  • each of the top-gate thin film transistors is electrically connected to a corresponding scan line
  • the source is electrically connected to a corresponding data line
  • the drain and the pixel electrode are electrically connected. Sexual connection.
  • the color filter substrate further comprises:
  • a black matrix disposed on the transparent substrate, and comprising a plurality of black matrix films, wherein the plurality of black matrix films are disposed to intersect each other to divide the color filter substrate into the plurality of pixel regions;
  • the plurality of black matrix films are located directly above the plurality of data lines, and the width of each of the black matrix films is not greater than the width of each of the data lines.
  • a liquid crystal panel including:
  • Array substrate including:
  • each of the pixel units respectively includes a top gate type thin film transistor and a pixel electrode;
  • a light shielding layer directly under the plurality of data lines for preventing light leakage on each side of each of the data lines
  • a liquid crystal layer is disposed between the array substrate and the color filter substrate.
  • a width of the light shielding layer is greater than a width of the data line.
  • the width of the light shielding layer is not more than 110% of the width of the data line.
  • each of the top gate thin film transistors respectively comprises:
  • the light shielding layer is disposed on the transparent substrate of the array substrate;
  • a source and a drain respectively covering the first insulating layer, and the source is adjacent to the drain;
  • a gate disposed over the second insulating layer and between the source and the drain;
  • the semiconductor layer forms a channel region between the source and the drain, and the light shielding layer further extends below the channel region to shield the light shielding region from light.
  • each of the top-gate thin film transistors is electrically connected to a corresponding scan line
  • the source is electrically connected to a corresponding data line
  • the drain and the pixel electrode are electrically connected. Sexual connection.
  • the color filter substrate comprises:
  • a transparent substrate comprising a plurality of pixel regions corresponding to the pixel regions on the array substrate;
  • the color filter layer is composed of a color layer of RGB three primary colors, and the color layers of the RGB three primary colors are disposed in the corresponding pixel regions in RGB order.
  • the color filter substrate further comprises:
  • a black matrix disposed on the transparent substrate, and comprising a plurality of black matrix films, wherein the plurality of black matrix films are disposed to intersect each other to divide the color filter substrate into the plurality of pixel regions;
  • the plurality of black matrix films are located directly above the plurality of data lines, and the width of each of the black matrix films is not greater than the width of each of the data lines.
  • an array substrate including:
  • each of the pixel units respectively includes a top gate type thin film transistor and a pixel electrode;
  • the light shielding layer is located directly below the plurality of data lines for preventing light leakage on both sides of each of the data lines.
  • a width of the light shielding layer is greater than a width of the data line.
  • each of the top gate thin film transistors respectively comprises:
  • the light shielding layer is disposed on the transparent substrate of the array substrate;
  • a source and a drain respectively covering the first insulating layer, and the source is adjacent to the drain;
  • a gate disposed over the second insulating layer and between the source and the drain;
  • the semiconductor layer forms a channel region between the source and the drain, and the light shielding layer further extends below the channel region to shield the light shielding region from light.
  • the invention has the beneficial effects that the light shielding layer is disposed on the array substrate of the liquid crystal panel so as to be directly under the plurality of data lines, thereby shielding the plurality of data lines from the data lines.
  • Light leakage occurs on both sides; since the light shielding layer and the data line are both located on the array substrate, the positions of the two are fixed, the relative position accuracy is high, and the alignment error does not occur, and therefore, the width of the light shielding layer can be set.
  • the grounding is smaller and the possibility is provided.
  • the distance between the two is short, so that the width of the light shielding layer can be further reduced, and the liquid crystal panel is made small due to the small width of the light shielding layer.
  • the aperture ratio and transmittance can be improved.
  • FIG. 1 is a schematic structural view of an embodiment of an array substrate of a liquid crystal panel according to the present invention
  • Figure 2 is a cross-sectional view of the liquid crystal panel of the A-A direction of Figure 1;
  • Figure 3 is a cross-sectional view of the array substrate of the B-B direction of Figure 1;
  • FIG. 4 is a schematic structural view of an embodiment of an array substrate according to the present invention.
  • Figure 5 is a cross-sectional view taken along line A-A of Figure 4.
  • Figure 6 is a cross-sectional view taken along line B-B of Figure 4.
  • an embodiment of the present invention provides a liquid crystal panel including an array substrate 5, a color filter substrate 6, and a liquid crystal layer 7.
  • the array substrate 5 and the color filter substrate 6 are oppositely disposed, and the liquid crystal layer 7 is packaged. Between the array substrate 5 and the color filter substrate 6.
  • the array substrate 5 includes a plurality of scan lines 1, a plurality of data lines 2, a plurality of pixel units 3, and a light shielding layer 4.
  • the plurality of scan lines 1 are disposed in parallel with each other, and the plurality of data lines 2 are arranged in parallel with each other, and the plurality of scan lines are disposed. 1 and a plurality of data lines 2 are disposed to intersect each other, and the array substrate 5 is divided into a plurality of pixel regions, and the plurality of pixel units 3 are respectively formed in a plurality of pixel regions surrounded by the plurality of scanning lines 1 and the plurality of data lines 2, each of The pixel unit 3 includes a top gate thin film transistor 31 and a pixel electrode 32.
  • the gate of the top gate thin film transistor 31 is disposed above the source and the drain, and the top gate thin film transistor 31 is connected to the scan line 1, the data line 2, and
  • the pixel electrode 32 controls the top gate thin film transistor 31 to transmit the data signal of the data line 2 to the pixel electrode 32 by the scanning signal of the scanning line 1, and causes the pixel electrode 32 to generate an electric field to deflect the liquid crystal.
  • the light shielding layer 4 is disposed directly under the plurality of data lines 2, that is, a light shielding layer 4 is disposed directly under each of the data lines 2, and the light shielding layer 4 is configured to prevent light leakage on both sides of each of the data lines 2, since the backlight is from the light shielding layer 4, the direction of the data line 2 is irradiated, and the light shielding layer 4 is disposed under the data line 2, which can block the light that is incident on the data line 2, thereby preventing light leakage on both sides of the data line 2.
  • the light shielding layer 4 can cover the data. Line 2 is sufficient, the area of the light shielding layer 4 is not excessively large, and the area of the light shielding layer 4 is too large to affect the aperture ratio and the transmittance.
  • the light shielding layer 4 may be a metal light shielding layer, and the metal light shielding layer may be a key film, or an aluminum film, or a chromium film, or a copper film, or an alloy film composed of at least two of key, aluminum, chromium, and copper.
  • the light shielding layer 4 is disposed on the array substrate 5 so as to be directly under the plurality of data lines 2, thereby shielding the plurality of data lines 2 from light leakage, thereby preventing light leakage on both sides of the data line 2;
  • the data lines 2 are all located on the array substrate 5, so the positions of the two are fixed, the relative positional accuracy is high, and the alignment error does not occur. Therefore, the width of the light shielding layer 4 can be set smaller, and at the same time, Since the light shielding layer 4 and the data line 2 are both located on the array substrate 5, the distance between the two is short. Therefore, it is possible to further reduce the width of the light shielding layer 4, and the opening of the liquid crystal panel is small due to the small width of the light shielding layer 4. The rate and penetration rate can be improved.
  • the width of the light shielding layer 4 is larger than the width of the data line 2.
  • the pattern in which the light shielding layer 4 is distributed may be set to be the same as the pattern distributed by the data line 2, that is, the light shielding layer 4 is disposed under the data line 2 along the direction of the data line 2, so that the light shielding layer 4 can be justified.
  • the data line 2 is blocked without affecting other areas. Since the light shielding layer 4 has a certain distance from the data line 2, it needs to be disposed at a position blocking each data line 2, and the width of the light shielding layer 4 is larger than the width of the data line 2.
  • the same position means that the width of the light shielding layer 4 is slightly larger than the width of the data line 2 at the position corresponding to the light shielding layer 4 and the data line 2.
  • the light shielding layer 4 may be disposed to the both sides of the data item.
  • the width of the light shielding layer 4 of the embodiment of the present invention is smaller than the width of the black matrix disposed on the color filter substrate in the prior art for shielding light.
  • the width of the light shielding layer 4 is not more than 110% of the width of the data line 2.
  • the light shielding layer 4 may be disposed on the two sides of the data line 2 to occupy the width of the data line 2 without being the same width as the data line 2. More than 5% of the width; in other embodiments of the present invention, the width of the light shielding layer 4 may be not more than 105% of the width of the data line 2 or the width of the light shielding layer 4 is not more than 115% of the width of the data line 2.
  • each of the top gate thin film transistors 31 includes a light shielding layer 4, a first insulating layer 314, a source electrode 312, a drain electrode 313, a semiconductor layer 316, a second insulating layer 315, and a gate electrode 311, wherein
  • the light shielding layer 4 is disposed on the transparent substrate 51 of the array substrate 5, and the transparent substrate 51 is the substrate substrate of the array substrate 5.
  • the glass substrate may be used.
  • the first insulating layer 314 is over the light shielding layer 4, and the source 312 and the drain are provided.
  • a second insulating layer 315 is overlying the semiconductor layer 316, and a gate 311 is disposed over the second insulating layer 315 and between the source 312 and the drain 313; wherein the first insulating layer 314 of the embodiment of the present invention
  • the second insulating layer 315 may be an oxide of silicon or a nitride of silicon or the like.
  • the semiconductor layer 316 forms a channel region 8 between the source 312 and the drain 313, and the light shielding layer 4 further extends below the channel region 8 to shield the light shielding region from light.
  • the semiconductor layer 316 covers the source 312, the drain 313, and a region between the source 312 and the drain 313, and forms a channel region 8 between the source 312 and the drain 313.
  • the light-shielding layer 4 is disposed on the array substrate 5 to shield the channel region 8 between the source 312 and the drain 313.
  • the light-shielding layer 4 is extended and expanded to make the same data line. 2 shading, which can prevent light leakage on both sides of the data line 2, and at the same time simplify the manufacturing process.
  • each of the top gate thin film transistors 31 is electrically connected to a corresponding scan line 1
  • the source 312 is electrically connected to a corresponding data line 2
  • the drain 313 is electrically connected to the pixel electrode 32 .
  • the data line 2 and the pixel electrode 32 of the embodiment of the present invention may be disposed between the first insulating layer 314 and the second insulating layer 315.
  • the color filter substrate 6 includes a transparent substrate 61 and a color filter layer 62.
  • the transparent substrate 61 includes a plurality of pixel regions corresponding to the pixel regions on the array substrate 5.
  • the color filter layer 62 is composed of RGB (red and green).
  • the blue color is composed of the color layers of the three primary colors, and the color layers of the RGB three primary colors are disposed in the corresponding pixel regions in the RGB order.
  • the black matrix is not disposed on the color filter substrate 6, but only the light shielding layer 4 is disposed on the array substrate 5 to prevent the data line 2 from being formed.
  • the color filter substrate 6 further includes a black matrix 63 disposed on the transparent substrate 61, and includes a plurality of black matrix films, and a plurality of black matrix films are disposed to cross each other.
  • the color filter substrate 6 is divided into a plurality of pixel regions corresponding to the pixel regions on the array substrate 5; wherein the plurality of black matrix films are located directly above the plurality of data lines 2, and the width of each of the black matrix films is not Greater than the width of each data line 2.
  • the black matrix 63 on the color filter substrate 6 is disposed at a position corresponding to the data line 2, thereby further improving the effect of preventing light leakage on both sides of the data line 2, and setting the width of the black matrix 63 to be less than or equal to the data line 2
  • the width of the black matrix is smaller than that of the conventional color filter substrate, and the influence on the aperture ratio and the transmittance of the liquid crystal panel can be effectively reduced.
  • the array substrate includes a plurality of scan lines 10 and more. a data line 20, a plurality of pixel units 30, wherein the plurality of pixel units 30 are formed in a plurality of pixel regions formed by the intersection of the plurality of scan lines 10 and the plurality of data lines 20, and each of the pixel units 30 respectively
  • the top gate type thin film transistor 310 and the pixel electrode 320 are included; the light shielding layer 40 is located directly under the plurality of data lines 20 for preventing light leakage on both sides of each of the data lines 20.
  • the light shielding layer 40 is disposed on the array substrate so as to be directly under the data line 20, thereby shielding the data line 20 from light leakage on both sides of the data line 20; since both the light shielding layer 40 and the data line 20 are located On the array substrate, the positions of the two are fixed, the relative positional accuracy is high, and the alignment error does not occur. Therefore, the width of the light shielding layer 40 can be set smaller, and at the same time, due to the light shielding layer 40 and the data line. 20 is located on the array substrate, and the distance between the two is short. Therefore, the width of the light shielding layer 40 can be further reduced. Since the width of the light shielding layer 40 is small, the aperture ratio and the transmittance of the liquid crystal panel are improved.
  • the width of the light shielding layer 40 is larger than the width of the data line 20.
  • each of the top gate thin film transistors 310 includes a light shielding layer 40, a first insulating layer 3140, a source 3120, a drain 3130, a semiconductor layer 3160, a second insulating layer 3150, and a gate 3110; 40 is disposed on the transparent substrate of the array substrate; the first insulating layer 3140 is over the light shielding layer 40; the source 3120 and the drain 3130 are respectively over the first insulating layer 3140, and the source 3120 and the drain 3130 are The semiconductor layer 3160 is overlying the source 3120 and the drain 3130; the second insulating layer 3150 is over the semiconductor layer 3160; the gate 3110 is disposed over the second insulating layer 3150 and located at the source 3120. And a drain 3130; wherein the semiconductor layer 3160 forms a channel region between the source 3120 and the drain 3130, and the light shielding layer 40 further extends below the channel region to shield the light shielding region from light.
  • the array substrate of the embodiment of the present invention has the same structure as that of the array substrate in the liquid crystal panel of the above embodiment, and the same effect can be produced.
  • the above embodiments and details are not described herein.

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Abstract

一种液晶面板及阵列基板（5）。液晶面板包括阵列基板（5）、彩色滤光片基板（6）和液晶层（7），阵列基板（5）包括多条扫描线（1）、多条数据线（2）、多个像素单元（3）和遮光层（4），多个像素单元（3）形成在多条扫描线（1）和多条数据线（2）围成的像素区域内，且其包括顶栅型薄膜晶体管（31）和像素电极（32）；遮光层（4）位于多条数据线（2）正下方，用于防止每条数据线（2）两侧漏光。液晶面板能够防止数据线（2）两侧漏光，同时提高遮光层（4）与数据线（2）相对位置的精度，从而进一步为减小遮光层（4）的宽度和提高开口率和穿透率提供可能。

Description

一种液晶面板和阵列基板
【技术领域】
本发明涉及液晶显示技术领域，特别是涉及液晶面板和阵列基板。
【背景技术】
液晶显示装置是一种主要的平面显示装置，液晶面板主要由阵列基板和彩色滤光片基板组成。目前制造液晶面板时，分别制造阵列基板和彩色滤光片基板之后，将两个基板进行对合。
现有的液晶面板的阵列基板上经常出现数据线两侧漏光的现象，目前解决这个问题的方法通常是在彩色滤光片基板上设置黑矩阵作为遮光结构，防止数据线两侧出现的漏光；但是在传统的液晶面板制作工艺中，需要阵列基板和彩色滤光片基板的对位，由于阵列基板和彩色滤光片基板存在对位的误差，并且阵列基板和彩色滤光片基板距离较远，所以黑矩阵的宽度往往比数据线的宽度更大，这样在上下基板发生错位的时候仍然能够起到遮光作用，并防止漏光。但是，黑矩阵的宽度过大将对液晶面板的开口率和穿透率造成不利的影响。
【发明内容】
本发明主要解决的技术问题是提供一种液晶面板和阵列基板，能够防止数据线两侧漏光，同时提高遮光层与数据线相对位置的精度，从而进一步为减小遮光层的宽度提供可能，为提高开口率和穿透率提供可能。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种液晶面板，包括：
阵列基板，包括：
多条扫描线，设置在所述阵列基板上；
多条数据线，设置在所述阵列基板上；
多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光；
彩色滤光片基板，与所述阵列基板相对设置；
液晶层，设置在所述阵列基板和彩色滤光片基板之间；
其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度；
所述彩色滤光片基板包括：
透明基板，包括多个与所述阵列基板上的所述像素区域对应的像素区域；
彩色滤光片层，其由RGB三原色的彩色层而组成，且所述RGB三原色的彩色层按照RGB顺序而设置在对应的所述像素区域中。
其中，所述遮光层的宽度不大于所述数据线宽度的110%。
其中，每个所述顶栅型薄膜晶体管分别包括：
所述遮光层，设置在所述阵列基板的透明基板上；
第一绝缘层，覆盖在所述遮光层之上；
源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
半导体层，覆盖在所述源极和所述漏极之上；
第二绝缘层，覆盖在所述半导体层之上；
栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
其中，每个所述顶栅型薄膜晶体管中的所述栅极电性连接一条对应的扫描线，所述源极电性连接一条对应的数据线，而所述漏极与所述像素电极电性连接。
其中，所述彩色滤光片基板进一步包括：
黑矩阵，设置在所述透明基板上，且其包括多条黑矩阵薄膜，所述多条黑矩阵薄膜相互交叉设置，以将所述彩色滤光片基板划分为所述多个像素区域；
其中，所述多条黑矩阵薄膜位于所述多条数据线正上方，且每条所述黑矩阵薄膜的宽度不大于每条所述数据线的宽度。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶面板，包括：
阵列基板，包括：
多条扫描线，设置在所述阵列基板上；
多条数据线，设置在所述阵列基板上；
多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光；
彩色滤光片基板，与所述阵列基板相对设置；
液晶层，设置在所述阵列基板和彩色滤光片基板之间。
其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度。
其中，所述遮光层的宽度不大于所述数据线宽度的110%。
其中，每个所述顶栅型薄膜晶体管分别包括：
所述遮光层，设置在所述阵列基板的透明基板上；
第一绝缘层，覆盖在所述遮光层之上；
源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
半导体层，覆盖在所述源极和所述漏极之上；
第二绝缘层，覆盖在所述半导体层之上；
栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
其中，每个所述顶栅型薄膜晶体管中的所述栅极电性连接一条对应的扫描线，所述源极电性连接一条对应的数据线，而所述漏极与所述像素电极电性连接。
其中，所述彩色滤光片基板包括：
透明基板，包括多个与所述阵列基板上的所述像素区域对应的像素区域；
彩色滤光片层，其由RGB三原色的彩色层而组成，且所述RGB三原色的彩色层按照RGB顺序而设置在对应的所述像素区域中。
其中，所述彩色滤光片基板进一步包括：
黑矩阵，设置在所述透明基板上，且其包括多条黑矩阵薄膜，所述多条黑矩阵薄膜相互交叉设置，以将所述彩色滤光片基板划分为所述多个像素区域；
其中，所述多条黑矩阵薄膜位于所述多条数据线正上方，且每条所述黑矩阵薄膜的宽度不大于每条所述数据线的宽度。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种阵列基板，包括：
多条扫描线，设置在所述阵列基板上；
多条数据线，设置在所述阵列基板上；
多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光。
其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度。
其中，每个所述顶栅型薄膜晶体管分别包括：
所述遮光层，设置在所述阵列基板的透明基板上；
第一绝缘层，覆盖在所述遮光层之上；
源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
半导体层，覆盖在所述源极和所述漏极之上；
第二绝缘层，覆盖在所述半导体层之上；
栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
本发明的有益效果是：区别于现有技术的情况，本发明在液晶面板的阵列基板上设置遮光层，使其处于多条数据线正下方，从而对多条数据线进行遮光，防止数据线两侧出现漏光现象；由于遮光层和数据线均位于阵列基板上，所以两者的位置是固定的，相对位置精度高，不会出现对位误差的情况，因此，可以为遮光层的宽度设置地更小提供可能，同时，由于遮光层和数据线均位于阵列基板上，两者距离较短，因此，可以为遮光层的宽度进一步减小提供可能，由于遮光层宽度较小，使得液晶面板的开口率和穿透率能够得到提高。
【附图说明】
图1是本发明一种液晶面板的阵列基板一实施方式的结构示意图；
图2是图1中A-A向的液晶面板的剖视图；
图3是图1中B-B向的阵列基板的剖视图；
图4是本发明一种阵列基板一实施方式的结构示意图；
图5是图4中A-A向的剖视图；
图6是图4中B-B向的剖视图。
【具体实施方式】
下面结合附图和实施方式对本发明进行详细说明。
如图1和图2，本发明实施方式提供一种液晶面板，包括阵列基板5、彩色滤光片基板6和液晶层7，阵列基板5和彩色滤光片基板6相对设置，液晶层7封装在阵列基板5和彩色滤光片基板6之间。
其中，阵列基板5包括多条扫描线1、多条数据线2、多个像素单元3和遮光层4，多条扫描线1相互平行设置，多条数据线2相互平行设置，多条扫描线1与多条数据线2相互交叉设置，将阵列基板5分成多个像素区域，多个像素单元3分别形成在多条扫描线1和多条数据线2围成的多个像素区域内，每个像素单元3包括顶栅型薄膜晶体管31和像素电极32，顶栅型薄膜晶体管31的栅极设置在源极和漏极的上方，顶栅型薄膜晶体管31连接扫描线1、数据线2和像素电极32，通过扫描线1的扫描信号控制顶栅型薄膜晶体管31将数据线2的资料信号传送至像素电极32，使像素电极32产生电场而使液晶发生偏转。
遮光层4设置于多条数据线2正下方，即每条数据线2的正下方均设置有遮光层4，遮光层4用于防止每条数据线2两侧漏光，由于背光是从遮光层4向数据线2方向照射，在数据线2下方设置遮光层4，能将射向数据线2的光线遮挡，从而防止数据线2两侧出现漏光现象，一般地，遮光层4能覆盖住数据线2即可，遮光层4的面积不宜过大，遮光层4的面积过大将影响开口率和穿透率。遮光层4可以是金属遮光层，金属遮光层可以是钥薄膜，或铝薄膜，或铬薄膜，或铜薄膜，或钥、铝、铬以及铜中至少两种构成的合金薄膜。
本发明实施方式在阵列基板5上设置遮光层4，使其处于多条数据线2正下方，从而对多条数据线2进行遮光，防止数据线2两侧出现漏光现象；由于遮光层4和数据线2均位于阵列基板5上，所以两者的位置是固定的，相对位置精度高，不会出现对位误差的情况，因此，可以为遮光层4的宽度设置地更小提供可能，同时，由于遮光层4和数据线2均位于阵列基板5上，两者距离较短，因此，可以为遮光层4的宽度进一步减小提供可能，由于遮光层4宽度较小，使得液晶面板的开口率和穿透率能够得到提高。
其中，在遮挡每条数据线2的位置处，遮光层4的宽度大于数据线2的宽度。
在本发明实施方式中，可将遮光层4分布的图案设置为与数据线2分布的图案相同，即沿着数据线2的走向在数据线2下方设置遮光层4，使遮光层4正好能遮住数据线2，而不对其它区域产生影响，由于遮光层4离数据线2有一定距离，所以需要设置在遮挡每条数据线2的位置处，遮光层4的宽度大于数据线2的宽度，在相同位置处是指在遮光层4与数据线2对应的位置处，遮光层4的宽度稍大于数据线2的宽度即可，具体地，可设置遮光层4向数据项两侧方向分别延伸出一定宽度；本发明实施方式的遮光层4的宽度要比现有技术中设置在彩色滤光片基板上用于遮光的黑矩阵宽度小。
其中，遮光层4的宽度不大于数据线2宽度的110%，具体地，可设置遮光层4在与数据线2相同宽度的情况下向数据线2两侧分别延伸出占数据线2宽度不大于5%的宽度；在本发明其它实施方式中，也可设置遮光层4的宽度不大于数据线2宽度的105%或遮光层4的宽度不大于数据线2宽度的115%。
如图3，其中，每个顶栅型薄膜晶体管31分别包括遮光层4、第一绝缘层314、源极312、漏极313、半导体层316、第二绝缘层315和栅极311，其中，遮光层4设置在阵列基板5的透明基板51上，透明基板51为阵列基板5的衬底基板，可采用玻璃基板，第一绝缘层314覆盖在遮光层4之上，源极312和漏极313分别覆盖在第一绝缘层314之上，且源极312与漏极313相邻间隔设置，半导体层316覆盖在源极312和漏极313之上，半导体层316可以采用非晶硅，第二绝缘层315覆盖在半导体层316之上，栅极311设置在第二绝缘层315之上，并位于源极312和漏极313之间；其中，本发明实施方式的第一绝缘层314和第二绝缘层315可为硅的氧化物或硅的氮化物等。
其中，半导体层316在源极312和漏极313之间形成沟道区8，遮光层4进一步延伸至沟道区8的下方，以对遮光区进行遮光。半导体层316覆盖源极312、漏极313以及源极312和漏极313之间的区域，并在源极312和漏极313之间形成沟道区8。
一般地，阵列基板5上会设置遮光层4对源极312和漏极313之间的沟道区8进行遮光，本发明实施方式将该遮光层4进行延伸扩大，使其同样也对数据线2进行遮光，这样既能防止数据线2两侧出现漏光的情况，同时也能简化制作工艺。
其中，每个顶栅型薄膜晶体管31中的栅极311电性连接一条对应的扫描线1，源极312电性连接一条对应的数据线2，而漏极313与像素电极32电性连接。本发明实施方式的数据线2和像素电极32可设置在第一绝缘层314和第二绝缘层315之间。
本发明实施方式及附图只是对遮光层4、栅极311、漏极313、源极312和数据线2的相对位置关系做出示意性地表示，并不限定阵列基板5的具体结构，具体如何沉积制作，是本领域制作液晶面板常规的技术。
其中，彩色滤光片基板6包括透明基板61和彩色滤光片层62，透明基板61包括多个与阵列基板5上的像素区域对应的像素区域，彩色滤光片层62由RGB（红绿蓝）三原色的彩色层而组成，且RGB三原色的彩色层按照RGB顺序而设置在对应的像素区域中。
与现有的彩色滤光片基板相比，在本发明实施方式中，彩色滤光片基板6上不设置黑矩阵，而只是在阵列基板5上设置遮光层4就能起到防止数据线2两侧漏光的作用，同时由于彩色滤光片上没有黑矩阵，使得液晶面板的开口率和穿透率得到提高。
其中，在本发明其它实施方式中，彩色滤光片基板6进一步包括黑矩阵63，黑矩阵63设置在透明基板61上，且其包括多条黑矩阵薄膜，多条黑矩阵薄膜相互交叉设置，以将彩色滤光片基板6划分为多个与阵列基板5上的像素区域对应的像素区域；其中，多条黑矩阵薄膜位于多条数据线2正上方，且每条黑矩阵薄膜的宽度不大于每条数据线2的宽度。本发明实施方式将彩色滤光片基板6上的黑矩阵63设置在对应数据线2的位置，进一步提高防止数据线2两侧漏光的效果，同时设置黑矩阵63的宽度小于或等于数据线2的宽度，与现有的彩色滤光片基板相比，黑矩阵的宽度变小了，能有效降低对液晶面板的开口率和穿透率的影响。
如图4和图5，本发明另一实施方式提供一种阵列基板，该阵列基板与上述实施方式的液晶面板中的阵列基板具有相同结构，具体地，阵列基板包括多条扫描线10、多条数据线20、多个像素单元30，其中，多个像素单元30，形成在多条扫描线10和多条数据线20相互交叉所形成的多个像素区域内，且每个像素单元30分别包括顶栅型薄膜晶体管310和像素电极320；遮光层40位于多条数据线20正下方，用于防止每条数据线20两侧漏光。
本发明实施方式在阵列基板上设置遮光层40，使其处于数据线20正下方，从而对数据线20进行遮光，防止数据线20两侧出现漏光现象；由于遮光层40和数据线20均位于阵列基板上，所以两者的位置是固定的，相对位置精度高，不会出现对位误差的情况，因此，可将遮光层40的宽度设置地更小，同时，由于遮光层40和数据线20均位于阵列基板上，两者距离较短，因此，遮光层40的宽度可进一步减小，由于遮光层40宽度较小，使得液晶面板的开口率和穿透率得到提高。
其中，在遮挡每条数据线20的位置处，遮光层40的宽度大于数据线20的宽度。
如图6，其中，每个顶栅型薄膜晶体管310分别包括遮光层40、第一绝缘层3140、源极3120、漏极3130、半导体层3160、第二绝缘层3150、栅极3110；遮光层40设置在阵列基板的透明基板上；第一绝缘层3140覆盖在遮光层40之上；源极3120和漏极3130分别覆盖在第一绝缘层3140之上，且源极3120与漏极3130相邻间隔设置；半导体层3160覆盖在源极3120和漏极3130之上；第二绝缘层3150覆盖在半导体层3160之上；栅极3110设置在第二绝缘层3150之上，并位于源极3120和漏极3130之间；其中，半导体层3160在源极3120和漏极3130之间形成沟道区，遮光层40进一步延伸至沟道区的下方，以对遮光区进行遮光。
本发明实施方式的阵列基板与上述实施方式的液晶面板中的阵列基板的结构完全相同，且可产生相同效果，具体细节请参照上述实施方式，在此不一一赘述。
以上仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其它相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (15)

  1. 一种液晶面板，其中，包括：
    阵列基板，包括：
    多条扫描线，设置在所述阵列基板上；
    多条数据线，设置在所述阵列基板上；
    多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
    遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光；
    彩色滤光片基板，与所述阵列基板相对设置；
    液晶层，设置在所述阵列基板和彩色滤光片基板之间；
    其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度；
    所述彩色滤光片基板包括：
    透明基板，包括多个与所述阵列基板上的所述像素区域对应的像素区域；
    彩色滤光片层，其由红绿蓝（RGB）三原色的彩色层而组成，且所述RGB三原色的彩色层按照RGB顺序而设置在对应的所述像素区域中。
  2. 根据权利要求1所述的液晶面板，其中，所述遮光层的宽度不大于所述数据线宽度的110%。
  3. 根据权利要求1所述的液晶面板，其中，每个所述顶栅型薄膜晶体管分别包括：
    所述遮光层，设置在所述阵列基板的透明基板上；
    第一绝缘层，覆盖在所述遮光层之上；
    源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
    半导体层，覆盖在所述源极和所述漏极之上；
    第二绝缘层，覆盖在所述半导体层之上；
    栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
    其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
  4. 根据权利要求3所述的液晶面板，其中，每个所述顶栅型薄膜晶体管中的所述栅极电性连接一条对应的扫描线，所述源极电性连接一条对应的数据线，而所述漏极与所述像素电极电性连接。
  5. 根据权利要求1所述的液晶面板，其中，所述彩色滤光片基板进一步包括：
    黑矩阵，设置在所述透明基板上，且其包括多条黑矩阵薄膜，所述多条黑矩阵薄膜相互交叉设置，以将所述彩色滤光片基板划分为所述多个像素区域；
    其中，所述多条黑矩阵薄膜位于所述多条数据线正上方，且每条所述黑矩阵薄膜的宽度不大于每条所述数据线的宽度。
  6. 一种液晶面板，其中，包括：
    阵列基板，包括：
    多条扫描线，设置在所述阵列基板上；
    多条数据线，设置在所述阵列基板上；
    多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
    遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光；
    彩色滤光片基板，与所述阵列基板相对设置；
    液晶层，设置在所述阵列基板和彩色滤光片基板之间。
  7. 根据权利要求6所述的液晶面板，其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度。
  8. 根据权利要求7所述的液晶面板，其中，所述遮光层的宽度不大于所述数据线宽度的110%。
  9. 根据权利要求6所述的液晶面板，其中，每个所述顶栅型薄膜晶体管分别包括：
    所述遮光层，设置在所述阵列基板的透明基板上；
    第一绝缘层，覆盖在所述遮光层之上；
    源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
    半导体层，覆盖在所述源极和所述漏极之上；
    第二绝缘层，覆盖在所述半导体层之上；
    栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
    其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
  10. 根据权利要求9所述的液晶面板，其中，每个所述顶栅型薄膜晶体管中的所述栅极电性连接一条对应的扫描线，所述源极电性连接一条对应的数据线，而所述漏极与所述像素电极电性连接。
  11. 根据权利要求6所述的液晶面板，其中，所述彩色滤光片基板包括：
    透明基板，包括多个与所述阵列基板上的所述像素区域对应的像素区域；
    彩色滤光片层，其由红绿蓝（RGB）三原色的彩色层而组成，且所述RGB三原色的彩色层按照RGB顺序而设置在对应的所述像素区域中。
  12. 根据权利要求11所述的液晶面板，其中，所述彩色滤光片基板进一步包括：
    黑矩阵，设置在所述透明基板上，且其包括多条黑矩阵薄膜，所述多条黑矩阵薄膜相互交叉设置，以将所述彩色滤光片基板划分为所述多个像素区域；
    其中，所述多条黑矩阵薄膜位于所述多条数据线正上方，且每条所述黑矩阵薄膜的宽度不大于每条所述数据线的宽度。
  13. 一种阵列基板，其中，包括：
    多条扫描线，设置在所述阵列基板上；
    多条数据线，设置在所述阵列基板上；
    多个像素单元，形成在所述多条扫描线和所述多条数据线相互交叉所形成的多个像素区域内，且每个所述像素单元分别包括顶栅型薄膜晶体管和像素电极；
    遮光层，位于所述多条数据线正下方，用于防止每条所述数据线两侧漏光。
  14. 根据权利要求13所述的阵列基板，其中，在遮挡每条所述数据线的位置处，所述遮光层的宽度大于所述数据线的宽度。
  15. 根据权利要求13所述的阵列基板，其中，每个所述顶栅型薄膜晶体管分别包括：
    所述遮光层，设置在所述阵列基板的透明基板上；
    第一绝缘层，覆盖在所述遮光层之上；
    源极和漏极，其分别覆盖在所述第一绝缘层之上，且所述源极与所述漏极相邻间隔设置；
    半导体层，覆盖在所述源极和所述漏极之上；
    第二绝缘层，覆盖在所述半导体层之上；
    栅极，设置在所述第二绝缘层之上，并位于所述源极和所述漏极之间；
    其中，所述半导体层在所述源极和所述漏极之间形成沟道区，所述遮光层进一步延伸至所述沟道区的下方，以对所述遮光区进行遮光。
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