CN111682033A - 显示面板及其制作方法 - Google Patents

显示面板及其制作方法 Download PDF

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CN111682033A
CN111682033A CN202010647750.3A CN202010647750A CN111682033A CN 111682033 A CN111682033 A CN 111682033A CN 202010647750 A CN202010647750 A CN 202010647750A CN 111682033 A CN111682033 A CN 111682033A
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manufacturing
substrate
electrode
grid
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张伟伟
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods

Abstract

本发明提供一种显示面板及其制作方法。显示面板包括阵列基板以及与所述阵列基板对应设置的彩膜基板。所述阵列基板包括层叠设置的衬底基板、源漏极层、有源层、栅极绝缘层、栅极层、平坦层以及像素电极层。本发明通过在阵列基板形成倒置的薄膜晶体管结构,将像素电极层覆盖到源漏极层的走线上,从而阻断阵列基板上的源漏极层与彩膜基板上的公共电极层之间的寄生电容,以及阻断阵列基板上的源漏极层与像素电极层之间的寄生电容,从而规避信号串扰的发生,有助于提升产品的显示、触控品质。

Description

显示面板及其制作方法
技术领域
本发明涉及显示领域,尤其涉及一种显示面板及其制作方法。
背景技术
当前产品向高分辨率趋势发展,显示面板的尺寸越来越小,其中像素电路中存在的寄生电容对产品品质有负面影响,信号串扰等变得严重。
如图1所示,为现有一种显示面板的结构示意图,显示面板90包括阵列基板91及对应设置的彩膜基板92,其中阵列基板91包括衬底层911以及位于衬底层911上设有多个薄膜晶体管,每一薄膜晶体管从下至上依次包括栅极层912、栅极绝缘层913、有源层914、源漏极层915、平坦层916、阳极层917,为了保证电路稳定性,还设有与栅极层912同层设置的电容层918,该电容层918与阳极层917之间形成储存电容,但是在源漏极层915和阳极层917之间会产生寄生电容Cpd;彩膜基板92在朝向所述阵列基板91一侧设有公共电极层921,该公共电极层921与源漏极层915形成寄生电容Cdc。如图2所示,为图1所示结构的电容原理示意图,主要体现了寄生电容Cpd、寄生电容Cdc的形成位置。
然而,存在的寄生电容Cpd、寄生电容Cdc对产品显示、触控有负面影响,信号串扰等变得严重,成为高分辨率面板需解决的技术问题。
发明内容
本发明的目的在于,提供一种显示面板及其制作方法,用于克服显示面板中存在的寄生电容对产品显示、触控有负面影响,信号串扰等变得严重这一技术问题。
为了解决上述问题,本发明提供一种显示面板,包括阵列基板以及与所述阵列基板对应设置的彩膜基板。其中,所述阵列基板包括层叠设置的衬底基板、源漏极层、有源层、栅极绝缘层、栅极层、平坦层以及像素电极层;具体地讲,所述源漏极层设于所述衬底基板上,设有源极和漏极;所述有源层设于所述源漏极层上,其两端分别与所述源极和所述漏极电性连接;所述栅极绝缘层设于所述衬底层上,并覆盖所述有源层和所述源漏极层;所述栅极层设于所述栅极绝缘层上,并与所述有源层对应设置;所述平坦层设于所述栅极绝缘层上,并覆盖所述栅极层;所述像素电极层设于所述平坦层上,并通过一过孔与所述漏极电性连接。
进一步地,所述衬底基板包括基底层、遮光层以及缓冲层;所述遮光层设于所述基底层上;所述缓冲层设于所述基底层上,并覆盖所述遮光层。
进一步地,所述遮光层为金属层或黑色矩阵层。
进一步地,所述阵列基板还包括:电容层,与所述栅极层设于同一层,与所述像素电极层相对设置形成存储电容。
进一步地,所述彩膜基板包括:玻璃基底层;以及公共电极层,设于所述玻璃基底层上。
为了解决上述问题,本发明还提供一种显示面板的制作方法,其包括步骤:制作一阵列基板;以及制作一彩膜基板,将所述彩膜基板与所述阵列基板对应设置。其中,所述阵列基板包括层叠设置的衬底基板、源漏极层、有源层、栅极绝缘层、栅极层、平坦层以及像素电极层;具体地讲,所述源漏极层设于所述衬底基板上,设有源极和漏极;所述有源层设于所述源漏极层上,其两端分别与所述源极和所述漏极电性连接;所述栅极绝缘层设于所述衬底层上,并覆盖所述有源层和所述源漏极层;所述栅极层设于所述栅极绝缘层上,并与所述有源层对应设置;所述平坦层设于所述栅极绝缘层上,并覆盖所述栅极层;所述像素电极层设于所述平坦层上,并通过一过孔与所述漏极电性连接。
进一步地,所述制作一阵列基板包括步骤:
制作一衬底基板;
制作源漏极层,在所述衬底基板上制作一源漏极层,所述源漏极层设有源极和漏极;
制作有源层,在所述源漏极层上制作一有源层,所述有源层的两端分别与所述源极和所述漏极电性连接;
制作栅极绝缘层,在所述衬底层上制作一栅极绝缘层,所述栅极绝缘覆盖所述有源层和所述源漏极层;
制作栅极层,在所述栅极绝缘层上制作一栅极层,所述栅极层与所述有源层对应设置;
制作平坦层,在所述栅极绝缘层上制作一平坦层,所述平坦层覆盖所述栅极层;以及
制作像素电极层,在所述平坦层上制作一像素电极层,所述像素电极层通过一过孔与所述漏极电性连接。
进一步地,所述制作一衬底基板包括步骤:
制作基底层;
制作遮光层,在所述基底层上制作遮光层;以及
制作缓冲层,在所述基底层上制作缓冲层,所述缓冲层覆盖所述遮光层。
进一步地,所述制作一阵列基板还包括步骤:制作电容层,在制作所述栅极层时同时制作一电容层,所述电容层与所述栅极层设于同一层,与所述像素电极层相对设置形成存储电容。
进一步地,所述制作一彩膜基板包括步骤:提供一玻璃基底层;以及制作公共电极层,在所述玻璃基底层上制作公共电极层。
本发明的优点在于,提供一种显示面板及其制作方法,通过将阵列基板上的栅极层与源漏极层的顺序交换,形成倒置的薄膜晶体管结构,将像素电极层覆盖到源漏极层的走线上,从而阻断阵列基板上的源漏极层与彩膜基板上的公共电极层之间的寄生电容,以及阻断阵列基板上的源漏极层与像素电极层之间的寄生电容,从而规避信号串扰的发生,有助于提升产品的显示、触控品质。
附图说明
下面结合附图,通过对本申请的具体实施方式详细描述,将使本申请的技术方案及其它有益效果显而易见。
图1为现有一种显示面板的结构示意图;
图2为图1所示结构的电容原理示意图;
图3为本发明实施例中一种显示面板的结构示意图;
图4为本发明实施例中一种显示面板的制作方法的流程图;
图5为本发明实施例中所述阵列基板的制作步骤流程图;
图6为本发明实施例中所述衬底基板的制作步骤流程图;
图7为本发明实施例中所述彩膜基板的制作步骤流程图。
图中部件标识如下:
1、阵列基板,2、彩膜基板,10、显示面板,
11、衬底基板,12、源漏极层,13、有源层,
14、栅极绝缘层,15、栅极层,16、平坦层,
17、像素电极层,18、电容层,21、玻璃基底层,
22、公共电极层,111、基底层,112、遮光层,
113、缓冲层,121、源极,122、漏极。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接或可以相互通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方,或仅仅表示第一特征水平高度小于第二特征。
具体的,请参阅图3所示,本发明实施例中提供一种显示面板10,包括阵列基板1以及与所述阵列基板1对应设置的彩膜基板2。
其中,所述阵列基板1包括层叠设置的衬底基板11、源漏极层12、有源层13、栅极绝缘层14、栅极层15、平坦层16以及像素电极层17;具体地讲,所述源漏极层12设于所述衬底基板11上,设有源极121和漏极122;所述有源层13设于所述源漏极层12上,其两端分别与所述源极121和所述漏极122电性连接;所述栅极绝缘层14设于所述衬底层上,并覆盖所述有源层13和所述源漏极层12;所述栅极层15设于所述栅极绝缘层14上,并与所述有源层13对应设置;所述平坦层16设于所述栅极绝缘层14上,并覆盖所述栅极层15;所述像素电极层17设于所述平坦层16上,并通过一过孔与所述漏极122电性连接。
本实施例中,所述彩膜基板2包括玻璃基底层21以及设于所述玻璃基底层21上的公共电极层22,其中所述公共电极层22与所述阵列基板1的像素电极层17对应设置。
本实施例通过将阵列基板1上的栅极层15与源漏极层12的顺序交换,形成倒置的薄膜晶体管结构,将像素电极层17覆盖到源漏极层12的走线上,从而阻断阵列基板1上的源漏极层12与彩膜基板2上的公共电极层之间的寄生电容,以及阻断阵列基板1上的源漏极层12与像素电极层17之间的寄生电容,从而规避信号串扰的发生,有助于提升产品的显示、触控品质。
本实施例中,所述衬底基板11包括基底层111、遮光层112以及缓冲层113;所述遮光层112设于所述基底层111上;所述缓冲层113设于所述基底层111上,并覆盖所述遮光层112。
本实施例中,所述遮光层112为金属层或黑色矩阵层,用遮光避免光线对所述有源层13的影响。
本实施例中,所述阵列基板1还包括:电容层18,与所述栅极层15设于同一层,与所述像素电极层17相对设置形成存储电容。
请参阅图4所示,本发明还提供一种上文所述显示面板10的制作方法,其包括步骤:
S1、制作一阵列基板1;以及
S2、制作一彩膜基板2,将所述彩膜基板2与所述阵列基板1对应设置。
其中,请参阅图3所示,所述阵列基板1包括层叠设置的衬底基板11、源漏极层12、有源层13、栅极绝缘层14、栅极层15、平坦层16以及像素电极层17;具体地讲,所述源漏极层12设于所述衬底基板11上,设有源极121和漏极;所述有源层13设于所述源漏极层12上,其两端分别与所述源极121和所述漏极122电性连接;所述栅极绝缘层14设于所述衬底层上,并覆盖所述有源层13和所述源漏极层12;所述栅极层15设于所述栅极绝缘层14上,并与所述有源层13对应设置;所述平坦层16设于所述栅极绝缘层14上,并覆盖所述栅极层15;所述像素电极层17设于所述平坦层16上,并通过一过孔与所述漏极122电性连接。所述彩膜基板2包括玻璃基底层21以及设于所述玻璃基底层21上的公共电极层22,其中所述公共电极层22与所述阵列基板1的像素电极层17对应设置。
本实施例通过将阵列基板1上的栅极层15与源漏极层12的顺序交换,形成倒置的薄膜晶体管结构,将像素电极层17覆盖到源漏极层12的走线上,从而阻断阵列基板1上的源漏极层12与彩膜基板2上的公共电极层之间的寄生电容,以及阻断阵列基板1上的源漏极层12与像素电极层17之间的寄生电容,从而规避信号串扰的发生,有助于提升产品的显示、触控品质。
请参阅图5所示,本实施例中,所述制作一阵列基板1包括步骤:
S11、制作一衬底基板11;
S12、制作源漏极层12,在所述衬底基板11上制作一源漏极层12,所述源漏极层12设有源极121和漏极;
S13、制作有源层13,在所述源漏极层12上制作一有源层13,所述有源层13的两端分别与所述源极121和所述漏极122电性连接;其中所述有源层13的两端掺杂处理,便于减少电阻并在所述有源层13的中部形成沟道区;
S14、制作栅极绝缘层14,在所述衬底层上制作一栅极绝缘层14,所述栅极绝缘覆盖所述有源层13和所述源漏极层12;
S15、制作栅极层15,在所述栅极绝缘层14上制作一栅极层15,所述栅极层15与所述有源层13对应设置;
S16、制作平坦层16,在所述栅极绝缘层14上制作一平坦层16,所述平坦层16覆盖所述栅极层15;以及
S17、制作像素电极层17,在所述平坦层16上制作一像素电极层17,所述像素电极层17通过一过孔与所述漏极122电性连接。
在其他实施例中,所述有源层13也可先于所述源漏极层12制作,亦即先执行步骤S13再执行步骤S12。
请参阅图6所示,本实施例中,所述制作一衬底基板11包括步骤:
S111、制作基底层111;
S112、制作遮光层112,在所述基底层111上制作遮光层112;所述遮光层112优选为金属层或黑色矩阵层,用遮光避免光线对所述有源层13的影响;以及
S113、制作缓冲层113,在所述基底层111上制作缓冲层113,所述缓冲层113覆盖所述遮光层112。
本实施例中,所述制作一阵列基板1还包括步骤:制作电容层18,在制作所述栅极层15时同时制作一电容层18,所述电容层18与所述栅极层15设于同一层,与所述像素电极层17相对设置形成存储电容。优选所述电容层18与所述栅极层15的材质相同,可节省制作工序。
请参阅图7所示,本实施例中,所述制作一彩膜基板2包括步骤:
S21、提供一玻璃基底层21;以及
S22、制作公共电极层22,在所述玻璃基底层21上制作公共电极层22。
本发明的优点在于,提供一种显示面板及其制作方法,通过将阵列基板上的栅极层与源漏极层的顺序交换,形成倒置的薄膜晶体管结构,将像素电极层覆盖到源漏极层的走线上,从而阻断阵列基板上的源漏极层与彩膜基板上的公共电极层之间的寄生电容,以及阻断阵列基板上的源漏极层与像素电极层之间的寄生电容,从而规避信号串扰的发生,有助于提升产品的显示、触控品质。
以上对本申请实施例所提供的一种显示面板及其制作方法进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想;本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (10)

1.一种显示面板,其特征在于,包括阵列基板以及与所述阵列基板对应设置的彩膜基板;
其中,所述阵列基板包括:
衬底基板;
源漏极层,设于所述衬底基板上,设有源极和漏极;
有源层,设于所述源漏极层上,其两端分别与所述源极和所述漏极电性连接;
栅极绝缘层,设于所述衬底层上,并覆盖所述有源层和所述源漏极层;
栅极层,设于所述栅极绝缘层上,并与所述有源层对应设置;
平坦层,设于所述栅极绝缘层上,并覆盖所述栅极层;以及
像素电极层,设于所述平坦层上,并通过一过孔与所述漏极电性连接。
2.根据权利要求1所述的显示面板,其特征在于,所述衬底基板包括:
基底层;
遮光层,设于所述基底层上;以及
缓冲层,设于所述基底层上,并覆盖所述遮光层。
3.根据权利要求1所述的显示面板,其特征在于,所述遮光层为金属层或黑色矩阵层。
4.根据权利要求1所述的显示面板,其特征在于,所述阵列基板还包括:
电容层,与所述栅极层设于同一层,与所述像素电极层相对设置形成存储电容。
5.根据权利要求1所述的显示面板,其特征在于,所述彩膜基板包括:
玻璃基底层;以及
公共电极层,设于所述玻璃基底层上。
6.一种显示面板的制作方法,其特征在于,包括步骤:
制作一阵列基板;以及
制作一彩膜基板,将所述彩膜基板与所述阵列基板对应设置;
其中,所述阵列基板包括:
衬底基板;
源漏极层,设于所述衬底基板上,设有源极和漏极;
有源层,设于所述源漏极层上,其两端分别与所述源极和所述漏极电性连接;
栅极绝缘层,设于所述衬底层上,并覆盖所述有源层和所述源漏极层;
栅极层,设于所述栅极绝缘层上,并与所述有源层对应设置;
平坦层,设于所述栅极绝缘层上,并覆盖所述栅极层;以及
像素电极层,设于所述平坦层上,并通过一过孔与所述漏极电性连接。
7.根据权利要求6所述的显示面板的制作方法,其特征在于,所述制作一阵列基板包括步骤:
制作一衬底基板;
制作源漏极层,在所述衬底基板上制作一源漏极层,所述源漏极层设有源极和漏极;
制作有源层,在所述源漏极层上制作一有源层,所述有源层的两端分别与所述源极和所述漏极电性连接;
制作栅极绝缘层,在所述衬底层上制作一栅极绝缘层,所述栅极绝缘覆盖所述有源层和所述源漏极层;
制作栅极层,在所述栅极绝缘层上制作一栅极层,所述栅极层与所述有源层对应设置;
制作平坦层,在所述栅极绝缘层上制作一平坦层,所述平坦层覆盖所述栅极层;以及
制作像素电极层,在所述平坦层上制作一像素电极层,所述像素电极层通过一过孔与所述漏极电性连接。
8.根据权利要求7所述的显示面板的制作方法,其特征在于,所述制作一衬底基板包括步骤:
制作基底层;
制作遮光层,在所述基底层上制作遮光层;以及
制作缓冲层,在所述基底层上制作缓冲层,所述缓冲层覆盖所述遮光层。
9.根据权利要求6所述的显示面板的制作方法,其特征在于,所述制作一阵列基板还包括步骤:
制作电容层,在制作所述栅极层时同时制作一电容层,所述电容层与所述栅极层设于同一层,与所述像素电极层相对设置形成存储电容。
10.根据权利要求6所述的显示面板的制作方法,其特征在于,所述制作一彩膜基板包括步骤:
提供一玻璃基底层;以及
制作公共电极层,在所述玻璃基底层上制作公共电极层。
CN202010647750.3A 2020-07-07 2020-07-07 显示面板及其制作方法 Pending CN111682033A (zh)

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