CN108803170B - 阵列基板及其制作方法、显示装置 - Google Patents

阵列基板及其制作方法、显示装置 Download PDF

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CN108803170B
CN108803170B CN201810652245.0A CN201810652245A CN108803170B CN 108803170 B CN108803170 B CN 108803170B CN 201810652245 A CN201810652245 A CN 201810652245A CN 108803170 B CN108803170 B CN 108803170B
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CN108803170A (zh
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姚磊
史大为
王文涛
杨璐
徐海峰
闫雷
王金锋
薛进进
闫芳
司晓文
候林
郭志轩
李元博
李晓芳
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Ordos Yuansheng Optoelectronics Co Ltd
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Priority to PCT/CN2019/087251 priority patent/WO2019242438A1/zh
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    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
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    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates
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Abstract

本发明实施例公开一种阵列基板及其制作方法、显示装置，涉及显示技术领域，用于减小阵列基板的寄生电容，以提高显示装置的显示品质。所述阵列基板包括衬底基板以及设在所述衬底基板一侧的多条栅线，所述栅线背向所述衬底基板的一侧设有多条数据线；每条所述栅线包括多个由各所述数据线分隔形成的栅线子段；每条所述栅线与所述衬底基板之间均设有多个遮光金属部；其中，每相邻的两个所述栅线子段与一个所述遮光金属部对应，且每相邻的两个所述栅线子段通过对应的所述遮光金属部串联。本发明实施例提供的阵列基板及其制作方法、显示装置用于TFT驱动的显示装置。

Description

阵列基板及其制作方法、显示装置
技术领域
本发明实施例涉及显示技术领域，尤其涉及一种阵列基板及其制作方法、显示装置。
背景技术
传统的薄膜晶体管液晶显示装置(Thin Film Transistor-Liquid CrystalDisplay，简称TFT-LCD)，常利用相对设置的公共电极和像素电极形成液晶驱动电场，以通过调整公共电极和像素电极的电压，对应调整液晶的偏转角度，并通过形成在公共电极和像素电极之间的储存电容，保持对应液晶像素的持续点亮。
然而，由于与像素电极相连的像素驱动电路，通常包括薄膜晶体管(Thin FilmTransistor，简称TFT)以及与该TFT对应相连的栅线和数据线，容易在对应的液晶像素中产生寄生电容，对该液晶像素的正常显示造成干扰，比如容易出现数据信号延迟或噪声信号等，从而导致显示装置的显示品质不佳。
发明内容
本发明实施例的目的在于提供一种阵列基板及其制作方法、显示装置，用于减小阵列基板的寄生电容，以提高其所在显示装置的显示品质。
为了实现上述目的，本发明实施例提供如下技术方案：
本发明实施例的第一方面提供一种阵列基板，包括衬底基板以及设在衬底基板一侧的多条栅线，栅线背向衬底基板的一侧设有多条数据线；每条栅线包括多个由各数据线分隔形成的栅线子段；每条栅线与衬底基板之间均设有多个遮光金属部；其中，每相邻的两个栅线子段与一个遮光金属部对应，且每相邻的两个栅线子段通过对应的遮光金属部串联。
本发明实施例提供的阵列基板，根据栅线与数据线之间的相对位置，将每条栅线划分为多个由各数据线分隔形成的栅线子段，并将每相邻的两个栅线子段通过对应设在栅线背向数据线一侧的遮光金属部串联，可以由遮光金属部作为对应栅线的一组成部分，有效增大栅线与数据线在二者正对区域的距离，从而减小栅线与数据线之间形成的寄生电容，以避免寄生电容对阵列基板所在显示装置的正常显示造成干扰，有利于提高显示装置的显示品质。
基于上述阵列基板的技术方案，本发明实施例的第二方面提供一种阵列基板的制作方法，用于制作上述阵列基板，所述制作方法包括：
提供一衬底基板，在衬底基板的一侧形成多个遮光金属部。
在遮光金属部背向衬底基板的一侧形成多条栅线；其中，每条栅线包括多个栅线子段；每相邻的两个栅线子段与一个遮光金属部对应，且每相邻的两个栅线子段通过对应的遮光金属部串联。
在栅线背向遮光金属部的一侧形成多条数据线；每相邻的两个栅线子段分别位于一条数据线的两侧。
本发明实施例提供的阵列基板的制作方法所能实现的有益效果，与上述技术方案提供的阵列基板所能达到的有益效果相同，在此不做赘述。
基于上述阵列基板的技术方案，本发明实施例的第三方面提供一种显示装置，所述显示装置包括上述技术方案所提供的阵列基板。本发明实施例提供的显示装置所能实现的有益效果，与上述技术方案提供的阵列基板所能达到的有益效果相同，在此不做赘述。
附图说明
此处所说明的附图用来提供对本发明实施例的进一步理解，构成本发明实施例的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1为本发明实施例提供的一种阵列基板的结构示意图；
图2为本发明实施例提供的另一种阵列基板的结构示意图；
图3为本发明实施例提供的另一种阵列基板的结构示意图；
图4为图3所示阵列基板的制作流程图；
图5为图2所示阵列基板的制作流程图；
图6为本发明实施例提供的一种阵列基板的制作方法流程图；
图7为本发明实施例提供的另一种阵列基板的制作方法流程图。
附图标记：
1-衬底基板， 2-遮光金属部，
3-缓冲层， 4-有源层，
5-栅绝缘层， 50-过孔，
61-栅线， 611-第一栅线子段，
612-第二栅线子段， 613-栅线浮置段，
62-栅极， 7-层间绝缘层，
81-数据线， 82-源漏极，
9-平坦化层， 10-公共电极层，
11-钝化层， 12-像素电极层。
具体实施方式
为了进一步说明本发明实施例提供的阵列基板及其制作方法、显示装置，下面结合说明书附图进行详细描述。
对于低温多晶硅(Low Temperature Poly-silicon，简称LTPS)液晶显示装置(Liquid Crystal Display，简称LCD)的阵列基板，如果其内部各液晶像素单元的薄膜晶体管采用底栅结构，虽然容易保证栅线与数据线之间具备较远距离，使得栅线与数据线之间形成较小的寄生电容，但也容易在对薄膜晶体管的有源层进行氮离子掺杂(N+Doping)和低掺杂浓度的漏区掺杂(LDD Doping)时增加光掩膜(Mask)工艺，导致LTPS LCD阵列基板的制作工艺繁杂，实施难度较大。因此，常见的LTPS LCD阵列基板中一般采用具有顶栅结构的薄膜晶体管。
请参阅图2，在具有顶栅结构的薄膜晶体管的阵列基板中，薄膜晶体管的栅极62通常设在其有源层4背向衬底基板1的一侧，该栅极62与薄膜晶体管的源漏极82之间通过层间绝缘层7相隔。然而，由于阵列基板的栅线与栅极62同层形成，阵列基板的数据线与源漏极82同层形成，栅线与数据线之间仅设有层间绝缘层7，容易使得栅线与数据线之间对应产生较大的寄生电容。为了有效减小阵列基板中栅线和数据线产生的寄生电容，根据寄生电容的计算公式：C＝εS/4πkd可知，寄生电容通常与两电极板之间的正对面积成正比，而与两电极板之间的距离成反比；阵列基板中的栅线和数据线分别作为寄生电容的两个电极板，通过减少栅线和数据线之间的正对面积或增加栅线和数据线之间的距离，均可有效降低栅线和数据线产生的寄生电容。
在进行多次试验论证后，发现如果通过增加层间绝缘层7的厚度来增加栅线和数据线之间的距离，容易使得阵列基板出现大视角色偏的问题，降低阵列基板所在显示装置的显示品质。而如果通过减小栅线或数据线的线宽来减少栅线和数据线之间的正对面积，容易出现工艺极限，难以满足量产工艺的稳定性要求。
综上，请参阅图1-图3，本发明实施例提供了一种阵列基板，包括衬底基板1以及设在衬底基板1一侧的多条栅线61，栅线61背向衬底基板1的一侧设有多条数据线81；每条栅线61包括多个由各数据线81分隔形成的栅线子段；每条栅线61与衬底基板1之间均设有多个遮光金属部2；其中，每相邻的两个栅线子段与一个遮光金属部2对应，且每相邻的两个栅线子段通过对应的遮光金属部2串联。
上述栅线61和数据线81通常分层呈网格状交叉，各栅线61按行排列，各数据线81按列排列，每条栅线61可以根据各数据线81的分布位置对应划分为多个栅线子段，其中每相邻的两个栅线子段可以参照图1中所示的第一栅线子段611和第二栅线子段612的结构：第一栅线子段611和第二栅线子段612断开连接，且第一栅线子段611和第二栅线子段612分别位于对应数据线81的两侧，这也就是说，第一栅线子段611和第二栅线子段612在衬底基板1上的正投影并不会被对应数据线81在衬底基板上的正投影所覆盖，第一栅线子段611和第二栅线子段612不存在与对应数据线81正对的区域。
上述遮光金属部2的制作材料一般与栅线61的制作材料相同，比如钼(Mo)金属，这样各栅线61可以与对应的遮光金属部2具备相同的导电率，从而在栅线61中每相邻的两个栅线子段通过对应的遮光金属部2串联时，避免栅线子段与对应遮光金属部2之间因二者接触电阻较大而出现负载较大的问题。
本发明实施例提供的阵列基板，根据栅线61与数据线81之间的相对位置，将每条栅线61划分为多个由各数据线81分隔形成的栅线子段，并将每相邻的两个栅线子段通过对应设在栅线61背向数据线81一侧的遮光金属部2串联，可以由遮光金属部2作为对应栅线61的一组成部分，有效增大栅线61与数据线81在二者正对区域的距离，从而减小栅线61与数据线81之间形成的寄生电容，以避免寄生电容对阵列基板所在显示装置的正常显示造成干扰，有利于提高显示装置的显示品质。
可以理解的是，上述每相邻的两个栅线子段与一个遮光金属部2对应，通常表现为：每一个栅线子段在衬底基板上的正投影均与对应的遮光金属部2在衬底基板1上的正投影部分重叠；这也就是说，在形成各栅线子段的过程中，通过在栅线子段与对应遮光金属部2之间二者正投影重叠的区域设置过孔，便可使得栅线子段穿过该过孔与对应的遮光金属部2连接。
此外，请参阅图1和图2，可选的，每相邻的两个栅线子段通过对应的遮光金属部2串联，通常表现为：用于连接相邻两个栅线子段的遮光金属部2的走向，与对应栅线子段所在栅线61的走向相同；这也就表示，遮光金属部2在衬底基板1上的正投影，应与用于分隔形成对应栅线子段的数据线81在衬底基板1上的正投影交叉，即遮光金属部2与对应的数据线81交叉设置。
值得一提的是，请继续参阅图1和图2，为了方便制作，在上述实施例提供的阵列基板中，每条数据线81与衬底基板1之间均设有多个栅线浮置段613；每个栅线浮置段613均设在相邻的两个栅线子段之间，且与对应的两个栅线子段同层绝缘。这也就是说，在将用于形成栅线的金属层图案化，即形成各条按行排列的栅线61时，可以直接将每条栅线61用于与每条数据线81正对的各部分分割出来，以使得每条栅线61用于与每条数据线81正对的各部分分别作为各栅线浮置段613，同时，沿栅线61走向位于每个栅线浮置段613两侧的相邻部分分别为第一栅线子段611和第二栅线子段612。
上述栅线浮置段613与相邻的第一栅线子段611和第二栅线子段612绝缘，该栅线浮置段613处于浮置状态，即该栅线浮置段613不会用于也不存在电信号传导，能够确保栅线浮置段613与对应的数据线81之间基本不产生寄生电容。此外，利用该栅线浮置段613还可以为设在栅线61与衬底基板1之间的有源层4在其后续的掺杂工艺中进行对位遮挡，比如有源层4的氮(N+)掺杂或漏区轻掺杂(Lightly Doped Drain，简称LDD掺杂)等。当然，请继续参阅图2，如果栅线61的某一栅线子段正好覆盖有源层4的部分掺杂区域A，那么还可以将该栅线子段位于对应区域A内的部分，在形成栅线61的过程中一并去除，以便于有源层4需要掺杂的区域A裸露，并进行掺杂工艺的实施。
可以理解的是，本实施例提供的阵列基板，通常在衬底基板1上设有薄膜晶体管阵列，阵列基板中各功能膜层在衬底基板1上的设置方式，通常与薄膜晶体管的结构有关；上述栅线61与数据线81之间通常设置有层间绝缘层，用于绝缘栅线61和数据线81；栅线61的各栅线子段与对应的遮光金属部2之间通常设有栅绝缘层和/或缓冲层。
示例性的，请参阅图3，在薄膜晶体管采用顶栅结构的阵列基板中，衬底基板1的表面自下而上依次形成有遮光金属部2、缓冲层3、有源层4、栅绝缘层5以及栅极62，栅极62和栅线同层设置，在栅极62和栅线背向栅绝缘层5的表面、以及栅绝缘层5未被栅极62和栅线覆盖的表面依次形成有层间绝缘层7和源漏极82，源漏极82和数据线同层设置，在源漏极82和数据线背向层间绝缘层7的表面、以及层间绝缘层7未被源漏极82和数据线覆盖的表面依次形成有平坦化层9、公共电极层10、钝化层11以及像素电极层12。
需要补充的是，请继续参阅图3，薄膜晶体管的源漏极82与数据线同层设置；薄膜晶体管的栅极62与栅线同层设置，且一行薄膜晶体管的栅极62与一条栅线对应；每个栅极62与衬底基板1之间均设有与对应的栅线相连的遮光金属部2，且每个栅极62分别与对应的遮光金属部2相连。本实施例提供的阵列基板，将薄膜晶体管中的栅极62通过对应的遮光金属部2与栅线相连，并利用遮光金属部2进行栅线与薄膜晶体管中栅极62之间信号的传导，能够通过遮光金属部2与对应薄膜晶体管中源漏极82之间较大的距离，有效减小栅线与栅极62之间信号传导部分与对应源漏极82所产生的寄生电容，以避免该寄生电容干扰栅线与栅极62之间的信号传导，有利于进一步提高显示装置的显示品质。
本发明实施例还提供了一种阵列基板的制作方法，用于制作上述实施例所提供的阵列基板，请参阅图6，所述阵列基板的制作方法包括：
步骤S1，提供一衬底基板，在衬底基板的一侧形成多个遮光金属部。
遮光金属部通常采用与栅线制作材料相同的材料制作形成，比如钼(Mo)金属等，其数量和形成位置可以根据实际需要自行设定。
步骤S2，在遮光金属部背向衬底基板的一侧形成多条栅线；其中，每条栅线包括多个栅线子段；每相邻的两个栅线子段与一个遮光金属部对应，且每相邻的两个栅线子段通过对应的遮光金属部串联。
步骤S3，在栅线背向遮光金属部的一侧形成多条数据线；每相邻的两个栅线子段分别位于一条数据线的两侧。
上述栅线和数据线通常分层且呈网格状交叉，各栅线一般按行形成，各数据线一般按列形成，每条栅线又根据各数据线的分布位置对应制作为多个栅线子段；其中，每相邻的两个栅线子段断开连接，且分别位于对应数据线的两侧，也就是每一个栅线子段在衬底基板的正投影并不会被对应数据线在衬底基板上的正投影所覆盖，且每个栅线子段不存在与对应数据线正对的区域。
本发明实施例提供的阵列基板的制作方法所能实现的有益效果，与上述技术方案提供的阵列基板所能达到的有益效果相同，在此不做赘述。
可以理解的是，本实施例提供的阵列基板，通常在衬底基板上设有薄膜晶体管阵列，阵列基板中各功能膜层在衬底基板上的形成方式，通常与薄膜晶体管的结构有关。栅线与数据线之间通常形成有层间绝缘层，用于绝缘栅线和数据线；栅线的各栅线子段与对应的遮光金属部之间通常设有栅绝缘层和/或缓冲层。
示例性的，请参阅图7，上述步骤S2中，在遮光金属部背向衬底基板的一侧形成多条栅线的步骤，包括：
步骤S21，在遮光金属部背向衬底基板的表面依次形成缓冲层和栅绝缘层，并通过构图工艺在缓冲层和栅绝缘层上形成多个过孔。
步骤S22，在栅绝缘层背向遮光金属部的表面形成多条栅线，每条栅线中的各栅线子段分别通过过孔与对应的遮光金属部串联。
上述步骤S3中，在栅线背向遮光金属部的一侧形成多条数据线的步骤，包括：
步骤S31，在栅线背向遮光金属部的表面形成层间绝缘层。
步骤S32，在层间绝缘层背向栅线的表面形成多条数据线。
为了更清楚的说明上述实施例所提供的阵列基板的制作方法，请参阅图4和图5，其中，图4为图3所示阵列基板的制作流程图，图5为图2所示阵列基板的制作流程图。
示例性的，请参阅图3和图4，该阵列基板中的薄膜晶体管采用顶栅结构，其制作方法如下所述：
步骤a，在衬底基板1的表面形成多个遮光金属部2。
步骤b，在衬底基板1未被遮光金属部2覆盖的表面以及遮光金属部2背向衬底基板1的表面依次形成缓冲层3和有源层4。
步骤c，在缓冲层3未被有源层4覆盖的表面以及有源层4背向缓冲层3的表面形成栅绝缘层5，并对栅绝缘层5进行光刻蚀，以生成贯通至遮光金属部2的过孔。
步骤d，在栅绝缘层5背向有源层4的表面形成栅极62。栅极62可以根据实际需要分段式设置，比如将栅极62制作为两部分，其中：第一部分通过过孔与遮光金属部2连接，第二部分保持浮置状态、且用于为有源层4后续的掺杂工艺进行对位阻挡等。栅线通常与栅极62同层形成。
步骤e，在栅极62背向栅绝缘层5的表面、以及栅绝缘层5未被栅极62覆盖的表面依次形成层间绝缘层7和源漏极82，在源漏极82背向层间绝缘层7的表面、以及层间绝缘层7未被源漏极82覆盖的表面依次形成平坦化层9、公共电极层10、钝化层11以及像素电极层12。数据线通常与源漏极82同层形成。
示例性的，请参阅图2和图5，该阵列基板的制作方法如下所述：
步骤h，在衬底基板的表面形成多个遮光金属部2；并在衬底基板1未被遮光金属部2覆盖的表面以及遮光金属部2背向衬底基板1的表面依次形成缓冲层和有源层4。
步骤i，在缓冲层未被有源层4覆盖的表面以及有源层4背向缓冲层的表面形成栅绝缘层，并对栅绝缘层进行光刻蚀，以生成贯通至遮光金属部2的过孔50。
步骤g，在栅绝缘层背向有源层4的表面形成栅线，每条栅线包括多个栅线子段，比如第一栅线子段611、第二栅线子段612以及栅线浮置段613；其中，第一栅线子段611和第二栅线子段612分别通过对应的遮光金属部2串联，栅线浮置段613分别与第一栅线子段611和第二栅线子段612绝缘。
步骤k，在栅线背向栅绝缘层的表面、以及栅绝缘层未被栅线覆盖的表面依次形成层间绝缘层7和数据线81，在数据线81背向层间绝缘层7的表面、以及层间绝缘层7未被数据线81覆盖的表面依次形成平坦化层、公共电极层10、钝化层以及像素电极层12。
本发明实施例还提供了一种显示装置，所述显示装置包括上述实施例提供的阵列基板。所述显示装置中的阵列基板与上述实施例中的阵列基板具有的优势相同，此处不再赘述。
上述实施例提供的显示装置可以为手机、平板电脑、笔记本电脑、显示器、电视机、数码相框或导航仪等具有显示功能的产品或部件。
以上所述，仅为本发明实施例的具体实施方式，但本发明实施例的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明实施例揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明实施例的保护范围之内。因此，本发明实施例的保护范围应以所述权利要求的保护范围为准。

Claims (7)

1.一种阵列基板，其特征在于，包括衬底基板以及设在所述衬底基板一侧的多条栅线，所述栅线背向所述衬底基板的一侧设有多条数据线；每条所述栅线包括多个由各所述数据线分隔形成的栅线子段；每条所述栅线与所述衬底基板之间均设有多个遮光金属部；其中，
每相邻的两个所述栅线子段与一个所述遮光金属部对应，且每相邻的两个所述栅线子段通过对应的所述遮光金属部串联；
所述栅线与所述数据线之间设有层间绝缘层；所述栅线的各所述栅线子段与对应的所述遮光金属部之间设有栅绝缘层和/或缓冲层； 所述栅线子段在所述衬底基板的正投影，与对应的所述遮光金属部在所述衬底基板的正投影部分重叠；
所述遮光金属部在所述衬底基板的正投影，与用于分隔形成对应的所述栅线子段的数据线在所述衬底基板的正投影交叉；
每条所述数据线与所述衬底基板之间均设有多个栅线浮置段；每个所述栅线浮置段均设在相邻的两个所述栅线子段之间，且与对应的两个所述栅线子段同层绝缘。
2.根据权利要求1所述的阵列基板，其特征在于，所述衬底基板上设有薄膜晶体管阵列；所述薄膜晶体管的源漏极与所述数据线同层设置；所述薄膜晶体管的栅极与所述栅线同层设置，且一行所述薄膜晶体管的栅极与一条所述栅线对应；
每个所述栅极与所述衬底基板之间均设有与对应的所述栅线相连的遮光金属部，且每个所述栅极分别与对应的所述遮光金属部相连。
3.根据权利要求2所述的阵列基板，其特征在于，所述源漏极与所述栅极之间设有层间绝缘层；所述栅极与所述遮光金属部之间依次设有栅绝缘层、有源层和缓冲层。
4.根据权利要求1所述的阵列基板，其特征在于，所述遮光金属部的制作材料与所述栅线的制作材料相同。
5.一种如权利要求1-4中任一项所述的阵列基板的制作方法，其特征在于，包括：
提供一衬底基板，在所述衬底基板的一侧形成多个遮光金属部；
在所述遮光金属部背向所述衬底基板的一侧形成多条栅线；其中，每条所述栅线包括多个栅线子段；每相邻的两个所述栅线子段与一个所述遮光金属部对应，且每相邻的两个所述栅线子段通过对应的所述遮光金属部串联；
在所述栅线背向所述遮光金属部的一侧形成多条数据线；每相邻的两个所述栅线子段分别位于一条数据线的两侧。
6.根据权利要求5所述的阵列基板的制作方法，其特征在于，所述在所述遮光金属部背向所述衬底基板的一侧形成多条栅线的步骤，包括：在所述遮光金属部背向所述衬底基板的表面依次形成缓冲层和栅绝缘层，并通过构图工艺在所述缓冲层和所述栅绝缘层上形成多个过孔；
在所述栅绝缘层背向所述遮光金属部的表面形成多条所述栅线，每条所述栅线中的各所述栅线子段分别通过所述过孔与对应的遮光金属部串联；
所述在所述栅线背向所述遮光金属部的一侧形成多条数据线的步骤，包括：
在所述栅线背向所述遮光金属部的表面形成层间绝缘层；
在所述层间绝缘层背向所述栅线的表面形成多条所述数据线。
7.一种显示装置，其特征在于，包括如权利要求1-4任一项所述的阵列基板。
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108803170B (zh) * 2018-06-22 2021-10-08 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN110071119B (zh) * 2019-04-09 2021-07-06 深圳市华星光电半导体显示技术有限公司 阵列基板及显示面板
CN110190072B (zh) * 2019-06-20 2021-09-07 京东方科技集团股份有限公司 阵列基板及其制备方法、显示面板
CN112489596B (zh) * 2019-09-12 2022-03-25 北京小米移动软件有限公司 显示模组、电子设备和显示方法
CN112310119A (zh) * 2020-10-16 2021-02-02 深圳市华星光电半导体显示技术有限公司 显示面板及制备方法
CN112736094A (zh) * 2020-12-30 2021-04-30 武汉华星光电技术有限公司 显示面板及显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101118915A (zh) * 2007-08-08 2008-02-06 友达光电股份有限公司 光感测元件及其制作方法
JP2009116060A (ja) * 2007-11-07 2009-05-28 Seiko Epson Corp 液晶装置の製造方法、液晶装置及び電子機器
CN102681274A (zh) * 2011-09-29 2012-09-19 京东方科技集团股份有限公司 液晶显示器阵列基板及制造方法
CN104538400A (zh) * 2014-12-16 2015-04-22 深圳市华星光电技术有限公司 一种ltps阵列基板
CN104600030A (zh) * 2015-02-02 2015-05-06 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN106842741A (zh) * 2017-01-18 2017-06-13 深圳市华星光电技术有限公司 Coa基板及液晶显示面板

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060068442A (ko) 2004-12-16 2006-06-21 삼성전자주식회사 표시장치용 박막트랜지스터 기판과 그 제조방법
JP2016015404A (ja) * 2014-07-02 2016-01-28 株式会社ジャパンディスプレイ 液晶表示装置
CN104808376B (zh) * 2015-05-11 2018-05-11 厦门天马微电子有限公司 阵列基板及显示装置
JP2017072741A (ja) * 2015-10-08 2017-04-13 セイコーエプソン株式会社 電気光学装置、電子機器、電気光学装置の製造方法
CN107797344B (zh) 2017-11-14 2021-01-15 京东方科技集团股份有限公司 阵列基板、显示面板及其制造方法
CN108803170B (zh) 2018-06-22 2021-10-08 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101118915A (zh) * 2007-08-08 2008-02-06 友达光电股份有限公司 光感测元件及其制作方法
JP2009116060A (ja) * 2007-11-07 2009-05-28 Seiko Epson Corp 液晶装置の製造方法、液晶装置及び電子機器
CN102681274A (zh) * 2011-09-29 2012-09-19 京东方科技集团股份有限公司 液晶显示器阵列基板及制造方法
CN104538400A (zh) * 2014-12-16 2015-04-22 深圳市华星光电技术有限公司 一种ltps阵列基板
CN104600030A (zh) * 2015-02-02 2015-05-06 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN106842741A (zh) * 2017-01-18 2017-06-13 深圳市华星光电技术有限公司 Coa基板及液晶显示面板

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