WO2016074264A1 - 一种扫描驱动电路 - Google Patents

一种扫描驱动电路 Download PDF

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Publication number
WO2016074264A1
WO2016074264A1 PCT/CN2014/091640 CN2014091640W WO2016074264A1 WO 2016074264 A1 WO2016074264 A1 WO 2016074264A1 CN 2014091640 W CN2014091640 W CN 2014091640W WO 2016074264 A1 WO2016074264 A1 WO 2016074264A1
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WO
WIPO (PCT)
Prior art keywords
switch tube
low level
pull
constant voltage
module
Prior art date
Application number
PCT/CN2014/091640
Other languages
English (en)
French (fr)
Inventor
肖军城
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to EA201791062A priority Critical patent/EA032950B1/ru
Priority to DE112014007173.0T priority patent/DE112014007173T5/de
Priority to KR1020177016158A priority patent/KR101994655B1/ko
Priority to JP2017543860A priority patent/JP6486486B2/ja
Priority to GB1709316.2A priority patent/GB2548050B/en
Priority to US14/417,204 priority patent/US9530375B2/en
Publication of WO2016074264A1 publication Critical patent/WO2016074264A1/zh

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0404Matrix technologies
    • G09G2300/0408Integration of the drivers onto the display substrate
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • G09G2310/0213Addressing of scan or signal lines controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/061Details of flat display driving waveforms for resetting or blanking
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/027Arrangements or methods related to powering off a display

Definitions

  • the present invention relates to the field of display driving, and more particularly to a scan driving circuit.
  • Gate Driver On Array is a driving circuit for forming a scan driving circuit on an array substrate of an existing thin film transistor liquid crystal display to realize progressive scanning of a scanning line.
  • a schematic diagram of a conventional scan driving circuit is shown in FIG. 1.
  • the scan driving circuit 10 includes a pull-up control module 101, a pull-up module 102, a downlink module 103, a pull-down module 104, a bootstrap capacitor 105, and a pull-down maintaining module 106.
  • the threshold voltage of the switching transistor moves to a negative value, which causes the switching transistors of the modules of the scan driving circuit 10 to easily leak, thereby affecting the reliability of the scanning driving circuit.
  • An object of the present invention is to provide a scan driving circuit with light leakage and high reliability, which solves the technical problem that the conventional scanning driving circuit is prone to leakage and affects the reliability of the scanning driving circuit.
  • An embodiment of the present invention provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a corresponding scan signal of the scan line according to a downlink signal of a next stage
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor for generating a high level of a scan signal of the scan line
  • a reset module configured to perform a reset operation on a scan level signal of the scan line of the current stage
  • Constant voltage low level source including:
  • a first constant voltage low level source for providing a first low level to the pull down sustaining module, wherein the first low level is used to pull down the scan signal
  • a second constant voltage low level source configured to provide a second low level to the pull-down maintaining module, wherein the second low level is used to pull down the scan level signal and the down signal;
  • the absolute value of the first low level is less than the absolute value of the second low level
  • the pull-up control module includes a first switch tube, a control end of the first switch tube inputs a downlink signal of the upper stage, and an input end of the first switch tube inputs the constant voltage high level
  • the output end of the first switch tube is respectively connected to the pull-up module, the pull-down module, the pull-down maintaining module, the downlink module, and the bootstrap capacitor.
  • the pull-up module includes a second switch tube, and a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the second switch tube inputs the clock signal of the current stage, and the output end of the second switch tube outputs the scan signal of the current stage.
  • the down-transmission module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the third switch tube inputs the clock signal of the current stage, and the output end of the third switch tube outputs the downlink signal of the current stage.
  • the pull-down module includes a fourth switch tube, and the control end of the fourth switch tube inputs a downlink signal of the next stage, and an input end of the fourth switch tube An output end of the first switch tube of the pull-up control module is connected, and an output end of the fourth switch tube is connected to the second constant voltage low level source.
  • the pull-down module includes a fifth switch tube, and a control end of the fifth switch tube inputs a downlink signal of the next stage, and an input end of the fifth switch tube Connected to the output end of the third switch tube, the output end of the fifth switch tube is connected to the constant voltage low level source.
  • the pull-down maintaining module includes a first pull-down maintaining unit, a second pull-down maintaining unit, a twenty-second switching tube, and a twenty-third switching tube;
  • a control end of the twenty-two switch tube is connected to an output end of the first switch tube, an output end of the second switch tube is connected to a reference point K(N), and the second switch The input end of the tube is connected to the reference point P(N);
  • the control end of the twenty-third switch tube inputs a downlink signal of the upper stage, and the output end of the twenty-third switch tube is connected with the reference point K(N), and the twenty-third switch tube The input end is connected to the reference point P(N);
  • the first pull-down maintaining unit includes a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, and a thirteenth switch tube;
  • the control end of the sixth switch tube is connected to the reference point K(N), the input end of the sixth switch tube is connected to the first constant voltage low level source, and the output of the sixth switch tube The end is connected to the output end of the second switch tube;
  • a control end of the seventh switch tube is connected to the reference point K(N), an input end of the seventh switch tube is connected to the second constant voltage low level source, and an output of the seventh switch tube The end is connected to the output end of the first switch tube;
  • the control end of the eighth switch tube is connected to the reference point K(N), the input end of the eighth switch tube is connected to the constant voltage low level source, and the output end of the eighth switch tube is The downlink signal connection of this level;
  • the control end of the ninth switch tube is connected to the first high frequency pulse signal, the input end of the ninth switch tube is connected to the first high frequency pulse signal, and the output end of the ninth switch tube is Reference point K (N) connection;
  • the control end of the tenth switch tube is connected to the downlink signal of the current stage, the input end of the tenth switch tube is connected to the constant voltage low level source, and the output end of the tenth switch tube is The first high frequency pulse signal is connected;
  • the control end of the eleventh switch tube is connected to the second high frequency pulse signal, and the input end of the eleventh switch tube is connected to the first high frequency pulse signal, and the output end of the eleventh switch tube Connected to the reference point K(N);
  • a control end of the twelfth switch tube is connected to the reference point K(N), and an output end of the twelfth switch tube is connected to the reference point K(N), the twelfth switch tube
  • the input end is connected to the first high frequency pulse signal
  • the control end of the thirteenth switch tube inputs a downlink signal of the upper stage, and the input end of the thirteenth switch tube is connected to the constant voltage low level source, and the thirteenth switch tube The output end is connected to the first high frequency pulse signal;
  • the second pull-down maintaining unit includes a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a seventeenth switch tube, an eighteenth switch tube, a nineteenth switch tube, and a twentieth switch tube, The twenty-first switch tube;
  • a control end of the fourteenth switch tube is connected to the reference point P(N), and an input end of the fourteenth switch tube is connected to the first constant voltage low level source, the fourteenth switch An output end of the tube is connected to an output end of the second switch tube;
  • a control end of the sixteenth switch tube is connected to the reference point P(N), and an input end of the sixteenth switch tube is connected to the constant voltage low level source, and the sixteenth switch tube The output end is connected to the downlink signal of the current level;
  • the control end of the seventeenth switch tube is connected to the second high frequency pulse signal, the input end of the seventeenth switch tube is connected to the second high frequency pulse signal, and the output end of the seventeenth switch tube Connected to the reference point P(N);
  • the control end of the eighteenth switch tube is connected to the downlink signal of the current stage, and the input end of the eighteenth switch tube is connected to the constant voltage low level source, and the eighteenth switch tube The output end is connected to the second high frequency pulse signal;
  • the control end of the nineteenth switch tube is connected to the first high frequency pulse signal, the input end of the nineteenth switch tube is connected to the second high frequency pulse signal, and the output end of the nineteenth switch tube Connected to the reference point P(N);
  • a control end of the twentieth switch tube is connected to the reference point P(N), an output end of the twentieth switch tube is connected to the reference point P(N), and the twentieth switch tube is The input end is connected to the second high frequency pulse signal;
  • a control end of the twenty-first switch tube inputs a downlink signal of the upper stage, and an input end of the twenty-first switch tube is connected to the constant voltage low level source, the second eleventh An output of the switching transistor is coupled to the second high frequency pulse signal.
  • the first high frequency pulse signal is opposite to the potential of the second high frequency pulse signal.
  • the constant voltage low level source includes:
  • a first constant voltage low level source configured to provide a first low level to the pull-down maintaining module, wherein the first low level is used to pull down the scan signal
  • a second constant voltage low level source for providing a second low level to the pull down sustaining module, wherein the second low level is used to pull down the scan level signal
  • a third constant voltage low level source configured to provide a third low level to the pull-down maintaining module, wherein the third low level is used to pull down the downlink signal
  • the absolute value of the first low level is smaller than the absolute value of the second low level, and the absolute value of the second low level is smaller than the absolute value of the third low level.
  • the output end of the fifth switch tube of the pull-down module is connected to the third constant voltage low level source, and the input end of the eighth switch tube of the pull-down maintenance module is The third constant voltage low level source is connected, and the input end of the fifteenth switch tube of the pull-down maintaining module is connected to the third constant voltage low level source;
  • An output end of the fourth switch tube of the pull-down module is connected to the second constant voltage low level source; an input end of the seventh switch tube of the pull-down maintenance module is connected to the second constant voltage low level source The input end of the tenth switch tube of the pull-down maintenance module is connected to the second constant voltage low level source; the input end of the fifteenth switch tube of the pull-down maintenance module is low with the second constant voltage a flat source connection; an input end of the eighteenth switch tube of the pull-down maintenance module is connected to the second constant voltage low level source;
  • the input end of the sixth switch tube of the pull-down maintaining module is connected to the first constant voltage low level source; the input end of the thirteenth switch tube of the pull-down maintenance module and the first constant voltage low level a source connection; an input end of the fourteenth switch tube of the pull-down maintenance module is connected to the first constant voltage low level source; and an input end of the twenty first switch tube of the pull-down maintenance module is opposite to the first Constant voltage low level source connection.
  • the embodiment of the present invention further provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a corresponding scan signal of the scan line according to a downlink signal of a next stage
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor for generating a high level of a scan signal of the scan line
  • Constant voltage low level source including:
  • a first constant voltage low level source for providing a first low level to the pull down sustaining module, wherein the first low level is used to pull down the scan signal
  • a second constant voltage low level source configured to provide a second low level to the pull-down maintaining module, wherein the second low level is used to pull down the scan level signal and the down signal;
  • the absolute value of the first low level is less than the absolute value of the second low level.
  • the pull-up control module includes a first switch tube, and a control end of the first switch tube inputs a downlink signal of the upper stage, and the first switch tube
  • the input terminal inputs the constant voltage high level, and the output ends of the first switch tube are respectively connected to the pull-up module, the pull-down module, the pull-down maintaining module, the downlink module, and the bootstrap capacitor connection.
  • the pull-up module includes a second switch tube, and a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the second switch tube inputs the clock signal of the current stage, and the output end of the second switch tube outputs the scan signal of the current stage.
  • the down-transmission module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module,
  • the input end of the third switch tube inputs the clock signal of the current stage, and the output end of the third switch tube outputs the downlink signal of the current stage.
  • the pull-down module includes a fourth switch tube, and the control end of the fourth switch tube inputs a downlink signal of the next stage, and an input end of the fourth switch tube An output end of the first switch tube of the pull-up control module is connected, and an output end of the fourth switch tube is connected to the second constant voltage low level source.
  • the pull-down module includes a fifth switch tube, and a control end of the fifth switch tube inputs a downlink signal of the next stage, and an input end of the fifth switch tube Connected to the output end of the third switch tube, the output end of the fifth switch tube is connected to the constant voltage low level source.
  • the pull-down maintaining module includes a first pull-down maintaining unit, a second pull-down maintaining unit, a twenty-second switching tube, and a twenty-third switching tube;
  • a control end of the twenty-two switch tube is connected to an output end of the first switch tube, an output end of the second switch tube is connected to a reference point K(N), and the second switch The input end of the tube is connected to the reference point P(N);
  • the control end of the twenty-third switch tube inputs a downlink signal of the upper stage, and the output end of the twenty-third switch tube is connected with the reference point K(N), and the twenty-third switch tube The input end is connected to the reference point P(N);
  • the first pull-down maintaining unit includes a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, and a thirteenth switch tube;
  • the control end of the sixth switch tube is connected to the reference point K(N), the input end of the sixth switch tube is connected to the first constant voltage low level source, and the output of the sixth switch tube The end is connected to the output end of the second switch tube;
  • a control end of the seventh switch tube is connected to the reference point K(N), an input end of the seventh switch tube is connected to the second constant voltage low level source, and an output of the seventh switch tube The end is connected to the output end of the first switch tube;
  • the control end of the eighth switch tube is connected to the reference point K(N), the input end of the eighth switch tube is connected to the constant voltage low level source, and the output end of the eighth switch tube is The downlink signal connection of this level;
  • the control end of the ninth switch tube is connected to the first high frequency pulse signal, the input end of the ninth switch tube is connected to the first high frequency pulse signal, and the output end of the ninth switch tube is Reference point K (N) connection;
  • the control end of the tenth switch tube is connected to the downlink signal of the current stage, the input end of the tenth switch tube is connected to the constant voltage low level source, and the output end of the tenth switch tube is The first high frequency pulse signal is connected;
  • the control end of the eleventh switch tube is connected to the second high frequency pulse signal, and the input end of the eleventh switch tube is connected to the first high frequency pulse signal, and the output end of the eleventh switch tube Connected to the reference point K(N);
  • a control end of the twelfth switch tube is connected to the reference point K(N), and an output end of the twelfth switch tube is connected to the reference point K(N), the twelfth switch tube
  • the input end is connected to the first high frequency pulse signal
  • the control end of the thirteenth switch tube inputs a downlink signal of the upper stage, and the input end of the thirteenth switch tube is connected to the constant voltage low level source, and the thirteenth switch tube The output end is connected to the first high frequency pulse signal;
  • the second pull-down maintaining unit includes a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a seventeenth switch tube, an eighteenth switch tube, a nineteenth switch tube, and a twentieth switch tube, The twenty-first switch tube;
  • a control end of the fourteenth switch tube is connected to the reference point P(N), and an input end of the fourteenth switch tube is connected to the first constant voltage low level source, the fourteenth switch An output end of the tube is connected to an output end of the second switch tube;
  • a control end of the sixteenth switch tube is connected to the reference point P(N), and an input end of the sixteenth switch tube is connected to the constant voltage low level source, and the sixteenth switch tube The output end is connected to the downlink signal of the current level;
  • the control end of the seventeenth switch tube is connected to the second high frequency pulse signal, the input end of the seventeenth switch tube is connected to the second high frequency pulse signal, and the output end of the seventeenth switch tube Connected to the reference point P(N);
  • the control end of the eighteenth switch tube is connected to the downlink signal of the current stage, and the input end of the eighteenth switch tube is connected to the constant voltage low level source, and the eighteenth switch tube The output end is connected to the second high frequency pulse signal;
  • the control end of the nineteenth switch tube is connected to the first high frequency pulse signal, the input end of the nineteenth switch tube is connected to the second high frequency pulse signal, and the output end of the nineteenth switch tube Connected to the reference point P(N);
  • a control end of the twentieth switch tube is connected to the reference point P(N), an output end of the twentieth switch tube is connected to the reference point P(N), and the twentieth switch tube is The input end is connected to the second high frequency pulse signal;
  • a control end of the twenty-first switch tube inputs a downlink signal of the upper stage, and an input end of the twenty-first switch tube is connected to the constant voltage low level source, the second eleventh An output of the switching transistor is coupled to the second high frequency pulse signal.
  • the first high frequency pulse signal is opposite to the potential of the second high frequency pulse signal.
  • the constant voltage low level source includes:
  • a first constant voltage low level source configured to provide a first low level to the pull-down maintaining module, wherein the first low level is used to pull down the scan signal
  • a second constant voltage low level source for providing a second low level to the pull down sustaining module, wherein the second low level is used to pull down the scan level signal
  • a third constant voltage low level source configured to provide a third low level to the pull-down maintaining module, wherein the third low level is used to pull down the downlink signal
  • the absolute value of the first low level is smaller than the absolute value of the second low level, and the absolute value of the second low level is smaller than the absolute value of the third low level.
  • the output end of the fifth switch tube of the pull-down module is connected to the third constant voltage low level source, and the input end of the eighth switch tube of the pull-down maintenance module is The third constant voltage low level source is connected, and the input end of the fifteenth switch tube of the pull-down maintaining module is connected to the third constant voltage low level source;
  • An output end of the fourth switch tube of the pull-down module is connected to the second constant voltage low level source; an input end of the seventh switch tube of the pull-down maintenance module is connected to the second constant voltage low level source The input end of the tenth switch tube of the pull-down maintenance module is connected to the second constant voltage low level source; the input end of the fifteenth switch tube of the pull-down maintenance module is low with the second constant voltage a flat source connection; an input end of the eighteenth switch tube of the pull-down maintenance module is connected to the second constant voltage low level source;
  • the input end of the sixth switch tube of the pull-down maintaining module is connected to the first constant voltage low level source; the input end of the thirteenth switch tube of the pull-down maintenance module and the first constant voltage low level a source connection; an input end of the fourteenth switch tube of the pull-down maintenance module is connected to the first constant voltage low level source; and an input end of the twenty first switch tube of the pull-down maintenance module is opposite to the first Constant voltage low level source connection.
  • the scan driving circuit further includes:
  • the reset module resets the scan level signal of the scan line of the current stage.
  • the scan driving circuit of the present invention can prevent the occurrence of leakage phenomenon and improve the reliability of the scanning driving circuit by setting a plurality of constant voltage low-level sources with different potentials;
  • a conventional scanning drive circuit is susceptible to leakage, thereby affecting the technical problem of the reliability of the scan driving circuit.
  • 1 is a schematic structural view of a conventional scan driving circuit
  • FIG. 2 is a schematic structural view of a first preferred embodiment of a scan driving circuit of the present invention
  • FIG. 3 is a schematic structural view of a second preferred embodiment of a scan driving circuit of the present invention.
  • FIG. 4 is a schematic structural view of a third preferred embodiment of a scan driving circuit of the present invention.
  • FIG. 5 is a schematic structural view of a fourth preferred embodiment of a scan driving circuit of the present invention.
  • Figure 6 is a signal waveform diagram of a fourth preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 7 is a schematic structural view of a fifth preferred embodiment of a scan driving circuit of the present invention.
  • Figure 8 is a signal waveform diagram of a fifth preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 2 is a schematic structural view of a first preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit 20 of the preferred embodiment includes a pull-up control module 201, a pull-up module 202, a pull-down module 203, a pull-down maintaining module 204, a downlink module 205, a bootstrap capacitor Cb, and a constant voltage low level source.
  • the pull-up control module 201 is configured to receive the downlink signal ST(N-1) of the previous stage, and generate a scan level signal Q(N) of the corresponding scan line according to the downlink signal ST(N-1) of the previous stage.
  • the pull-up module 202 is configured to pull up the scan signal G(N) of the corresponding scan line according to the scan level signal Q(N) and the clock signal CK(N) of the current stage;
  • the pull-down module 203 is used to The lower pass signal ST(N+1) of the stage pulls down the scan signal G(N) of the corresponding scan line;
  • the pull-down maintaining module 204 is used to maintain the low level of the scan signal G(N) of the corresponding scan line;
  • the transmitting module 205 is configured to send the down signal ST(N) of the current stage to the pull-up control module 204 of the next stage;
  • the bootstrap capacitor Cb is used to generate the high level of the scan signal G(N) of the scan line.
  • the constant voltage low level source includes a first constant voltage low level source VSS1 and a second constant voltage low level source VSS2.
  • the first constant voltage low level source VSS1 provides a first low level to the pull-down maintaining module 204
  • the second constant voltage low level source VSS2 provides a second low level to the pull-down maintaining module 204, wherein the first low level is used for The scan signal G(N) is pulled low
  • the second low level is used to pull down the scan level signal Q(N) and the down signal ST(N).
  • the absolute value of the first low level is greater than the absolute value of the second low level.
  • the pull-up control module 201 includes a first switch tube T1.
  • the control end of the first switch tube T1 inputs the downlink signal ST(N-1) of the previous stage, and the input end of the first switch tube T1 inputs the constant voltage level.
  • the output of the first switch T1 is connected to the pull-up module 202, the pull-down module 203, the pull-down maintaining module 204, the downlink module 205, and the bootstrap capacitor Cb.
  • the pull-up module 202 includes a second switch tube T2.
  • the control end of the second switch tube T2 is connected to the output end of the first switch tube T1 of the pull-up control module 201, and the input end of the second switch tube T2 is input with the clock signal of the current stage.
  • CK(N) the output end of the second switching transistor T2 outputs the scanning signal G(N) of the current stage.
  • the downlink module 205 includes a third switch T19, the control end of the third switch T19 is connected to the output of the first switch T1 of the pull-up control module 201, and the input of the third switch T19 is input to the clock signal of the current stage. CK(N), the output terminal of the third switching transistor T19 outputs the downlink signal ST(N) of the current stage.
  • the pull-down module 203 includes a fourth switch tube T3 and a fifth switch tube T21.
  • the control end of the fourth switch tube T3 inputs the downlink signal ST(N+1) of the next stage, and the input end and the pull-up of the fourth switch tube T3.
  • the output end of the first switch tube T1 of the control module is connected, the output end of the fourth switch tube T3 is connected to the second constant voltage low level source;
  • the control end of the fifth switch tube T21 inputs the downlink signal ST of the next stage ( N+1), the input end of the fifth switch tube T21 is connected to the output end of the second switch tube T19, and the output end of the fifth switch tube T21 is connected to the first constant voltage low level source.
  • the pull-down maintaining module 204 includes a first pull-down maintaining unit 2041, a second pull-down maintaining unit 2042, a second twelve-switching tube T13, and a twenty-third switching tube T14.
  • the control end of the twenty-second switch tube T13 is connected to the output end of the first switch tube T1
  • the output end of the twenty-second switch tube is connected to the reference point K(N)
  • the input end of the twenty-second switch tube is referenced Point P (N) connection.
  • the control end of the twenty-third switch tube T14 inputs the downlink signal ST(N-1) of the upper stage, and the output end of the twenty-third switch tube T14 is connected with the reference point K(N), and the twenty-third switch tube The input of T14 is connected to the reference point P(N).
  • the first pull-down maintaining unit 2041 includes a sixth switch tube T10, a seventh switch tube T9, an eighth switch tube T23, a ninth switch tube T6, a tenth switch tube T8, an eleventh switch tube T16, and a twelfth switch tube. T20, the thirteenth switch tube T18.
  • the control end of the sixth switch tube T10 is connected to the reference point K(N), the input end of the sixth switch tube T10 is connected to the first constant voltage low level source VSS1, and the output end of the sixth switch tube T10 is connected to the second switch tube.
  • the output of T2 is connected.
  • the control end of the seventh switch tube T9 is connected to the reference point K(N), the input end of the seventh switch tube T9 is connected to the second constant voltage low level source VSS2, and the output end of the seventh switch tube T9 and the first switch tube The output of T1 is connected;
  • the control end of the eighth switch tube T23 is connected to the reference point K(N), the input end of the eighth switch tube T23 is connected to the first constant voltage low level source VSS1, and the output end of the eighth switch tube T23 is below the current level Transmitting signal ST(N) connection;
  • the control end of the ninth switch tube T6 is connected to the first high frequency pulse signal XCKN (ie, a clock signal), the input end of the ninth switch tube T6 is connected to the first high frequency pulse signal XCKN, and the output end of the ninth switch tube T6 is Reference point K (N) connection;
  • the control end of the tenth switch tube T8 is connected to the downlink signal ST(N) of the current stage, the input end of the tenth switch tube T8 is connected to the first constant voltage low level source VSS1, and the output end of the tenth switch tube T8 is The first high frequency pulse signal XCKN is connected;
  • the control end of the eleventh switch tube T16 is connected to the second high frequency pulse signal CKN, the input end of the eleventh switch tube T16 is connected to the first high frequency pulse signal XCKN, and the output end of the eleventh switch tube T16 and the reference point K(N) connection;
  • the control end of the twelfth switch tube T20 is connected to the reference point K(N), the output end of the twelfth switch tube T20 is connected to the reference point K(N), and the input end of the twelfth switch tube T20 is connected to the first high frequency Pulse signal XCKN connection;
  • the control end of the thirteenth switch tube T18 inputs the downlink signal ST(N-1) of the upper stage, and the input end of the thirteenth switch tube T18 is connected with the first constant voltage low level source VSS1, and the thirteenth switch tube The output of T18 is coupled to the first high frequency pulse signal XCKN.
  • the second pull-down maintaining unit 2042 includes a fourteenth switch tube T11, a fifteenth switch tube T12, a sixteenth switch tube T22, a seventeenth switch tube T5, an eighteenth switch tube T7, and a nineteenth switch tube T15, 20 switch tube T19 and twenty-first switch tube T17.
  • the control end of the fourteenth switch tube T11 is connected to the reference point P(N), the input end of the fourteenth switch tube T11 is connected to the first constant voltage low level source VSS1, and the output end of the fourteenth switch tube T11 is The output end of the second switch tube T2 is connected;
  • the control end of the fifteenth switch tube T12 and the reference point P (N) connection the input end of the fifteenth switch tube T12 is connected to the second constant voltage low level source VSS2, and the output end of the fifteenth switch tube T12 is connected to the output end of the first switch tube T1;
  • the control end of the sixteenth switch tube T22 is connected to the reference point P(N), the input end of the sixteenth switch tube T22 is connected to the first constant voltage low level source VSS1, and the output end of the sixteenth switch tube T22 is Level down signal ST(N) connection;
  • the control end of the seventeenth switch tube T5 is connected to the second high frequency pulse signal CKN, and the input end of the seventeenth switch tube T5 is connected to the second high frequency pulse signal CKN, and the output end of the seventeenth switch tube T5 and the reference point P(N) connection;
  • the control end of the eighteenth switch tube T7 is connected to the downlink signal ST(N) of the current stage, and the input end of the eighteenth switch tube T7 is connected to the first constant voltage low level source VSS1, and the eighteenth switch tube T7 The output end is connected to the second high frequency pulse signal CKN;
  • the control end of the nineteenth switch tube T15 is connected to the first high frequency pulse signal XCKN, the input end of the nineteenth switch tube T15 is connected to the second high frequency pulse signal CKN, and the output end of the nineteenth switch tube T15 and the reference point P(N) connection;
  • the control end of the twentieth switch tube T19 is connected to the reference point P(N), the output end of the twentieth switch tube T19 is connected to the reference point P(N), and the input end of the twentieth switch tube T19 is connected to the second high frequency.
  • the control end of the twenty-first switch tube T17 inputs the downlink signal ST(N-1) of the upper stage, and the input end of the twenty-first switch tube T17 is connected with the first constant voltage low level source VSS1, the twentieth The output of a switching transistor is connected to the second high frequency pulse signal CKN.
  • the first high frequency pulse signal XCKN is opposite to the potential of the second high frequency pulse signal CKN.
  • the bootstrap capacitor Cb is disposed between the output of the first switching transistor T1 and the output of the second switching transistor T2 of the pull-up module 202.
  • the scan driving circuit 20 of the preferred embodiment may further include a reset module 206 for performing a reset operation on the scan level signal Q(n) of the scan line of the current stage, the reset module 206 including the switch tube T4.
  • the reset processing of the scan level signal Q(n) of the scan line is performed by inputting a high level signal to the control terminal of the switch transistor T4.
  • the scan driving circuit 20 of the preferred embodiment when the downlink signal ST(N-1) of the upper stage is at a high level, the first switching transistor T1 is turned on, and the constant voltage high level DCH The bootstrap capacitor Cb is charged through the first switching transistor T1 such that the reference point Q(n) rises to a higher level. Then, the downlink signal ST(N-1) of the upper stage is turned to a low level, the first switch tube T1 is turned off, the reference point Q(n) is maintained at a higher level by the bootstrap capacitor Cb, and the second The switch tube T2 and the third switch tube T19 are turned on.
  • the clock signal CK(n) of the current stage is turned to a high level, and the clock signal CK(n) continues to charge the bootstrap capacitor Cb through the second switch T2, so that the reference point Q(n) reaches a higher level.
  • the scanning signal G(N) of this stage and the downlink signal ST(N) of this stage also turn to a high level.
  • the reference point Q(n) is in a high state, and since the input end of the first switching transistor T1 is connected to the constant voltage high level DCH, the reference point Q(n) does not generate a leakage phenomenon through the first switching transistor T1. .
  • the first pull-down maintaining unit or the second pull-down maintaining unit maintains the reference point Q(n) under the action of the first high-frequency pulse signal and the second high-frequency pulse signal. Level.
  • the nineteenth switch tube T15, the ninth switch tube T6, and the eighteenth switch tube T7 are turned on, and the reference point K (N) and the reference point P(n) are pulled low to a low potential through the nineteenth switch tube T15 and the eighteenth switch tube T7, so that the sixth switch tube T10, the seventh switch tube T11, and the eighth switch tube T23,
  • the fourteen switch tubes T11, the fifteenth switch tube T12 and the sixteenth switch tube T22 are disconnected, and the reference point Q(n), the pull-down signal ST(N) of the current stage, and the scan signal G(N) of the current stage are guaranteed. High potential.
  • the seventeenth switch tube T5, the eleventh switch tube T16, and the tenth switch tube T8 are turned on, and the reference point K (N) and the reference point P(n) are pulled down to a low potential through the eleventh switch tube T16 and the tenth switch tube T8, so that the sixth switch tube T10, the seventh switch tube T11, the eighth switch tube T23, and the tenth
  • the four switch tubes T11, the fifteenth switch tube T12, and the sixteenth switch tube T22 are disconnected, and the reference point Q(n), the pull-down signal ST(N) of the current stage, and the scan signal G(N) of the current stage are guaranteed. High potential.
  • the fourth switching transistor T3 When the pull-down signal ST(N+1) of the next stage turns to a high level, the fourth switching transistor T3 is turned on, and the reference point Q(n) is turned to a low level, at which time the twenty-second switching transistor T13 is turned off.
  • the reference point K(N) is pulled to a high level, so that the sixth switch tube T10, the seventh switch tube T11, and the eighth switch tube T23 are turned on, thereby ensuring a reference point.
  • Q(n) the pull-down signal ST(N) of this stage, and the low potential of the scanning signal G(N) of this stage.
  • the reference point P(n) When the second high frequency pulse signal CKN is at a high level, the reference point P(n) The pull-up to the high point is flat, so that the fourteenth switch tube T11, the fifteenth switch tube T12, and the sixteenth switch tube T22 are turned on, and the reference point Q(n), the pull-down signal ST(N) of the current stage, and the same are also ensured.
  • the second switch tube T2 and the third switch tube T19 can be better ensured.
  • the leakage of the second switching transistor T2 is prevented from affecting the potential of the scanning signal G(N), and the leakage of the third switching transistor T19 affects the potential of the downlink signal ST(N) of the present stage.
  • the scan driving circuit of the preferred embodiment can better maintain the potential state of the reference point Q(n) regardless of whether the reference point Q(n) is in a high potential state or a low potential state, thereby avoiding Leakage of the switching transistor causes the potential of the reference point Q(n) to change.
  • the scan driving circuit of the invention can avoid the occurrence of leakage phenomenon and improve the reliability of the scan driving circuit by setting a plurality of constant voltage low level sources with different potentials.
  • FIG. 3 is a structural diagram of a second preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit of the preferred embodiment is different from the first preferred embodiment in that the input ends of the tenth switch tube T8 and the eighteenth switch tube T7 are both connected to the second constant voltage low level source, so that the tenth switch tube The T8 and the eighteenth switch tube T7 do not generate electric leakage and affect the potentials of the reference point K(N) and the reference point P(n), further improving the reliability of the scan driving circuit.
  • FIG. 4 is a structural diagram of a third preferred embodiment of the scan driving circuit of the present invention.
  • the difference between the scan driving circuit of the preferred embodiment and the second preferred embodiment is that the input ends of the fifth switching transistor T21, the eighth switching transistor T23, and the sixteenth switching transistor T22 are both connected to the second constant voltage low level source.
  • the leakage of the fifth switching transistor T21, the eighth switching transistor T23, and the sixteenth switching transistor T22 does not affect the potential of the downlink signal ST(N) of the current stage, thereby further improving the reliability of the scanning driving circuit.
  • FIG. 5 is a structural diagram of a fourth preferred embodiment of the scan driving circuit of the present invention.
  • Figure 6 is a signal waveform diagram of a fourth preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit 50 of the preferred embodiment includes a pull-up control module 501, a pull-up module 502, a pull-down module 503, a pull-down maintaining module 504, a downlink module 505, a reset module 506, a bootstrap capacitor Cb, and a constant voltage low level. source.
  • the constant voltage low level source of the scan driving circuit of the preferred embodiment includes a first constant voltage low level source VSS1, a second constant voltage low level source VSS2, and a third constant voltage low level source VSS3.
  • the first constant voltage low level source VSS1 is used to provide a first low level to the pull-down maintaining module
  • the second constant voltage low level source VSS2 is used to provide a second low level to the pull-down maintaining module
  • the flat source VSS3 is used to provide a third low level to the pull-down sustaining module, wherein the first low level is used to pull down the scan signal G(N), and the second low level is used to pull down the scan level signal Q(n)
  • the third low level is used to pull down the downlink signal ST(N); the absolute value of the first low level is less than the absolute value of the second low level, and the absolute value of the second low level is less than the third low level Absolute value.
  • the output end of the fifth switching transistor T21 of the pull-down module 503 is connected to the third constant-voltage low-level source VSS3, and the input end of the eighth switching transistor T23 of the pull-down maintaining module 504 is connected to the third constant-voltage low-level source VSS3, and is pulled down.
  • the input terminal of the fifteenth switch transistor T22 of the maintenance module 504 is connected to the third constant voltage low level source VSS3.
  • the fourth switch T3 of the pull-down module 503 is connected to the second constant-voltage low-level source VSS2, and the seventh switch T9 of the pull-down maintenance module 504 is connected to the second constant-voltage low-level source VSS2, and the tenth of the pull-down maintenance module 504
  • the input end of the switch tube T8 is connected to the second constant voltage low level source VSS2
  • the input end of the fifteenth switch tube T12 of the pull-down maintenance module 504 is connected to the second constant voltage low level source VSS2
  • the pull-down maintenance module 504 is The input end of the eighteen switch tube T7 is connected to the second constant voltage low level source VSS2.
  • the input end of the sixth switching transistor T10 of the pull-down maintaining module 504 is connected to the first constant voltage low level source VSS1, and the input end of the thirteenth switching tube T18 of the pull-down maintaining module 504 is connected to the first constant voltage low level source VSS1.
  • the input end of the fourteenth switch tube T11 of the pull-down maintenance module 504 is connected to the first constant voltage low level source VSS1, and the input end of the twenty-first switch tube T17 of the pull-down maintenance module 504 is connected to the first constant voltage low level. Source VSS1 is connected.
  • the scan driving circuit 50 of the preferred embodiment can better pull down the pull-down signal ST(N) of the current stage through the design of three constant voltage low-level sources, so that the tenth switch tube T8 and the eighteenth switch tube T7 is better off, thus ensuring the high potential of reference point K(N) and reference point P(N).
  • FIG. 7 is a schematic structural diagram of a fifth preferred embodiment of the scan driving circuit of the present invention
  • FIG. 8 is a signal waveform diagram of a fifth preferred embodiment of the scan driving circuit of the present invention.
  • the fourth preferred embodiment of the preferred embodiment and the scan driving circuit differs in that the first low frequency potential signal LC2 is used instead of the first high frequency pulse signal XCKN, and the second low frequency potential signal LC1 is substituted for the second high frequency pulse CKN, the first low frequency.
  • the potential signal LC2 and the second low-frequency potential signal LC1 can convert the potential after a plurality of frames or tens of frames, which can reduce the pulse switching of the scan driving circuit and save power consumption of the scan driving circuit.
  • the scan driving circuit of the invention can prevent the occurrence of leakage phenomenon and improve the reliability of the scanning driving circuit by setting a plurality of constant voltage low level sources with different potentials; and solve the problem that the existing scanning driving circuit is prone to leakage A phenomenon that affects the technical problem of the reliability of the scan driving circuit.

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Abstract

一种扫描驱动电路,该扫描驱动电路包括上拉控制模块(201)、上拉模块(202)、下拉模块(203)、下拉维持模块(204)、下传模块(205)、自举电容(Cb)以及恒压低电平源;该恒压低电平源包括提供第一低电平的第一恒压低电平源(VSS1)以及用于提供第二低电平的第二恒压低电平源(VSS2);其中第一低电平的绝对值大于第二低电平的绝对值。提升了扫描驱动电路的可靠性。

Description

一种扫描驱动电路 技术领域
本发明涉及显示驱动领域,特别是涉及一种扫描驱动电路。
背景技术
Gate Driver On Array,简称GOA,即在现有薄膜晶体管液晶显示器的阵列基板上制作扫描驱动电路,实现对扫描线逐行扫描的驱动方式。现有扫描驱动电路的结构示意图如图1所示,该扫描驱动电路10包括上拉控制模块101、上拉模块102、下传模块103、下拉模块104、自举电容105以及下拉维持模块106。
该扫描驱动电路10在高温状态下工作时,开关管的阈值电压会往负值移动,这样导致扫描驱动电路10的各模块的开关管容易发生漏电,从而影响该扫描驱动电路的可靠性。
故,有必要提供一种扫描驱动电路,以解决现有技术所存在的问题。
技术问题
本发明的目的在于提供一种漏电现象较轻且可靠性较高的扫描驱动电路,以解决现有的扫描驱动电路的容易发生漏电现象,从而影响扫描驱动电路的可靠性的技术问题。
技术解决方案
本发明实施例提供一种扫描驱动电路,用于对级联的扫描线进行驱动操作,其包括:
上拉控制模块,用于接收上一级的下传信号,并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号;
上拉模块,用于根据所述扫描电平信号以及本级的时钟信号,拉升相应的所述扫描线的扫描信号;
下拉模块,用于根据下一级的下传信号,拉低相应的所述扫描线的扫描信号
下拉维持模块,用于维持相应的所述扫描线的扫描信号的低电平;
下传模块,用于向下一级的上拉控制模块发送本级的下传信号;
自举电容,用于生成所述扫描线的扫描信号的高电平;
重置模块,用于对本级的所述扫描线的扫描电平信号进行重置操作;
恒压低电平源,包括:
第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;以及
第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号以及所述下传信号;
其中第一低电平的绝对值小于所述第二低电平的绝对值;
其中所述上拉控制模块包括第一开关管,所述第一开关管的控制端输入所述上一级的下传信号,所述第一开关管的输入端输入所述恒压高电平,所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
在本发明所述的扫描驱动电路中,所述上拉模块包括第二开关管,所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第二开关管的输入端输入所述本级的时钟信号,所述第二开关管的输出端输出本级的扫描信号。
在本发明所述的扫描驱动电路中,所述下传模块包括第三开关管,所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第三开关管的输入端输入所述本级的时钟信号,所述第三开关管的输出端输出所述本级的下传信号。
在本发明所述的扫描驱动电路中,所述下拉模块包括第四开关管,所述第四开关管的控制端输入所述下一级的下传信号,所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接,所述第四开关管的输出端与所述第二恒压低电平源连接。
在本发明所述的扫描驱动电路中,所述下拉模块包括第五开关管,所述第五开关管的控制端输入所述下一级的下传信号,所述第五开关管的输入端与所述第三开关管的输出端连接,所述第五开关管的输出端与所述恒压低电平源连接。
在本发明所述的扫描驱动电路中,所述下拉维持模块包括第一下拉维持单元、第二下拉维持单元、第二十二开关管以及第二十三开关管;
所述第二十二开关管的控制端与所述第一开关管的输出端连接,所述第二十二开关管的输出端与参考点K(N)连接,所述第二十二开关管的输入端与参考点P(N)连接;
所述第二十三开关管的控制端输入上一级的下传信号,所述第二十三开关管的输出端与所述参考点K(N)连接,所述第二十三开关管的输入端与所述参考点P(N)连接;
所述第一下拉维持单元包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管;
所述第六开关管的控制端与所述参考点K(N)连接,所述第六开关管的输入端与所述第一恒压低电平源连接,所述第六开关管的输出端与所述第二开关管的输出端连接;
所述第七开关管的控制端与所述参考点K(N)连接,所述第七开关管的输入端与所述第二恒压低电平源连接,所述第七开关管的输出端与所述第一开关管的输出端连接;
所述第八开关管的控制端与所述参考点K(N)连接,所述第八开关管的输入端与所述恒压低电平源连接,所述第八开关管的输出端与本级的下传信号连接;
所述第九开关管的控制端与第一高频脉冲信号连接,所述第九开关管的输入端与所述第一高频脉冲信号连接,所述第九开关管的输出端与所述参考点K(N)连接;
所述第十开关管的控制端与所述本级的下传信号连接,所述第十开关管的输入端与所述恒压低电平源连接,所述第十开关管的输出端与所述第一高频脉冲信号连接;
所述第十一开关管的控制端与第二高频脉冲信号连接,所述第十一开关管的输入端与所述第一高频脉冲信号连接,所述第十一开关管的输出端与所述参考点K(N)连接;
所述第十二开关管的控制端与所述参考点K(N)连接,所述第十二开关管的输出端与所述参考点K(N)连接,所述第十二开关管的输入端与所述第一高频脉冲信号连接;
所述第十三开关管的控制端输入所述上一级的下传信号,所述第十三开关管的输入端与所述恒压低电平源连接,所述第十三开关管的输出端与所述第一高频脉冲信号连接;
所述第二下拉维持单元包括第十四开关管、第十五开关管、第十六开关管、第十七开关管、第十八开关管、第十九开关管、第二十开关管、第二十一开关管;
所述第十四开关管的控制端与所述参考点P(N)连接,所述第十四开关管的输入端与所述第一恒压低电平源连接,所述第十四开关管的输出端与所述第二开关管的输出端连接;
所述第十五开关管的控制端与所述参考点P (N)连接,所述第十五开关管的输入端与所述第二恒压低电平源连接,所述第十五开关管的输出端与所述第一开关管的输出端连接;
所述第十六开关管的控制端与所述参考点P(N)连接,所述第十六开关管的输入端与所述恒压低电平源连接,所述第十六开关管的输出端与本级的下传信号连接;
所述第十七开关管的控制端与第二高频脉冲信号连接,所述第十七开关管的输入端与所述第二高频脉冲信号连接,所述第十七开关管的输出端与所述参考点P(N)连接;
所述第十八开关管的控制端与所述本级的下传信号连接,所述第十八开关管的输入端与所述恒压低电平源连接,所述第十八开关管的输出端与所述第二高频脉冲信号连接;
所述第十九开关管的控制端与第一高频脉冲信号连接,所述第十九开关管的输入端与所述第二高频脉冲信号连接,所述第十九开关管的输出端与所述参考点P(N)连接;
所述第二十开关管的控制端与所述参考点P(N)连接,所述第二十开关管的输出端与所述参考点P(N)连接,所述第二十开关管的输入端与所述第二高频脉冲信号连接;
所述第二十一开关管的控制端输入所述上一级的下传信号,所述第二十一开关管的输入端与所述恒压低电平源连接,所述第二十一开关管的输出端与所述第二高频脉冲信号连接。
在本发明所述的扫描驱动电路中,所述第一高频脉冲信号与所述第二高频脉冲信号的电位相反。
在本发明所述的扫描驱动电路中,所述恒压低电平源包括:
第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;
第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号;以及
第三恒压低电平源,用于向所述下拉维持模块提供第三低电平,其中所述第三低电平用于拉低所述下传信号;
其中所述第一低电平的绝对值小于所述第二低电平的绝对值,所述第二低电平的绝对值小于所述第三低电平的绝对值。
在本发明所述的扫描驱动电路中,所述下拉模块的第五开关管的输出端与所述第三恒压低电平源连接,所述下拉维持模块的第八开关管的输入端与所述第三恒压低电平源连接,所述下拉维持模块的第十五开关管的输入端与所述第三恒压低电平源连接;
所述下拉模块的第四开关管的输出端与所述第二恒压低电平源连接;所述下拉维持模块的第七开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十五开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十八开关管的输入端与所述第二恒压低电平源连接;
所述下拉维持模块的第六开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十三开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十四开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第二十一开关管的输入端与所述第一恒压低电平源连接。
本发明实施例还提供一种扫描驱动电路,用于对级联的扫描线进行驱动操作,其包括:
上拉控制模块,用于接收上一级的下传信号,并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号;
上拉模块,用于根据所述扫描电平信号以及本级的时钟信号,拉升相应的所述扫描线的扫描信号;
下拉模块,用于根据下一级的下传信号,拉低相应的所述扫描线的扫描信号
下拉维持模块,用于维持相应的所述扫描线的扫描信号的低电平;
下传模块,用于向下一级的上拉控制模块发送本级的下传信号;
自举电容,用于生成所述扫描线的扫描信号的高电平;以及
恒压低电平源,包括:
第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;以及
第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号以及所述下传信号;
其中第一低电平的绝对值小于所述第二低电平的绝对值。
在本发明所述的扫描驱动电路中,所述上拉控制模块包括第一开关管,所述第一开关管的控制端输入所述上一级的下传信号,所述第一开关管的输入端输入所述恒压高电平,所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
在本发明所述的扫描驱动电路中,所述上拉模块包括第二开关管,所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第二开关管的输入端输入所述本级的时钟信号,所述第二开关管的输出端输出本级的扫描信号。
在本发明所述的扫描驱动电路中,所述下传模块包括第三开关管,所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第三开关管的输入端输入所述本级的时钟信号,所述第三开关管的输出端输出所述本级的下传信号。
在本发明所述的扫描驱动电路中,所述下拉模块包括第四开关管,所述第四开关管的控制端输入所述下一级的下传信号,所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接,所述第四开关管的输出端与所述第二恒压低电平源连接。
在本发明所述的扫描驱动电路中,所述下拉模块包括第五开关管,所述第五开关管的控制端输入所述下一级的下传信号,所述第五开关管的输入端与所述第三开关管的输出端连接,所述第五开关管的输出端与所述恒压低电平源连接。
在本发明所述的扫描驱动电路中,所述下拉维持模块包括第一下拉维持单元、第二下拉维持单元、第二十二开关管以及第二十三开关管;
所述第二十二开关管的控制端与所述第一开关管的输出端连接,所述第二十二开关管的输出端与参考点K(N)连接,所述第二十二开关管的输入端与参考点P(N)连接;
所述第二十三开关管的控制端输入上一级的下传信号,所述第二十三开关管的输出端与所述参考点K(N)连接,所述第二十三开关管的输入端与所述参考点P(N)连接;
所述第一下拉维持单元包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管;
所述第六开关管的控制端与所述参考点K(N)连接,所述第六开关管的输入端与所述第一恒压低电平源连接,所述第六开关管的输出端与所述第二开关管的输出端连接;
所述第七开关管的控制端与所述参考点K(N)连接,所述第七开关管的输入端与所述第二恒压低电平源连接,所述第七开关管的输出端与所述第一开关管的输出端连接;
所述第八开关管的控制端与所述参考点K(N)连接,所述第八开关管的输入端与所述恒压低电平源连接,所述第八开关管的输出端与本级的下传信号连接;
所述第九开关管的控制端与第一高频脉冲信号连接,所述第九开关管的输入端与所述第一高频脉冲信号连接,所述第九开关管的输出端与所述参考点K(N)连接;
所述第十开关管的控制端与所述本级的下传信号连接,所述第十开关管的输入端与所述恒压低电平源连接,所述第十开关管的输出端与所述第一高频脉冲信号连接;
所述第十一开关管的控制端与第二高频脉冲信号连接,所述第十一开关管的输入端与所述第一高频脉冲信号连接,所述第十一开关管的输出端与所述参考点K(N)连接;
所述第十二开关管的控制端与所述参考点K(N)连接,所述第十二开关管的输出端与所述参考点K(N)连接,所述第十二开关管的输入端与所述第一高频脉冲信号连接;
所述第十三开关管的控制端输入所述上一级的下传信号,所述第十三开关管的输入端与所述恒压低电平源连接,所述第十三开关管的输出端与所述第一高频脉冲信号连接;
所述第二下拉维持单元包括第十四开关管、第十五开关管、第十六开关管、第十七开关管、第十八开关管、第十九开关管、第二十开关管、第二十一开关管;
所述第十四开关管的控制端与所述参考点P(N)连接,所述第十四开关管的输入端与所述第一恒压低电平源连接,所述第十四开关管的输出端与所述第二开关管的输出端连接;
所述第十五开关管的控制端与所述参考点P (N)连接,所述第十五开关管的输入端与所述第二恒压低电平源连接,所述第十五开关管的输出端与所述第一开关管的输出端连接;
所述第十六开关管的控制端与所述参考点P(N)连接,所述第十六开关管的输入端与所述恒压低电平源连接,所述第十六开关管的输出端与本级的下传信号连接;
所述第十七开关管的控制端与第二高频脉冲信号连接,所述第十七开关管的输入端与所述第二高频脉冲信号连接,所述第十七开关管的输出端与所述参考点P(N)连接;
所述第十八开关管的控制端与所述本级的下传信号连接,所述第十八开关管的输入端与所述恒压低电平源连接,所述第十八开关管的输出端与所述第二高频脉冲信号连接;
所述第十九开关管的控制端与第一高频脉冲信号连接,所述第十九开关管的输入端与所述第二高频脉冲信号连接,所述第十九开关管的输出端与所述参考点P(N)连接;
所述第二十开关管的控制端与所述参考点P(N)连接,所述第二十开关管的输出端与所述参考点P(N)连接,所述第二十开关管的输入端与所述第二高频脉冲信号连接;
所述第二十一开关管的控制端输入所述上一级的下传信号,所述第二十一开关管的输入端与所述恒压低电平源连接,所述第二十一开关管的输出端与所述第二高频脉冲信号连接。
在本发明所述的扫描驱动电路中,所述第一高频脉冲信号与所述第二高频脉冲信号的电位相反。
在本发明所述的扫描驱动电路中,所述恒压低电平源包括:
第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;
第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号;以及
第三恒压低电平源,用于向所述下拉维持模块提供第三低电平,其中所述第三低电平用于拉低所述下传信号;
其中所述第一低电平的绝对值小于所述第二低电平的绝对值,所述第二低电平的绝对值小于所述第三低电平的绝对值。
在本发明所述的扫描驱动电路中,所述下拉模块的第五开关管的输出端与所述第三恒压低电平源连接,所述下拉维持模块的第八开关管的输入端与所述第三恒压低电平源连接,所述下拉维持模块的第十五开关管的输入端与所述第三恒压低电平源连接;
所述下拉模块的第四开关管的输出端与所述第二恒压低电平源连接;所述下拉维持模块的第七开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十五开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十八开关管的输入端与所述第二恒压低电平源连接;
所述下拉维持模块的第六开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十三开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十四开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第二十一开关管的输入端与所述第一恒压低电平源连接。
在本发明所述的扫描驱动电路中,所述扫描驱动电路还包括:
重置模块,对本级的所述扫描线的扫描电平信号进行重置操作。
有益效果
相较于现有的扫描驱动电路,本发明的扫描驱动电路通过设置多个不同电位的恒压低电平源,可以很好的避免漏电现象的产生,提高扫描驱动电路的可靠性;解决了现有的扫描驱动电路的容易发生漏电现象,从而影响扫描驱动电路的可靠性的技术问题。
附图说明
图1为一种现有的扫描驱动电路的结构示意图;
图2为本发明的扫描驱动电路的第一优选实施例的结构示意图;
图3为本发明的扫描驱动电路的第二优选实施例的结构示意图;
图4为本发明的扫描驱动电路的第三优选实施例的结构示意图;
图5为本发明的扫描驱动电路的第四优选实施例的结构示意图;
图6为本发明的扫描驱动电路的第四优选实施例的信号波形图;
图7为本发明的扫描驱动电路的第五优选实施例的结构示意图;
图8为本发明的扫描驱动电路的第五优选实施例的信号波形图。
本发明的最佳实施方式
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
在图中,结构相似的单元是以相同标号表示。
请参照图2,图2为本发明的扫描驱动电路的第一优选实施例的结构示意图。本优选实施例的扫描驱动电路20包括上拉控制模块201、上拉模块202、下拉模块203、下拉维持模块204、下传模块205、自举电容Cb以及恒压低电平源。
上拉控制模块201用于接收上一级的下传信号ST(N-1),并根据上一级的下传信号ST(N-1)生成相应的扫描线的扫描电平信号Q(N);上拉模块202用于根据扫描电平信号Q(N)以及本级的时钟信号CK(N),拉升相应的扫描线的扫描信号G(N);下拉模块203用于根据下一级的下传信号ST(N+1),拉低相应的扫描线的扫描信号G(N);下拉维持模块204用于维持相应的扫描线的扫描信号G(N)的低电平;下传模块205用于向下一级的上拉控制模块204发送本级的下传信号ST(N);自举电容Cb用于生成扫描线的扫描信号G(N)的高电平。
恒压低电平源包括第一恒压低电平源VSS1以及第二恒压低电平源VSS2。第一恒压低电平源VSS1向下拉维持模块204提供第一低电平,第二恒压低电平源VSS2向下拉维持模块204提供第二低电平,其中第一低电平用于拉低扫描信号G(N),第二低电平用于拉低扫描电平信号Q(N)以及下传信号ST(N)。第一低电平的绝对值大于第二低电平的绝对值。
其中上拉控制模块201包括第一开关管T1,第一开关管T1的控制端输入上一级的下传信号ST(N-1),第一开关管T1的输入端输入恒压高电平DCH,第一开关管T1的输出端分别与上拉模块202、下拉模块203、下拉维持模块204、下传模块205以及自举电容Cb连接。
上拉模块202包括第二开关管T2,第二开关管T2的控制端与上拉控制模块201的第一开关管T1的输出端连接,第二开关管T2的输入端输入本级的时钟信号CK(N),第二开关管T2的输出端输出本级的扫描信号G(N)。
下传模块205包括第三开关管T19,第三开关管T19的控制端与上拉控制模块201的第一开关管T1的输出端连接,第三开关管T19的输入端输入本级的时钟信号CK(N),第三开关管T19的输出端输出本级的下传信号ST(N)。
下拉模块203包括第四开关管T3以及第五开关管T21,第四开关管T3的控制端输入下一级的下传信号ST(N+1),第四开关管T3的输入端与上拉控制模块的第一开关管T1的输出端连接,第四开关管T3的输出端与第二恒压低电平源连接;第五开关管T21的控制端输入下一级的下传信号ST(N+1),第五开关管T21的输入端与第二开关管T19的输出端连接,第五开关管T21的输出端与第一恒压低电平源连接。
下拉维持模块204包括第一下拉维持单元2041、第二下拉维持单元2042、第二十二开关管T13以及第二十三开关管T14。
第二十二开关管T13的控制端与第一开关管T1的输出端连接,第二十二开关管的输出端与参考点K(N)连接,第二十二开关管的输入端与参考点P(N)连接。
第二十三开关管T14的控制端输入上一级的下传信号ST(N-1),第二十三开关管T14的输出端与参考点K(N)连接,第二十三开关管T14的输入端与参考点P(N)连接。
第一下拉维持单元2041包括第六开关管T10、第七开关管T9、第八开关管T23、第九开关管T6、第十开关管T8、第十一开关管T16、第十二开关管T20、第十三开关管T18。
第六开关管T10的控制端与参考点K(N)连接,第六开关管T10的输入端与第一恒压低电平源VSS1连接,第六开关管T10的输出端与第二开关管T2的输出端连接。
第七开关管T9的控制端与参考点K(N)连接,第七开关管T9的输入端与第二恒压低电平源VSS2连接,第七开关管T9的输出端与第一开关管T1的输出端连接;
第八开关管T23的控制端与参考点K(N)连接,第八开关管T23的输入端与第一恒压低电平源VSS1连接,第八开关管T23的输出端与本级的下传信号ST(N)连接;
第九开关管T6的控制端与第一高频脉冲信号XCKN(即时钟信号)连接,第九开关管T6的输入端与第一高频脉冲信号XCKN连接,第九开关管T6的输出端与参考点K(N)连接;
第十开关管T8的控制端与本级的下传信号ST(N)连接,第十开关管T8的输入端与第一恒压低电平源VSS1连接,第十开关管T8的输出端与第一高频脉冲信号XCKN连接;
第十一开关管T16的控制端与第二高频脉冲信号CKN连接,第十一开关管T16的输入端与第一高频脉冲信号XCKN连接,第十一开关管T16的输出端与参考点K(N)连接;
第十二开关管T20的控制端与参考点K(N)连接,第十二开关管T20的输出端与参考点K(N)连接,第十二开关管T20的输入端与第一高频脉冲信号XCKN连接;
第十三开关管T18的控制端输入上一级的下传信号ST(N-1),第十三开关管T18的输入端与第一恒压低电平源VSS1连接,第十三开关管T18的输出端与第一高频脉冲信号XCKN连接。
第二下拉维持单元2042包括第十四开关管T11、第十五开关管T12、第十六开关管T22、第十七开关管T5、第十八开关管T7、第十九开关管T15、第二十开关管T19以及第二十一开关管T17。
第十四开关管T11的控制端与参考点P(N)连接,第十四开关管T11的输入端与第一恒压低电平源VSS1连接,第十四开关管T11的输出端与第二开关管T2的输出端连接;
第十五开关管T12的控制端与参考点P (N)连接,第十五开关管T12的输入端与第二恒压低电平源VSS2连接,第十五开关管T12的输出端与第一开关管T1的输出端连接;
第十六开关管T22的控制端与参考点P(N)连接,第十六开关管T22的输入端与第一恒压低电平源VSS1连接,第十六开关管T22的输出端与本级的下传信号ST(N)连接;
第十七开关管T5的控制端与第二高频脉冲信号CKN连接,第十七开关管T5的输入端与第二高频脉冲信号CKN连接,第十七开关管T5的输出端与参考点P(N)连接;
第十八开关管T7的控制端与本级的下传信号ST(N)连接,第十八开关管T7的输入端与第一恒压低电平源VSS1连接,第十八开关管T7的输出端与第二高频脉冲信号CKN连接;
第十九开关管T15的控制端与第一高频脉冲信号XCKN连接,第十九开关管T15的输入端与第二高频脉冲信号CKN连接,第十九开关管T15的输出端与参考点P(N)连接;
第二十开关管T19的控制端与参考点P(N)连接,第二十开关管T19的输出端与参考点P(N)连接,第二十开关管T19的输入端与第二高频脉冲信号CKN连接;
第二十一开关管T17的控制端输入上一级的下传信号ST(N-1),第二十一开关管T17的输入端与第一恒压低电平源VSS1连接,第二十一开关管的输出端与第二高频脉冲信号CKN连接。
这里的第一高频脉冲信号XCKN与第二高频脉冲信号CKN的电位相反。
自举电容Cb设置在第一开关管T1的输出端以及上拉模块202的第二开关管T2的输出端之间。
优选的,本优选实施例的扫描驱动电路20还可包括用于对本级的扫描线的扫描电平信号Q(n)进行重置操作的重置模块206,该重置模块206包括开关管T4,通过对开关管T4的控制端输入高电平信号来实现对扫描线的扫描电平信号Q(n)(即参考点Q(n))进行重置处理。
请参照图2,本优选实施例的扫描驱动电路20使用时,当上一级的下传信号ST(N-1)为高电平时,第一开关管T1导通,恒压高电平DCH通过第一开关管T1给自举电容Cb充电,使得参考点Q(n)上升到一较高的电平。随后上一级的下传信号ST(N-1)转为低电平,第一开关管T1断开,参考点Q(n)通过自举电容Cb维持一较高的电平,并且第二开关管T2和第三开关管T19导通。
随后本级的时钟信号CK(n)转为高电平,时钟信号CK(n)通过第二开关管T2继续给自举电容Cb充电,使得参考点Q(n)达到一更高的电平,本级的扫描信号G(N)以及本级的下传信号ST(N)也转为高电平。
此时参考点Q(n)为高电平状态,由于第一开关管T1的输入端与恒压高电平DCH连接,因此参考点Q(n)不会通过第一开关管T1产生漏电现象。
同时由于第二十二开关管T13导通,第一下拉维持单元或第二下拉维持单元在第一高频脉冲信号和第二高频脉冲信号的作用下维持参考点Q(n)的高电平。
当第一高频脉冲信号XCKN为高电平,第二高频脉冲信号CKN为低电平时,第十九开关管T15、第九开关管T6以及第十八开关管T7导通,参考点K(N)和参考点P(n)通过第十九开关管T15和第十八开关管T7拉低至低电位,从而第六开关管T10、第七开关管T11、第八开关管T23、第十四开关管T11、第十五开关管T12以及第十六开关管T22断开,保证了参考点Q(n)、本级的下拉信号ST(N)以及本级的扫描信号G(N)的高电位。
当第一高频脉冲信号XCKN为低电平,第二高频脉冲信号CKN为高电平时,第十七开关管T5、第十一开关管T16以及第十开关管T8导通,参考点K(N)和参考点P(n)通过第十一开关管T16和第十开关管T8拉低至低电位,从而第六开关管T10、第七开关管T11、第八开关管T23、第十四开关管T11、第十五开关管T12以及第十六开关管T22断开,保证了参考点Q(n)、本级的下拉信号ST(N)以及本级的扫描信号G(N)的高电位。
当下一级的下拉信号ST(N+1)转为高电平时,第四开关管T3导通,参考点Q(n)转到低电平,这时第二十二开关管T13断开。
当第一高频脉冲信号XCKN为高电平,参考点K(N)被拉至高点平,从而第六开关管T10、第七开关管T11以及第八开关管T23导通,保证了参考点Q(n)、本级的下拉信号ST(N)以及本级的扫描信号G(N)的低电位。
当第二高频脉冲信号CKN为高电平,参考点P(n) 被拉至高点平,从而第十四开关管T11、第十五开关管T12以及第十六开关管T22导通,同样保证了参考点Q(n)、本级的下拉信号ST(N)以及本级的扫描信号G(N)的低电位。
同时由于本优选实施例中将参考点Q(n)下拉至较第一低电平更低的第二低电平,这样可以更好的保证第二开关管T2和第三开关管T19的断开状态,避免第二开关管T2的漏电影响扫描信号G(N)的电位,以及第三开关管T19的漏电影响本级的下传信号ST(N)的电位。
综上所述,本优选实施例的扫描驱动电路无论是参考点Q(n)处于高电位状态或低电位状态时,都能较好的维持参考点Q(n)的电位状态,避免了由于开关管的漏电导致参考点Q(n)的电位改变。
本发明的扫描驱动电路通过设置多个不同电位的恒压低电平源,可以很好的避免漏电现象的产生,提高扫描驱动电路的可靠性。
请参照图3,图3为本发明的扫描驱动电路的第二优选实施例的结构图。本优选实施例的扫描驱动电路与第一优选实施例的区别在于,第十开关管T8和第十八开关管T7的输入端均与第二恒压低电平源连接,使得第十开关管T8和第十八开关管T7不会产生漏电而影响参考点K(N)和参考点P(n)的电位,进一步提高了该扫描驱动电路的可靠性。
请参照图4,图4为本发明的扫描驱动电路的第三优选实施例的结构图。本优选实施例的扫描驱动电路与第二优选实施例的区别在于,第五开关管T21、第八开关管T23以及第十六开关管T22的输入端均与第二恒压低电平源连接,使得第五开关管T21、第八开关管T23以及第十六开关管T22的漏电不会影响本级的下传信号ST(N)的电位,进一步提高了该扫描驱动电路的可靠性。
请参照图5和图6,图5为本发明的扫描驱动电路的第四优选实施例的结构图。图6为本发明的扫描驱动电路的第四优选实施例的信号波形图。本优选实施例的扫描驱动电路50包括上拉控制模块501、上拉模块502、下拉模块503、下拉维持模块504、下传模块505、重置模块506、自举电容Cb以及恒压低电平源。本优选实施例的扫描驱动电路的恒压低电平源包括第一恒压低电平源VSS1、第二恒压低电平源VSS2以及第三恒压低电平源VSS3。第一恒压低电平源VSS1用于向下拉维持模块提供第一低电平,第二恒压低电平源VSS2用于向下拉维持模块提供第二低电平,第三恒压低电平源VSS3用于向下拉维持模块提供第三低电平,其中第一低电平用于拉低扫描信号G(N),第二低电平用于拉低扫描电平信号Q(n),第三低电平用于拉低下传信号ST(N);第一低电平的绝对值小于第二低电平的绝对值,第二低电平的绝对值小于第三低电平的绝对值。
下拉模块503的第五开关管T21的输出端与第三恒压低电平源VSS3连接,下拉维持模块504的第八开关管T23的输入端与第三恒压低电平源VSS3连接,下拉维持模块504的第十五开关管T22的输入端与第三恒压低电平源VSS3连接。
下拉模块503的第四开关管T3与第二恒压低电平源VSS2连接,下拉维持模块504的第七开关管T9与第二恒压低电平源VSS2连接,下拉维持模块504的第十开关管T8的输入端与第二恒压低电平源VSS2连接,下拉维持模块504的第十五开关管T12的输入端与第二恒压低电平源VSS2连接,下拉维持模块504的第十八开关管T7的输入端与第二恒压低电平源VSS2连接。
下拉维持模块504的第六开关管T10的输入端与第一恒压低电平源VSS1连接,下拉维持模块504的第十三开关管T18的输入端与第一恒压低电平源VSS1连接,下拉维持模块504的第十四开关管T11的输入端与第一恒压低电平源VSS1连接,下拉维持模块504的第二十一开关管T17的输入端与第一恒压低电平源VSS1连接。
本优选实施例的扫描驱动电路50通过三个恒压低电平源的设计,可更好的将本级的下拉信号ST(N)拉低,使得第十开关管T8以及第十八开关管T7关闭的更好,从而保证参考点K(N)和参考点P(N)的高电位。
请参照图7和图8,图7为本发明的扫描驱动电路的第五优选实施例的结构示意图;图8为本发明的扫描驱动电路的第五优选实施例的信号波形图。本优选实施例和扫描驱动电路的第四优选实施例的区别在于使用第一低频电位信号LC2代替第一高频脉冲信号XCKN,第二低频电位信号LC1代替第二高频脉冲CKN,第一低频电位信号LC2和第二低频电位信号LC1可以数帧画面或数十帧画面之后对电位进行转换,这样可以减少扫描驱动电路的脉冲切换,节约扫描驱动电路的功耗。
本发明的扫描驱动电路通过设置多个不同电位的恒压低电平源,可以很好的避免漏电现象的产生,提高扫描驱动电路的可靠性;解决了现有的扫描驱动电路的容易发生漏电现象,从而影响扫描驱动电路的可靠性的技术问题。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种扫描驱动电路,用于对级联的扫描线进行驱动操作,其包括:
    上拉控制模块,用于接收上一级的下传信号,并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号;
    上拉模块,用于根据所述扫描电平信号以及本级的时钟信号,拉升相应的所述扫描线的扫描信号;
    下拉模块,用于根据下一级的下传信号,拉低相应的所述扫描线的扫描信号
    下拉维持模块,用于维持相应的所述扫描线的扫描信号的低电平;
    下传模块,用于向下一级的上拉控制模块发送本级的下传信号;
    自举电容,用于生成所述扫描线的扫描信号的高电平;
    重置模块,用于对本级的所述扫描线的扫描电平信号进行重置操作;
    恒压低电平源,包括:
    第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;以及
    第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号以及所述下传信号;
    其中第一低电平的绝对值小于所述第二低电平的绝对值;
    其中所述上拉控制模块包括第一开关管,所述第一开关管的控制端输入所述上一级的下传信号,所述第一开关管的输入端输入所述恒压高电平,所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
  2. 根据权利要求1所述的扫描驱动电路,其中所述上拉模块包括第二开关管,所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第二开关管的输入端输入所述本级的时钟信号,所述第二开关管的输出端输出本级的扫描信号。
  3. 根据权利要求1所述的扫描驱动电路,其中所述下传模块包括第三开关管,所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第三开关管的输入端输入所述本级的时钟信号,所述第三开关管的输出端输出所述本级的下传信号。
  4. 根据权利要求1所述的扫描驱动电路,其中所述下拉模块包括第四开关管,所述第四开关管的控制端输入所述下一级的下传信号,所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接,所述第四开关管的输出端与所述第二恒压低电平源连接。
  5. 根据权利要求3所述的扫描驱动电路,其中所述下拉模块包括第五开关管,所述第五开关管的控制端输入所述下一级的下传信号,所述第五开关管的输入端与所述第三开关管的输出端连接,所述第五开关管的输出端与所述恒压低电平源连接。
  6. 根据权利要求1所述的扫描驱动电路,其中所述下拉维持模块包括第一下拉维持单元、第二下拉维持单元、第二十二开关管以及第二十三开关管;
    所述第二十二开关管的控制端与所述第一开关管的输出端连接,所述第二十二开关管的输出端与参考点K(N)连接,所述第二十二开关管的输入端与参考点P(N)连接;
    所述第二十三开关管的控制端输入上一级的下传信号,所述第二十三开关管的输出端与所述参考点K(N)连接,所述第二十三开关管的输入端与所述参考点P(N)连接;
    所述第一下拉维持单元包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管;
    所述第六开关管的控制端与所述参考点K(N)连接,所述第六开关管的输入端与所述第一恒压低电平源连接,所述第六开关管的输出端与所述第二开关管的输出端连接;
    所述第七开关管的控制端与所述参考点K(N)连接,所述第七开关管的输入端与所述第二恒压低电平源连接,所述第七开关管的输出端与所述第一开关管的输出端连接;
    所述第八开关管的控制端与所述参考点K(N)连接,所述第八开关管的输入端与所述恒压低电平源连接,所述第八开关管的输出端与本级的下传信号连接;
    所述第九开关管的控制端与第一高频脉冲信号连接,所述第九开关管的输入端与所述第一高频脉冲信号连接,所述第九开关管的输出端与所述参考点K(N)连接;
    所述第十开关管的控制端与所述本级的下传信号连接,所述第十开关管的输入端与所述恒压低电平源连接,所述第十开关管的输出端与所述第一高频脉冲信号连接;
    所述第十一开关管的控制端与第二高频脉冲信号连接,所述第十一开关管的输入端与所述第一高频脉冲信号连接,所述第十一开关管的输出端与所述参考点K(N)连接;
    所述第十二开关管的控制端与所述参考点K(N)连接,所述第十二开关管的输出端与所述参考点K(N)连接,所述第十二开关管的输入端与所述第一高频脉冲信号连接;
    所述第十三开关管的控制端输入所述上一级的下传信号,所述第十三开关管的输入端与所述恒压低电平源连接,所述第十三开关管的输出端与所述第一高频脉冲信号连接;
    所述第二下拉维持单元包括第十四开关管、第十五开关管、第十六开关管、第十七开关管、第十八开关管、第十九开关管、第二十开关管、第二十一开关管;
    所述第十四开关管的控制端与所述参考点P(N)连接,所述第十四开关管的输入端与所述第一恒压低电平源连接,所述第十四开关管的输出端与所述第二开关管的输出端连接;
    所述第十五开关管的控制端与所述参考点P (N)连接,所述第十五开关管的输入端与所述第二恒压低电平源连接,所述第十五开关管的输出端与所述第一开关管的输出端连接;
    所述第十六开关管的控制端与所述参考点P(N)连接,所述第十六开关管的输入端与所述恒压低电平源连接,所述第十六开关管的输出端与本级的下传信号连接;
    所述第十七开关管的控制端与第二高频脉冲信号连接,所述第十七开关管的输入端与所述第二高频脉冲信号连接,所述第十七开关管的输出端与所述参考点P(N)连接;
    所述第十八开关管的控制端与所述本级的下传信号连接,所述第十八开关管的输入端与所述恒压低电平源连接,所述第十八开关管的输出端与所述第二高频脉冲信号连接;
    所述第十九开关管的控制端与第一高频脉冲信号连接,所述第十九开关管的输入端与所述第二高频脉冲信号连接,所述第十九开关管的输出端与所述参考点P(N)连接;
    所述第二十开关管的控制端与所述参考点P(N)连接,所述第二十开关管的输出端与所述参考点P(N)连接,所述第二十开关管的输入端与所述第二高频脉冲信号连接;
    所述第二十一开关管的控制端输入所述上一级的下传信号,所述第二十一开关管的输入端与所述恒压低电平源连接,所述第二十一开关管的输出端与所述第二高频脉冲信号连接。
  7. 根据权利要求6所述的扫描驱动电路,其中所述第一高频脉冲信号与所述第二高频脉冲信号的电位相反。
  8. 根据权利要求1所述的扫描驱动电路,其中所述恒压低电平源包括:
    第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;
    第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号;以及
    第三恒压低电平源,用于向所述下拉维持模块提供第三低电平,其中所述第三低电平用于拉低所述下传信号;
    其中所述第一低电平的绝对值小于所述第二低电平的绝对值,所述第二低电平的绝对值小于所述第三低电平的绝对值。
  9. 根据权利要求8所述的扫描驱动电路,其中所述下拉模块的第五开关管的输出端与所述第三恒压低电平源连接,所述下拉维持模块的第八开关管的输入端与所述第三恒压低电平源连接,所述下拉维持模块的第十五开关管的输入端与所述第三恒压低电平源连接;
    所述下拉模块的第四开关管的输出端与所述第二恒压低电平源连接;所述下拉维持模块的第七开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十五开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十八开关管的输入端与所述第二恒压低电平源连接;
    所述下拉维持模块的第六开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十三开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十四开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第二十一开关管的输入端与所述第一恒压低电平源连接。
  10. 一种扫描驱动电路,用于对级联的扫描线进行驱动操作,其包括:
    上拉控制模块,用于接收上一级的下传信号,并根据所述上一级的下传信号生成相应的所述扫描线的扫描电平信号;
    上拉模块,用于根据所述扫描电平信号以及本级的时钟信号,拉升相应的所述扫描线的扫描信号;
    下拉模块,用于根据下一级的下传信号,拉低相应的所述扫描线的扫描信号
    下拉维持模块,用于维持相应的所述扫描线的扫描信号的低电平;
    下传模块,用于向下一级的上拉控制模块发送本级的下传信号;
    自举电容,用于生成所述扫描线的扫描信号的高电平;以及
    恒压低电平源,包括:
    第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;以及
    第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号以及所述下传信号;
    其中第一低电平的绝对值小于所述第二低电平的绝对值。
  11. 根据权利要求10所述的扫描驱动电路,其中所述上拉控制模块包括第一开关管,所述第一开关管的控制端输入所述上一级的下传信号,所述第一开关管的输入端输入所述恒压高电平,所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接。
  12. 根据权利要求11所述的扫描驱动电路,其中所述上拉模块包括第二开关管,所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第二开关管的输入端输入所述本级的时钟信号,所述第二开关管的输出端输出本级的扫描信号。
  13. 根据权利要求11所述的扫描驱动电路,其中所述下传模块包括第三开关管,所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接,所述第三开关管的输入端输入所述本级的时钟信号,所述第三开关管的输出端输出所述本级的下传信号。
  14. 根据权利要求11所述的扫描驱动电路,其中所述下拉模块包括第四开关管,所述第四开关管的控制端输入所述下一级的下传信号,所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接,所述第四开关管的输出端与所述第二恒压低电平源连接。
  15. 根据权利要求13所述的扫描驱动电路,其中所述下拉模块包括第五开关管,所述第五开关管的控制端输入所述下一级的下传信号,所述第五开关管的输入端与所述第三开关管的输出端连接,所述第五开关管的输出端与所述恒压低电平源连接。
  16. 根据权利要求11所述的扫描驱动电路,其中所述下拉维持模块包括第一下拉维持单元、第二下拉维持单元、第二十二开关管以及第二十三开关管;
    所述第二十二开关管的控制端与所述第一开关管的输出端连接,所述第二十二开关管的输出端与参考点K(N)连接,所述第二十二开关管的输入端与参考点P(N)连接;
    所述第二十三开关管的控制端输入上一级的下传信号,所述第二十三开关管的输出端与所述参考点K(N)连接,所述第二十三开关管的输入端与所述参考点P(N)连接;
    所述第一下拉维持单元包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管;
    所述第六开关管的控制端与所述参考点K(N)连接,所述第六开关管的输入端与所述第一恒压低电平源连接,所述第六开关管的输出端与所述第二开关管的输出端连接;
    所述第七开关管的控制端与所述参考点K(N)连接,所述第七开关管的输入端与所述第二恒压低电平源连接,所述第七开关管的输出端与所述第一开关管的输出端连接;
    所述第八开关管的控制端与所述参考点K(N)连接,所述第八开关管的输入端与所述恒压低电平源连接,所述第八开关管的输出端与本级的下传信号连接;
    所述第九开关管的控制端与第一高频脉冲信号连接,所述第九开关管的输入端与所述第一高频脉冲信号连接,所述第九开关管的输出端与所述参考点K(N)连接;
    所述第十开关管的控制端与所述本级的下传信号连接,所述第十开关管的输入端与所述恒压低电平源连接,所述第十开关管的输出端与所述第一高频脉冲信号连接;
    所述第十一开关管的控制端与第二高频脉冲信号连接,所述第十一开关管的输入端与所述第一高频脉冲信号连接,所述第十一开关管的输出端与所述参考点K(N)连接;
    所述第十二开关管的控制端与所述参考点K(N)连接,所述第十二开关管的输出端与所述参考点K(N)连接,所述第十二开关管的输入端与所述第一高频脉冲信号连接;
    所述第十三开关管的控制端输入所述上一级的下传信号,所述第十三开关管的输入端与所述恒压低电平源连接,所述第十三开关管的输出端与所述第一高频脉冲信号连接;
    所述第二下拉维持单元包括第十四开关管、第十五开关管、第十六开关管、第十七开关管、第十八开关管、第十九开关管、第二十开关管、第二十一开关管;
    所述第十四开关管的控制端与所述参考点P(N)连接,所述第十四开关管的输入端与所述第一恒压低电平源连接,所述第十四开关管的输出端与所述第二开关管的输出端连接;
    所述第十五开关管的控制端与所述参考点P (N)连接,所述第十五开关管的输入端与所述第二恒压低电平源连接,所述第十五开关管的输出端与所述第一开关管的输出端连接;
    所述第十六开关管的控制端与所述参考点P(N)连接,所述第十六开关管的输入端与所述恒压低电平源连接,所述第十六开关管的输出端与本级的下传信号连接;
    所述第十七开关管的控制端与第二高频脉冲信号连接,所述第十七开关管的输入端与所述第二高频脉冲信号连接,所述第十七开关管的输出端与所述参考点P(N)连接;
    所述第十八开关管的控制端与所述本级的下传信号连接,所述第十八开关管的输入端与所述恒压低电平源连接,所述第十八开关管的输出端与所述第二高频脉冲信号连接;
    所述第十九开关管的控制端与第一高频脉冲信号连接,所述第十九开关管的输入端与所述第二高频脉冲信号连接,所述第十九开关管的输出端与所述参考点P(N)连接;
    所述第二十开关管的控制端与所述参考点P(N)连接,所述第二十开关管的输出端与所述参考点P(N)连接,所述第二十开关管的输入端与所述第二高频脉冲信号连接;
    所述第二十一开关管的控制端输入所述上一级的下传信号,所述第二十一开关管的输入端与所述恒压低电平源连接,所述第二十一开关管的输出端与所述第二高频脉冲信号连接。
  17. 根据权利要求16所述的扫描驱动电路,其中所述第一高频脉冲信号与所述第二高频脉冲信号的电位相反。
  18. 根据权利要求10所述的扫描驱动电路,其中所述恒压低电平源包括:
    第一恒压低电平源,用于向所述下拉维持模块提供第一低电平,其中所述第一低电平用于拉低所述扫描信号;
    第二恒压低电平源,用于向所述下拉维持模块提供第二低电平,其中所述第二低电平用于拉低所述扫描电平信号;以及
    第三恒压低电平源,用于向所述下拉维持模块提供第三低电平,其中所述第三低电平用于拉低所述下传信号;
    其中所述第一低电平的绝对值小于所述第二低电平的绝对值,所述第二低电平的绝对值小于所述第三低电平的绝对值。
  19. 根据权利要求18所述的扫描驱动电路,其中所述下拉模块的第五开关管的输出端与所述第三恒压低电平源连接,所述下拉维持模块的第八开关管的输入端与所述第三恒压低电平源连接,所述下拉维持模块的第十五开关管的输入端与所述第三恒压低电平源连接;
    所述下拉模块的第四开关管的输出端与所述第二恒压低电平源连接;所述下拉维持模块的第七开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十五开关管的输入端与所述第二恒压低电平源连接;所述下拉维持模块的第十八开关管的输入端与所述第二恒压低电平源连接;
    所述下拉维持模块的第六开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十三开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第十四开关管的输入端与所述第一恒压低电平源连接;所述下拉维持模块的第二十一开关管的输入端与所述第一恒压低电平源连接。
  20. 根据权利要求10所述的扫描驱动电路,其中所述扫描驱动电路还包括:
    重置模块,用于对本级的所述扫描线的扫描电平信号进行重置操作。
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