WO2017004849A1 - 一种扫描驱动电路 - Google Patents

一种扫描驱动电路 Download PDF

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Publication number
WO2017004849A1
WO2017004849A1 PCT/CN2015/084339 CN2015084339W WO2017004849A1 WO 2017004849 A1 WO2017004849 A1 WO 2017004849A1 CN 2015084339 W CN2015084339 W CN 2015084339W WO 2017004849 A1 WO2017004849 A1 WO 2017004849A1
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WO
WIPO (PCT)
Prior art keywords
switch tube
voltage dividing
output end
constant voltage
voltage
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Application number
PCT/CN2015/084339
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English (en)
French (fr)
Inventor
戴超
Original Assignee
深圳市华星光电技术有限公司
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Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/774,147 priority Critical patent/US10115362B2/en
Publication of WO2017004849A1 publication Critical patent/WO2017004849A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present invention relates to the field of display driving, and more particularly to a scan driving circuit.
  • Gate Driver On Array is a driving circuit for forming a scan driving circuit on an array substrate of an existing thin film transistor liquid crystal display to realize progressive scanning of a scanning line.
  • a schematic diagram of a conventional scan driving circuit is shown in FIG. 1.
  • the scan driving circuit 10 includes a pull-up control module 101, a pull-up module 102, a downlink module 103, a pull-down module 104, a bootstrap capacitor 105, and a pull-down maintaining module 106.
  • the scan drive circuit may have a circuit failure if the threshold voltages of the components do not match. This is because the potential control ability of the Q point is weakened by the pull-down sustain circuit module in the case where the threshold power supply of the component is not matched, and the potential of the Q point cannot be normally raised to a high potential, thereby causing the reliability of the scan driving circuit to be low. .
  • An embodiment of the present invention provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage and the first constant voltage high level;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a scan signal of the corresponding scan line according to a clock signal of the next two stages
  • a pull-down maintaining module configured to maintain a low level of a corresponding scan signal of the scan line according to a second constant voltage high level
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor for generating a high level of a scan signal of the scan line
  • the first constant voltage high level and the second constant voltage high level are respectively generated by the driving chips of the corresponding liquid crystal display panels, wherein the voltage of the first constant voltage high level is greater than the second constant voltage High level voltage;
  • the second constant voltage high level is generated by performing a voltage dividing operation on the first constant voltage high level.
  • the pull-up control module includes a first switch tube, and a control end of the first switch tube inputs a downlink signal of the upper stage, and the first switch tube Inputting the first constant voltage high level, the output end of the first switch tube is respectively connected to the pull-up module, the pull-down module, the pull-down maintenance module, the downlink module, and the self Lift the capacitor connection;
  • the pull-up module includes a second switch tube, a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the second switch tube is input to the a clock signal of the stage, the output end of the second switch tube outputs a scan signal of the current stage;
  • the downlink module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the third switch tube inputs the a clock signal of the stage, the output end of the third switch tube outputs the downlink signal of the current stage;
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and a control end of the fourth switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the fourth switch tube Connected to an output end of the first switch tube of the pull-up control module, an output end of the fourth switch tube is connected to an output end of the fifth switch tube, and a control end of the fifth switch tube inputs the a clock signal of the next two stages, wherein the input end of the fifth switch tube inputs the scan signal of the current stage;
  • the pull-down maintenance module includes a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, and a Fourteen switch tubes and fifteenth switch tubes;
  • the control end of the sixth switch tube inputs the second constant voltage high level, the input end of the sixth switch tube inputs the second constant voltage high level, and the output ends of the sixth switch tube respectively Connecting with an output end of the seventh switch tube, a control end of the eighth switch tube, and a control end of the tenth switch tube;
  • the control end of the seventh switch tube is respectively connected to the output end of the first switch tube and the control end of the eleventh switch tube, and the input end of the seventh switch tube and the first constant voltage low level connection;
  • the input end of the eighth switch tube is input to the second constant voltage high level, and the output end of the eighth switch tube is respectively controlled with the output end of the ninth switch tube and the fourteenth switch tube And connecting the control end of the fifteenth switch tube;
  • a control end of the ninth switch tube is connected to an output end of the first switch tube, and an input end of the ninth switch tube is respectively connected to an output end of the tenth switch tube and the eleventh switch tube Output connection;
  • the input end of the tenth switch tube inputs the second constant voltage high level
  • the input end of the eleventh switch tube is connected to the second constant voltage low level
  • a control end of the twelfth switch tube is connected to an output end of the first switch tube, an input end of the twelfth switch tube is input to the second constant voltage high level, and the twelfth switch tube
  • the output ends are respectively connected to the output end of the thirteenth switch tube and the output end of the fourteenth switch tube;
  • a control end of the thirteenth switch tube is connected to a control end of the fifteenth switch tube, and an input end of the thirteenth switch tube is connected to the second constant voltage low level;
  • An input end of the fourteenth switch tube is connected to an output end of the first switch tube
  • the input end of the fifteenth switch tube is connected to the first constant voltage low level, and the output end of the fifteenth switch tube is connected to the output end of the second switch tube of the pull-up module.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube and a second voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube inputs a second constant voltage low level, and the input end of the second voltage dividing switch tube inputs a first constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube is input to the first constant voltage high level, the control end of the third voltage dividing switch tube is input to the second constant voltage low level, and the third voltage dividing switch tube The output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control terminal of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the second constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the first constant voltage high level, and the control end of the third voltage dividing switch tube inputs the first constant voltage high level, the third partial pressure
  • An output end of the switch tube is connected to an output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube is connected to the output end of the third switching tube, and the input end of the fourth voltage dividing switch tube is input to the second constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the second constant voltage high level and the first constant voltage high level are generated by a voltage dividing operation of a main constant voltage high level; wherein the main constant voltage is high
  • the level is used to generate a high level clock signal as well as a start signal.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube inputs a second constant voltage low level, and the input end of the second voltage dividing switch tube inputs a first constant voltage low level;
  • the control end of the third voltage dividing switch tube is connected to the output end of the second voltage dividing switch tube, and the output end of the third voltage dividing switch tube is connected to the output end of the second voltage dividing switch tube.
  • the input end of the third voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the first constant voltage low level;
  • the output end of the third voltage dividing switch tube outputs the first constant voltage high level, and the output end of the fourth voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit comprises a first partial pressure switch tube, a second partial pressure switch tube, a third partial pressure switch tube, a fourth partial pressure switch tube, a fifth partial pressure switch tube, a sixth partial pressure switch tube, and a seventh a voltage dividing switch tube and an eighth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the main constant voltage high level, the control end of the third voltage dividing switch tube inputs a second constant voltage low level, and the third voltage dividing switch tube
  • the output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control terminal of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the second constant voltage low level;
  • a control end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and an output end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the fifth voltage dividing switch tube is connected to the output end of the sixth voltage dividing switch tube;
  • the control end of the sixth voltage dividing switch tube is connected to the output end of the eighth voltage dividing switch tube, and the input end of the sixth voltage dividing switch tube is input to the first constant voltage low level;
  • An output end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and a control end of the seventh voltage dividing switch tube is input to the second constant voltage low level, the first An input end of the seventh voltage dividing switch tube is connected to a control end of the sixth voltage dividing switch tube;
  • the control end of the eighth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the eighth voltage dividing switch tube inputs the second constant voltage low level;
  • the output end of the fifth voltage dividing switch tube outputs the first constant voltage high level, and the output end of the sixth voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit comprises a first partial pressure switch tube, a second partial pressure switch tube, a third partial pressure switch tube, a fourth partial pressure switch tube, a fifth partial pressure switch tube, a sixth partial pressure switch tube, a seven-part pressure switch tube and an eighth voltage-divider switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the third voltage dividing switch tube inputs the main constant voltage high level
  • the third voltage dividing switch tube The output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube is connected to the output end of the third voltage dividing switch tube, and the input end of the fourth voltage dividing switch tube is input to the second constant voltage low level;
  • a control end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and an output end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the fifth voltage dividing switch tube is connected to the output end of the sixth voltage dividing switch tube;
  • the control end of the sixth voltage dividing switch tube is connected to the output end of the eighth voltage dividing switch tube, and the input end of the sixth voltage dividing switch tube is input to the first constant voltage low level;
  • An output end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and a control end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the seventh voltage dividing switch tube is connected to the control end of the sixth voltage dividing switch tube;
  • the control end of the eighth voltage dividing switch tube is connected to the control degree of the sixth voltage dividing switch tube, and the input end of the eighth voltage dividing switch tube is input to the second constant voltage low level;
  • the output end of the fifth voltage dividing switch tube outputs the first constant voltage high level, and the output end of the sixth voltage dividing switch tube outputs the second constant voltage high level.
  • the embodiment of the present invention further provides a scan driving circuit for driving a cascaded scan line, which includes:
  • a pull-up control module configured to receive a downlink signal of the upper stage, and generate a corresponding scan level signal of the scan line according to the downlink signal of the upper stage and the first constant voltage high level;
  • a pull-up module configured to pull up a scan signal of the corresponding scan line according to the scan level signal and a clock signal of the current stage
  • a pull-down module configured to pull down a scan signal of the corresponding scan line according to a clock signal of the next two stages
  • a pull-down maintaining module configured to maintain a low level of a corresponding scan signal of the scan line according to a second constant voltage high level
  • the downlink module is configured to send the downlink signal of the current level to the pull-up control module of the next stage;
  • a bootstrap capacitor is used to generate a high level of the scan signal of the scan line.
  • the pull-up control module includes a first switch tube, and a control end of the first switch tube inputs a downlink signal of the upper stage, and the first switch tube Inputting the first constant voltage high level, the output end of the first switch tube is respectively connected to the pull-up module, the pull-down module, the pull-down maintenance module, the downlink module, and the self Lift the capacitor connection;
  • the pull-up module includes a second switch tube, a control end of the second switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the second switch tube is input to the a clock signal of the stage, the output end of the second switch tube outputs a scan signal of the current stage;
  • the downlink module includes a third switch tube, and a control end of the third switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the third switch tube inputs the a clock signal of the stage, the output end of the third switch tube outputs the downlink signal of the current stage;
  • the pull-down module includes a fourth switch tube and a fifth switch tube, and a control end of the fourth switch tube is connected to an output end of the first switch tube of the pull-up control module, and an input end of the fourth switch tube Connected to an output end of the first switch tube of the pull-up control module, an output end of the fourth switch tube is connected to an input end of the fifth switch tube, and a control end of the fifth switch tube inputs the a clock signal of the next two stages, the output end of the fifth switch tube is input to the scan signal of the current stage;
  • the pull-down maintenance module includes a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, and a Fourteen switch tubes and fifteenth switch tubes;
  • the control end of the sixth switch tube inputs the second constant voltage high level, the input end of the sixth switch tube inputs the second constant voltage high level, and the output ends of the sixth switch tube respectively Connecting with an output end of the seventh switch tube, a control end of the eighth switch tube, and a control end of the tenth switch tube;
  • the control end of the seventh switch tube is respectively connected to the output end of the first switch tube and the control end of the eleventh switch tube, and the input end of the seventh switch tube and the first constant voltage low level connection;
  • the input end of the eighth switch tube is input to the second constant voltage high level, and the output end of the eighth switch tube is respectively controlled with the output end of the ninth switch tube and the fourteenth switch tube And connecting the control end of the fifteenth switch tube;
  • a control end of the ninth switch tube is connected to an output end of the first switch tube, and an input end of the ninth switch tube is respectively connected to an output end of the tenth switch tube and the eleventh switch tube Output connection;
  • the input end of the tenth switch tube inputs the second constant voltage high level
  • the input end of the eleventh switch tube is connected to the second constant voltage low level
  • a control end of the twelfth switch tube is connected to an output end of the first switch tube, an input end of the twelfth switch tube is input to the second constant voltage high level, and the twelfth switch tube
  • the output ends are respectively connected to the output end of the thirteenth switch tube and the output end of the fourteenth switch tube;
  • a control end of the thirteenth switch tube is connected to a control end of the fifteenth switch tube, and an input end of the thirteenth switch tube is connected to the second constant voltage low level;
  • An input end of the fourteenth switch tube is connected to an output end of the first switch tube
  • the input end of the fifteenth switch tube is connected to the first constant voltage low level, and the output end of the fifteenth switch tube is connected to the output end of the second switch tube of the pull-up module.
  • the first constant voltage high level and the second constant voltage high level are respectively generated by driving chips of corresponding liquid crystal display panels, wherein the first constant voltage high voltage The flat voltage is greater than the voltage of the second constant voltage high level.
  • the second constant voltage high level is generated by the voltage dividing operation of the first constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube and a second voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube inputs a second constant voltage low level, and the input end of the second voltage dividing switch tube inputs a first constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube is input to the first constant voltage high level, the control end of the third voltage dividing switch tube is input to the second constant voltage low level, and the third voltage dividing switch tube The output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control terminal of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the second constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the first constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the first constant voltage high level
  • An output end of the switch tube is connected to an output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the first constant voltage high level, and the control end of the third voltage dividing switch tube inputs the first constant voltage high level, the third partial pressure
  • An output end of the switch tube is connected to an output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube is connected to the output end of the third switching tube, and the input end of the fourth voltage dividing switch tube is input to the second constant voltage low level;
  • the output end of the first voltage dividing switch tube outputs the second constant voltage high level.
  • the second constant voltage high level and the first constant voltage high level are generated by a voltage dividing operation of a main constant voltage high level; wherein the main constant voltage is high
  • the level is used to generate a high level clock signal as well as a start signal.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit includes a first voltage dividing switch tube, a second voltage dividing switch tube, a third voltage dividing switch tube, and a fourth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube inputs a second constant voltage low level, and the input end of the second voltage dividing switch tube inputs a first constant voltage low level;
  • the control end of the third voltage dividing switch tube is connected to the output end of the second voltage dividing switch tube, and the output end of the third voltage dividing switch tube is connected to the output end of the second voltage dividing switch tube.
  • the input end of the third voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the first constant voltage low level;
  • the output end of the third voltage dividing switch tube outputs the first constant voltage high level, and the output end of the fourth voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit comprises a first partial pressure switch tube, a second partial pressure switch tube, a third partial pressure switch tube, a fourth partial pressure switch tube, a fifth partial pressure switch tube, a sixth partial pressure switch tube, and a seventh a voltage dividing switch tube and an eighth voltage dividing switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the main constant voltage high level, the control end of the third voltage dividing switch tube inputs a second constant voltage low level, and the third voltage dividing switch tube
  • the output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control terminal of the fourth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the fourth voltage dividing switch tube inputs the second constant voltage low level;
  • a control end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and an output end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the fifth voltage dividing switch tube is connected to the output end of the sixth voltage dividing switch tube;
  • the control end of the sixth voltage dividing switch tube is connected to the output end of the eighth voltage dividing switch tube, and the input end of the sixth voltage dividing switch tube is input to the first constant voltage low level;
  • An output end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and a control end of the seventh voltage dividing switch tube is input to the second constant voltage low level, the first An input end of the seventh voltage dividing switch tube is connected to a control end of the sixth voltage dividing switch tube;
  • the control end of the eighth voltage dividing switch tube inputs the second constant voltage low level, and the input end of the eighth voltage dividing switch tube inputs the second constant voltage low level;
  • the output end of the fifth voltage dividing switch tube outputs the first constant voltage high level, and the output end of the sixth voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit further includes a voltage dividing circuit for performing the voltage dividing operation
  • the voltage dividing circuit comprises a first partial pressure switch tube, a second partial pressure switch tube, a third partial pressure switch tube, a fourth partial pressure switch tube, a fifth partial pressure switch tube, a sixth partial pressure switch tube, a seven-part pressure switch tube and an eighth voltage-divider switch tube;
  • the input end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the first voltage dividing switch tube inputs the main constant voltage high level
  • the first voltage dividing switch tube The output end is connected to the output end of the second voltage dividing switch tube;
  • the control end of the second voltage dividing switch tube is connected to the output end of the fourth voltage dividing switch tube, and the input end of the second voltage dividing switch tube is input to the first constant voltage low level;
  • the input end of the third voltage dividing switch tube inputs the main constant voltage high level
  • the control end of the third voltage dividing switch tube inputs the main constant voltage high level
  • the third voltage dividing switch tube The output end is connected to the output end of the fourth voltage dividing switch tube;
  • the control end of the fourth voltage dividing switch tube is connected to the output end of the third voltage dividing switch tube, and the input end of the fourth voltage dividing switch tube is input to the second constant voltage low level;
  • a control end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and an output end of the fifth voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the fifth voltage dividing switch tube is connected to the output end of the sixth voltage dividing switch tube;
  • the control end of the sixth voltage dividing switch tube is connected to the output end of the eighth voltage dividing switch tube, and the input end of the sixth voltage dividing switch tube is input to the first constant voltage low level;
  • An output end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, and a control end of the seventh voltage dividing switch tube is connected to an output end of the second voltage dividing switch tube, The input end of the seventh voltage dividing switch tube is connected to the control end of the sixth voltage dividing switch tube;
  • the control end of the eighth voltage dividing switch tube is connected to the control end of the sixth voltage dividing switch tube, and the input end of the eighth voltage dividing switch tube is input to the second constant voltage low level;
  • the output end of the fifth voltage dividing switch tube outputs the first constant voltage high level, and the output end of the sixth voltage dividing switch tube outputs the second constant voltage high level.
  • the scan driving circuit of the present invention strengthens the control capability of the Q point potential by setting the first constant voltage high level and the second constant voltage high level, and improves the reliability of the scan driving circuit.
  • the technical problem of low reliability of the existing scan driving circuit is solved.
  • 1 is a schematic structural view of a conventional scan driving circuit
  • FIG. 2 is a schematic structural view of a preferred embodiment of a scan driving circuit of the present invention.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 4 is a second schematic structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 5 is a schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 4;
  • FIG. 6 is a second schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 4;
  • FIG. 7 is a third structural schematic diagram of a voltage dividing circuit of the scan driving circuit of FIG. 4;
  • FIG. 8 is a third schematic structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • FIG. 9 is a schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 8;
  • FIG. 10 is a second structural schematic diagram of a voltage dividing circuit of the scan driving circuit of FIG. 8;
  • FIG. 11 is a third structural diagram of the voltage dividing circuit of the scan driving circuit of FIG. 8.
  • FIG. 11 is a third structural diagram of the voltage dividing circuit of the scan driving circuit of FIG. 8.
  • FIG. 2 is a schematic structural view of a first preferred embodiment of the scan driving circuit of the present invention.
  • the scan driving circuit 20 of the preferred embodiment includes a pull-up control module 201, a pull-up module 202, a pull-down module 203, a pull-down maintaining module 204, a downlink module 205, and a bootstrap capacitor 206.
  • the pull-up control module 201 is configured to receive the downlink signal ST(N-1) of the previous stage, and generate a corresponding scan according to the downlink signal ST(N-1) of the previous stage and the first constant voltage high level DCH1.
  • the scan level signal Q(N) of the line; the pull-up module 202 is configured to pull up the scan signal G(N) of the corresponding scan line according to the scan level signal Q(N) and the clock signal CK(N) of the current stage.
  • the pull-down module 203 is configured to pull down the scan signal G(N) of the corresponding scan line according to the clock signals CK(N+2) of the next two stages;
  • the pull-down maintenance module 204 is configured to maintain according to the second constant voltage high level DCH2 a low level of the scan signal G(N) of the corresponding scan line;
  • the downlink module 205 is used to send the down signal ST(N) of the current stage to the pull-up control module of the next stage;
  • the bootstrap capacitor 206 is used to generate The high level of the scan signal G(N) of the scan line.
  • the pull-up control module 201 includes a first switch tube T1.
  • the control end of the first switch tube T1 inputs the downlink signal ST(N-1) of the previous stage, and the input end of the first switch tube T11 inputs the first constant voltage.
  • the output of the first switch T11 is connected to the pull-up module 202, the pull-down module 203, the pull-down maintaining module 204, the downlink module 205, and the bootstrap capacitor 206, respectively.
  • the pull-up module 202 includes a second switch tube T2.
  • the control end of the second switch tube T2 is connected to the output end of the first switch tube T1 of the pull-up control module, and the input end of the second switch tube T2 is input with the clock signal CK of the current stage. (N), the output terminal of the second switching transistor T2 outputs the scanning signal G(N) of the present stage.
  • the downlink module 205 includes a third switch T3, the control end of the third switch T3 is connected to the output of the first switch T1 of the pull-up control module 201, and the input of the third switch T22 is input to the clock signal of the current stage. CK(N), the output terminal of the third switching transistor T22 outputs the downlink signal ST(N) of the current stage.
  • the pull-down module 203 includes a fourth switch tube T4 and a fifth switch tube T5.
  • the control end of the fourth switch tube T4 is connected to the output end of the first switch tube T1 of the pull-up control module 201, and the input end of the fourth switch tube T4 is The output end of the first switch tube T5 of the pull-up control module 201 is connected, the output end of the fourth switch tube T4 is connected to the input end of the fifth switch tube T5, and the control end of the fifth switch tube T4 inputs the clock signals of the next two stages.
  • CK (N+2) the input terminal of the fifth switching transistor T5 is input with the scanning signal G(N) of the current stage.
  • the pull-down maintenance module 204 includes a sixth switch tube T6, a seventh switch tube T7, an eighth switch tube T8, a ninth switch tube T9, a tenth switch tube T10, an eleventh switch tube T11, a twelfth switch tube T12, and a The thirteenth switch tube T13, the fourteenth switch tube T14, and the fifteenth switch tube T15.
  • the control end of the sixth switch tube T6 inputs the second constant voltage high level DCH2, the input end of the sixth switch tube T6 inputs the second constant voltage high level DCH2, and the output end of the sixth switch tube T6 and the seventh switch tube respectively
  • the output end of T7, the control end of the eighth switch tube T8, and the control end of the tenth switch tube T10 are connected.
  • the control end of the seventh switch tube T7 is respectively connected to the output end of the first switch tube T1 and the control end of the eleventh switch tube T11, and the input end of the seventh switch tube T7 is connected to the first constant voltage low level VSS1.
  • the input end of the eighth switch tube T8 is input to the second constant voltage high level DCH2, and the output end of the eighth switch tube T8 is respectively connected with the output end of the ninth switch tube T9, the control end of the fourteenth switch tube T14, and the fifteenth The control end of the switch tube T15 is connected.
  • the control end of the ninth switch tube T9 is connected to the output end of the first switch tube T1, and the input end of the ninth switch tube T9 is connected to the output end of the tenth switch tube T10 and the output end of the eleventh switch tube T11, respectively.
  • the input end of the tenth switch T10 is input to the second constant voltage high level DCH2; the input end of the eleventh switch tube T11 is connected to the second constant voltage low level DCL.
  • the control end of the twelfth switch tube T12 is connected to the output end of the first switch tube T1, the input end of the twelfth switch tube T12 is input to the second constant voltage high level DCH2, and the output end of the twelfth switch tube T12 is respectively The output end of the thirteenth switch tube T13 and the output end of the fourteenth switch tube T14 are connected.
  • the control end of the thirteenth switch tube T13 is connected to the control end of the fifteenth switch tube T15, and the input end of the thirteenth switch tube T13 is connected to the second constant voltage low point flat DCL.
  • the input end of the fourteenth switch tube T14 is connected to the output end of the first switch tube T1.
  • the input end of the fifteenth switch tube T15 is connected to the first constant voltage low level VSS1, and the output end of the fifteenth switch tube T15 is connected to the output end of the second switch tube T2 of the pull-up module 202.
  • the bootstrap capacitor 206 is disposed between the output of the first switching transistor T1 and the output of the second switching transistor T2 of the pull-up module 202.
  • the scan driving circuit 20 of the preferred embodiment when the downlink signal ST(N-1) of the upper stage is at a high level, the first switching transistor T1 is turned on, and the first constant voltage high level DCH1 passes the first Switching tube T1 charges bootstrap capacitor 206 such that reference point Q(N) rises to a higher level. Then, the downlink signal ST(N-1) of the upper stage is turned to a low level, the first switch tube T1 is turned off, the reference point Q(N) is maintained at a higher level by the bootstrap capacitor 206, and the second The switch tube T2 and the third switch tube T3 are turned on.
  • the clock signal CK(N) of the current stage is turned to a high level, and the clock signal CK(n) continues to charge the bootstrap capacitor 206 through the second switch T2, so that the reference point Q(N) reaches a higher level.
  • the scanning signal G(N) of this stage and the downlink signal ST(N) of this stage also turn to a high level.
  • the reference point Q(N) is in a high state, and since the input end of the first switching transistor T1 is connected to the first constant voltage high level DCH1, the reference point Q(N) is not generated by the first switching transistor T1. Leakage phenomenon.
  • the reference point P(N) is a low level state, so that the fourteenth switch tube T14 is In the off state, the second constant voltage high level DCH2 is connected to the output end of the fourteenth switch tube T14 through the twelfth switch tube T12, so the reference point Q(N) does not generate leakage through the fourteenth switch tube T14. phenomenon.
  • the fifth switch tube T5 is in an off state, but the output end of the fifth switch tube T5 is input to the scan signal G(N) of the current stage, and the scan signal G(N) of the current stage is at a high level state. Therefore, the reference point Q(N) also does not generate a leakage phenomenon through the fifth switching transistor T5.
  • the scan driving circuit 20 of the preferred embodiment does not generate a leakage phenomenon through the first switching transistor T1, the fourteenth switching transistor T14, and the fifth switching transistor T5 in the high level state, thereby improving the scan driving.
  • the reliability of the circuit 20 does not generate a leakage phenomenon through the first switching transistor T1, the fourteenth switching transistor T14, and the fifth switching transistor T5 in the high level state, thereby improving the scan driving. The reliability of the circuit 20.
  • the fifth switching transistor T5 When the clock signals CK(n+2) of the next two stages are at a high level, the fifth switching transistor T5 is turned on, and the reference point Q(N) is discharged by the pull-down module 203. And because the seventh switch tube T7 is disconnected, the reference point P(N) turns to a high level under the action of the sixth switch tube T6 and the eighth switch tube T8, and the thirteenth switch tube T13 and the fourteenth switch The tube T14 is turned on, and the reference point Q(N) is connected to the second constant voltage low level DCL through the fourteenth switch tube T14 and the thirteenth switch tube T13, thus ensuring the low potential of the reference point Q(N), The scanning signal G(N) of the current level of the low level plays a sustaining role. At the same time, when the reference point Q(N) goes low, the fourth switching transistor T4 is turned off to maintain the low potential of the reference point Q(N).
  • the first constant voltage low level VSS1 In order to facilitate the analysis of the driving circuit, it is preferable to set the first constant voltage low level VSS1 to be greater than the second constant voltage low level DCL, so as to separately and independently control the components in the scan driving circuit 20, the first constant voltage low voltage
  • the specific values of the flat VSS1 and the second constant voltage low level DCL can be set according to actual conditions.
  • the voltage of the first constant voltage high level DCH1 is set to be greater than the voltage of the second constant voltage high level DCH2, so that the pull-up control module 201 and the pull-down maintaining module 204 are driven by different constant voltage high-level sources, which is better.
  • the influence of the component mismatch between the component in the pull-up control module 201 and the pull-down maintaining module 204 on the constant voltage high level is avoided, thereby ensuring the potential control capability to the Q point, and the scan driving circuit 20 is improved. reliability.
  • the scan driving circuit of the present invention strengthens the control capability of the Q point potential by independently setting the first constant voltage high level and the second constant voltage high level, and improves the reliability of the scan driving circuit.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • the liquid crystal display panel includes a driving chip 31, a flexible connecting plate 32, and an array substrate 33 which are disposed on a printed circuit board.
  • a plurality of cascaded scan driving circuits 20 are disposed on the array substrate 33 to drive the cascaded scan lines.
  • the first constant voltage high point DCH1 and the second constant voltage high level DCH2 for the scan driving circuit 20 on the array substrate 33 are respectively generated by the driving chip 31, and are transmitted to the array substrate 33 by the flexible connecting board 32.
  • On circuit 20 On circuit 20.
  • the first constant voltage high level DCH1 and the second constant voltage high level DCH2 are respectively generated by the driving chip 31, and the voltage of the first constant voltage high level DCH1 is greater than the second constant voltage high level DCH2. Voltage.
  • FIG. 4 is a second schematic structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • the liquid crystal display panel also includes a driving chip 31, a flexible connecting plate 32, and an array substrate 43 which are disposed on a printed circuit board.
  • the array substrate 43 further includes a voltage dividing circuit 41 for performing a voltage dividing operation on the first constant voltage high level DCH1, so that the second constant voltage high level DCH2 can be performed on the first constant voltage high level DCH1.
  • the partial pressure operation is generated.
  • FIG. 5 is a schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG.
  • the voltage dividing circuit includes a first voltage dividing switch tube PT51 and a second voltage dividing switch tube PT52.
  • the input end of the first voltage dividing switch tube PT51 inputs the first constant voltage high level DCH1
  • the control end of the first voltage dividing switch tube PT51 inputs the first constant voltage high level DCH1
  • the output end of the first voltage dividing switch tube PT51 It is connected to the output end of the second voltage dividing switch tube PT52.
  • the control terminal of the second voltage dividing switch tube PT52 inputs a second constant voltage low level DCL
  • the input end of the second voltage dividing switch tube PT52 inputs a first constant voltage low level VSS1.
  • the output end of the first voltage dividing switch tube PT51 outputs a second constant voltage high level DCH2.
  • the voltage dividing circuit inputs a first constant voltage high level DCH1, a first constant voltage low level VSS1, and a second constant voltage low level DCL, and outputs a second constant voltage high level DCH2.
  • the output potential of the second constant voltage high level DCH2 can be controlled by adjusting the potential of the second constant voltage low level DCL. The higher the potential of the second constant voltage low level DCL, the lower the output potential of the second constant voltage high level DCH2, and vice versa.
  • FIG. 6 is a second schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 4.
  • the voltage dividing circuit includes a first voltage dividing switch tube PT61, a second voltage dividing switch tube PT62, a third voltage dividing switch tube PT63, and a fourth voltage dividing switch tube PT64.
  • the input end of the first voltage dividing switch tube PT61 is input to the first constant voltage high level DCH1
  • the control end of the first voltage dividing switch tube PT61 is input to the first constant voltage high level DCH1
  • the output end of the first voltage dividing switch tube PT61 It is connected to the output end of the second voltage dividing switch tube PT62.
  • the control end of the second voltage dividing switch tube PT62 is connected to the output end of the fourth voltage dividing switch tube PT64, and the input end of the second voltage dividing switch tube PT62 is input to the first constant voltage low level VSS1.
  • the input end of the third voltage dividing switch tube PT63 inputs the first constant voltage high level DCH1
  • the control end of the third voltage dividing switch tube PT63 inputs the second constant voltage low level DCL
  • the output end of the third voltage dividing switch tube PT63 It is connected to the output end of the fourth voltage dividing switch tube PT64.
  • the control terminal of the fourth voltage dividing switch tube PT64 inputs a second constant voltage low level DCL
  • the input end of the fourth voltage dividing switch tube PT64 inputs a second constant voltage low level DCL.
  • the output end of the first voltage dividing switch tube PT61 outputs a second constant voltage high level DCL.
  • the voltage dividing circuit inputs a first constant voltage high level DCH1, a first constant voltage low level VSS1, and a second constant voltage low level DCL, and outputs a second constant voltage high level DCH2.
  • the output potential of the second constant voltage high level DCH2 can also be controlled by adjusting the potential of the second constant voltage low level DCL.
  • the adjustment accuracy of the voltage dividing circuit is higher than that of the voltage dividing circuit in FIG.
  • FIG. 7 is a third structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 4; the voltage dividing circuit includes a first voltage dividing switch tube PT71, a second voltage dividing switch tube PT72, a third voltage dividing switch tube PT73, and a Quad voltage switch tube PT74.
  • the input end of the first voltage dividing switch tube PT71 is input to the first constant voltage high level DCH1
  • the control end of the first voltage dividing switch tube PT71 is input to the first constant voltage high level DCH1
  • the output end of the first voltage dividing switch tube PT71 It is connected to the output end of the second voltage dividing switch tube PT72.
  • the control end of the second voltage dividing switch tube PT72 is connected to the output end of the fourth voltage dividing switch tube PT74, and the input end of the second voltage dividing switch tube PT72 is input to the first constant voltage low level VSS1.
  • the input end of the third voltage dividing switch tube PT73 is input to the first constant voltage high level DCH1
  • the control end of the third voltage dividing switch tube PT73 is input to the first constant voltage low level VSS1
  • the output end of the third partial pressure switching tube PT73 It is connected to the output end of the fourth voltage dividing switch tube PT74.
  • the control end of the fourth voltage dividing switch tube PT74 of the fourth voltage dividing switch tube is connected with the output end of the third voltage dividing switch tube PT3, and the input end of the fourth voltage dividing switch tube PT74 is input with the second constant voltage low level DCL.
  • the output end of the first voltage dividing switch tube PT71 outputs a second constant voltage high level DCH2.
  • the voltage dividing circuit inputs a first constant voltage high level DCH1, a first constant voltage low level VSS1, and a second constant voltage low level DCL, and outputs a second constant voltage high level DCH2.
  • the output potential of the second constant voltage high level DCH2 can also be controlled by adjusting the potential of the second constant voltage low level DCL.
  • the adjustment accuracy of the voltage dividing circuit is higher than that of the voltage dividing circuit in FIG.
  • FIG. 8 is a third structural diagram of a liquid crystal display panel in a preferred embodiment of the scan driving circuit of the present invention.
  • the liquid crystal display panel also includes a driving chip 31, a flexible connecting plate 32, and an array substrate 83 disposed on the printed circuit board.
  • the array substrate further includes a voltage dividing circuit 81 for performing a voltage dividing operation on the main constant voltage high level VGH, wherein the main constant voltage high level VGH is used to generate a high level clock signal and an enable signal.
  • the second constant voltage high level DCH2 and the first constant voltage level DCH1 can be generated by the main constant voltage high level VGH voltage division operation.
  • the voltage of the main constant voltage high level VGH is greater than the voltage of the first constant voltage high level DCH1, and the voltage of the first constant voltage high level DCH1 is greater than the voltage of the second constant voltage high level DCH2. Since the main constant voltage high level VGH is an inherent high level, there is no need to set an additional independent first constant voltage high level DCH1.
  • FIG. 9 is a schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 8; the voltage dividing circuit includes a first voltage dividing switch tube PT91, a second voltage dividing switch tube PT92, a third voltage dividing switch tube PT93, and Four-divide pressure switch tube PT94.
  • the input end of the first voltage dividing switch tube PT91 inputs the main constant voltage high level VGH
  • the control end of the first voltage dividing switch tube PT91 inputs the main constant voltage high level VGH
  • the output of the two-divider switch tube PT92 is connected.
  • the control terminal of the second voltage dividing switch tube PT92 inputs a second constant voltage low level DCL
  • the input end of the second voltage dividing switch tube PT92 inputs a first constant voltage low level VSS1.
  • the control end of the third voltage dividing switch tube PT93 is connected with the output end of the second voltage dividing switch tube PT92, and the output end of the third voltage dividing switch tube PT93 is connected with the output end of the second voltage dividing switch tube PT92, the third partial pressure
  • the input end of the switch tube PT93 is connected to the output end of the fourth voltage dividing switch tube PT94.
  • the control terminal of the fourth voltage dividing switch tube PT94 inputs the second constant voltage low level DCL, the input end of the fourth voltage dividing switch tube PT94 inputs the first constant voltage low level VSS1, and the output end of the third voltage dividing switch tube PT93
  • the first constant voltage high level DCH1 is output, and the output end of the fourth voltage dividing switch tube PT94 outputs a second constant voltage high level DCH2.
  • the voltage dividing circuit inputs a main constant voltage high level VGH, a first constant voltage low level VSS1 and a second constant voltage low level DCL, and outputs a first constant voltage high level DCH1 and a second constant voltage high level DCH2.
  • the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 can be controlled by adjusting the potential of the second constant voltage low level DCL. It is also possible to control the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 by adjusting the threshold voltages of the respective divided voltage switching tubes.
  • the first constant voltage high level DCH1 and the second constant voltage high are set.
  • Level DCH2 does not require the addition of a new control signal source.
  • FIG. 10 is a second schematic structural diagram of a voltage dividing circuit of the scan driving circuit of FIG. 8; the voltage dividing circuit includes a first voltage dividing switch tube PT101, a second voltage dividing switch tube PT102, and a third voltage dividing switch tube PT103, The four-divide pressure switch tube PT104, the fifth partial pressure switch tube PT105, the sixth partial pressure switch tube PT106, the seventh partial pressure switch tube PT107, and the eighth partial pressure switch tube PT108.
  • the input end of the first voltage dividing switch tube PT101 inputs the main constant voltage high level VGH
  • the control end of the first voltage dividing switch tube PT101 inputs the main constant voltage high level
  • the output terminal of the voltage dividing switch tube PT102 is connected.
  • the control end of the second voltage dividing switch tube PT102 is connected to the output end of the fourth voltage dividing switch tube PT104, and the input end of the second voltage dividing switch tube PT102 is input to the first constant voltage low level VSS1.
  • the input end of the third voltage dividing switch tube PT103 inputs the main constant voltage high level VGH, the control end of the third voltage dividing switch tube PT103 inputs the second constant voltage low level DCL, and the output end of the third voltage dividing switch tube PT103
  • the output end of the fourth voltage dividing switch tube PT104 is connected.
  • the control terminal of the fourth voltage dividing switch tube PT104 inputs a second constant voltage low level DCL, and the input end of the fourth voltage dividing switch tube PT104 inputs a second constant voltage low level DCL.
  • the control end of the fifth voltage dividing switch tube PT105 is connected to the output end of the second voltage dividing switch tube PT102, and the output end of the fifth voltage dividing switch tube PT105 is connected with the output end of the second voltage dividing switch tube PT102, the fifth partial pressure
  • the input end of the switch tube PT105 is connected to the output end of the sixth voltage dividing switch tube PT106.
  • the control end of the sixth voltage dividing switch tube PT106 is connected to the output end of the eighth voltage dividing switch tube PT108, and the input end of the sixth voltage dividing switch tube PT106 is input to the first constant voltage low level VSS1.
  • the output end of the seventh voltage dividing switch tube PT107 is connected with the output end of the second voltage dividing switch tube PT102, and the control end of the seventh voltage dividing switch tube PT107 is input with the second constant voltage low level DCL, and the seventh voltage dividing switch tube PT107 The input end is connected to the control end of the sixth voltage dividing switch tube PT106.
  • the control terminal of the eighth voltage dividing switch tube PT108 inputs a second constant voltage low level DCL, and the input end of the eighth voltage dividing switch tube PT108 inputs a second constant voltage low level DCL.
  • the output end of the fifth voltage dividing switch tube PT105 outputs a first constant voltage high level DCH1
  • the output end of the sixth voltage dividing switch tube PT106 outputs a second constant voltage high level DCH2.
  • the voltage dividing circuit inputs a main constant voltage high level VGH, a first constant voltage low level VSS1 and a second constant voltage low level DCL, and outputs a first constant voltage high level DCH1 and a second constant voltage high level DCH2.
  • the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 can be controlled by adjusting the potential of the second constant voltage low level DCL. It is also possible to control the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 by adjusting the threshold voltages of the respective divided voltage switching tubes.
  • the first constant voltage high level DCH1 and the second constant voltage high are set.
  • Level DCH2 does not require the addition of a new control signal source.
  • the adjustment accuracy of the voltage dividing circuit is higher than that of the voltage dividing circuit in FIG.
  • FIG. 11 is a third structural diagram of the voltage dividing circuit of the scan driving circuit of FIG. 8.
  • the voltage dividing circuit comprises a first partial pressure switching tube PT111, a second partial pressure switching tube PT112, a third partial pressure switching tube PT113, a fourth partial pressure switching tube PT114, a fifth partial pressure switching tube PT115, and a sixth partial pressure switch.
  • the input end of the first voltage dividing switch tube PT111 inputs the main constant voltage high level VGH, the control end of the first voltage dividing switch tube PT111 inputs the main constant voltage high voltage VGH, the output end of the first voltage dividing switch tube PT111 and the second The output terminal of the voltage dividing switch tube PT112 is connected.
  • the control terminal of the second voltage dividing switch tube PT112 is connected with the output end of the fourth voltage dividing switch tube PT114, and the input end of the second voltage dividing switch tube PT112 is input with the first constant voltage low level VSS1 voltage switch tube PT113 input terminal input main constant voltage
  • the high level, the third voltage dividing switch tube PT113 control terminal inputs the main constant voltage high level VGH, and the output end of the third voltage dividing switch tube PT113 is connected with the output end of the fourth voltage dividing switch tube PT113.
  • the control end of the fourth voltage dividing switch tube PT114 is connected to the output end of the third voltage dividing switch tube PT113, and the input end of the fourth voltage dividing switch tube PT114 is input to the second constant voltage low level DCL.
  • the control end of the fifth voltage dividing switch tube PT115 is connected to the output end of the second voltage dividing switch tube PT112, and the output end of the fifth voltage dividing switch tube PT115 is connected with the output end of the second voltage dividing switch tube PT112, the fifth partial pressure
  • the input end of the switch tube PT115 is connected to the output end of the sixth voltage dividing switch tube PT116.
  • the control end of the sixth voltage dividing switch tube PT116 is connected to the output end of the eighth voltage dividing switch tube PT118, and the input end of the sixth voltage dividing switch tube PT116 is input to the first constant voltage low level VSS1.
  • the output end of the seventh voltage dividing switch tube PT117 is connected to the output end of the second voltage dividing switch tube PT112, and the control end of the seventh voltage dividing switch tube PT117 is connected with the output end of the second voltage dividing switch tube PT112, and the seventh partial pressure
  • the input end of the switch tube PT117 is connected to the control end of the sixth voltage dividing switch tube PT116.
  • the control end of the eighth voltage dividing switch tube PT118 is connected with the control degree of the sixth voltage dividing switch tube PT116, and the input end of the eighth voltage dividing switch tube PT118 is input with the second constant voltage low level DCL.
  • the output end of the fifth voltage dividing switch tube PT115 outputs a first constant voltage high level DCH1, and the output end of the sixth voltage dividing switch tube outputs a second constant voltage high level DCH2.
  • the voltage dividing circuit inputs a main constant voltage high level VGH, a first constant voltage low level VSS1 and a second constant voltage low level DCL, and outputs a first constant voltage high level DCH1 and a second constant voltage high level DCH2.
  • the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 can be controlled by adjusting the potential of the second constant voltage low level DCL. It is also possible to control the output potentials of the first constant voltage high level DCH1 and the second constant voltage high level DCH2 by adjusting the threshold voltages of the respective divided voltage switching tubes.
  • the first constant voltage high level DCH1 and the second constant voltage high are set.
  • Level DCH2 does not require the addition of a new control signal source.
  • the adjustment accuracy of the voltage dividing circuit is higher than that of the voltage dividing circuit in FIG.
  • the scan driving circuit of the invention strengthens the control capability of the Q point potential by setting the first constant voltage high level and the second constant voltage high level, improves the reliability of the scan driving circuit, and solves the existing scan driving circuit. Technical problems with lower reliability.

Abstract

提供一种扫描驱动电路（20），用于对级联的扫描线（G（N））进行驱动操作，其包括上拉控制模块（201）、上拉模块（202）、下拉模块（203）、下拉维持模块（204）、下传模块（205）以及自举电容（206）。该扫描驱动电路（20）通过设置第一恒压高电平和第二恒压高电平，加强了对Q点电位的控制能力，提高扫描驱动电路（20）的可靠性。

Description

一种扫描驱动电路 技术领域
本发明涉及显示驱动领域，特别是涉及一种扫描驱动电路。
 背景技术
Gate Driver On Array，简称GOA，即在现有薄膜晶体管液晶显示器的阵列基板上制作扫描驱动电路，实现对扫描线逐行扫描的驱动方式。现有扫描驱动电路的结构示意图如图1所示，该扫描驱动电路10包括上拉控制模块101、上拉模块102、下传模块103、下拉模块104、自举电容105以及下拉维持模块106。
该扫描驱动电路在元件的阈值电压不匹配的情况下，可能会出现电路失效。这是由于下拉维持电路模块在元件的阈值电源不匹配的情况下，对Q点的电位控制能力减弱，导致Q点的电位无法正常抬升到高电位，从而导致该扫描驱动电路的可靠性较低。
故，有必要提供一种扫描驱动电路，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种可靠性较高的扫描驱动电路，以解决现有的扫描驱动电路的可靠性较低的技术问题。
 技术解决方案
本发明实施例提供一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号以及第一恒压高电平生成相应的所述扫描线的扫描电平信号；
上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
下拉模块，用于根据下两级的时钟信号，拉低相应的所述扫描线的扫描信号；
下拉维持模块，用于根据第二恒压高电平，维持相应的所述扫描线的扫描信号的低电平；
下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
自举电容，用于生成所述扫描线的扫描信号的高电平；
其中所述第一恒压高电平和所述第二恒压高电平由相应的液晶显示面板的驱动芯片分别生成，其中所述第一恒压高电平的电压大于所述第二恒压高电平的电压；
所述第二恒压高电平由所述第一恒压高电平进行分压操作后生成。
在本发明所述的扫描驱动电路中，所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述第一恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接；
所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号；
所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号；
所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输出端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输入端输入所述本级的扫描信号；
所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
所述第六开关管的控制端输入所述第二恒压高电平，所述第六开关管的输入端输入所述第二恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
所述第八开关管的输入端输入所述第二恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
所述第十开关管的输入端输入所述第二恒压高电平；
所述第十一开关管的输入端与第二恒压低电平连接；
所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述第二恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
所述第十四开关管的输入端与所述第一开关管的输出端连接；
所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管以及第二分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入所述第一恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端与所述第三开关管的输出端连接，所述第四分压开关管的输入端输入第二恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述第二恒压高电平和所述第一恒压高电平由主恒压高电平进行分压操作后生成；其中所述主恒压高电平用于生成高电平的时钟信号以及启动信号。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的控制端与所述第二分压开关管的输出端连接，所述第三分压开关管的输出端与所述第二分压开关管的输出端连接，所述第三分压开关管的输入端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第一恒压低电平；
所述第三分压开关管的输出端输出所述第一恒压高电平，所述第四分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端输入所述第二恒压低电平，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
所述第八分压开关管的控制端输入所述第二恒压低电平，所述第八分压开关管的输入端输入所述第二恒压低电平；
其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入所述主恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端与所述第三分压开关管的输出端连接，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端与所述第二分压开关管的输出端连接，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
所述第八分压开关管的控制端与所述第六分压开关管的控制度连接，所述第八分压开关管的输入端输入所述第二恒压低电平；
其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
本发明实施例还提供一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号以及第一恒压高电平生成相应的所述扫描线的扫描电平信号；
上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
下拉模块，用于根据下两级的时钟信号，拉低相应的所述扫描线的扫描信号；
下拉维持模块，用于根据第二恒压高电平，维持相应的所述扫描线的扫描信号的低电平；
下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
自举电容，用于生成所述扫描线的扫描信号的高电平。
在本发明所述的扫描驱动电路中，所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述第一恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接；
所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号；
所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号；
所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输入端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输出端输入所述本级的扫描信号；
所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
所述第六开关管的控制端输入所述第二恒压高电平，所述第六开关管的输入端输入所述第二恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
所述第八开关管的输入端输入所述第二恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
所述第十开关管的输入端输入所述第二恒压高电平；
所述第十一开关管的输入端与第二恒压低电平连接；
所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述第二恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
所述第十四开关管的输入端与所述第一开关管的输出端连接；
所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
在本发明所述的扫描驱动电路中，所述第一恒压高电平和所述第二恒压高电平由相应的液晶显示面板的驱动芯片分别生成，其中所述第一恒压高电平的电压大于所述第二恒压高电平的电压。
在本发明所述的扫描驱动电路中，所述第二恒压高电平由所述第一恒压高电平进行分压操作后生成。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管以及第二分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入所述第一恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端与所述第三开关管的输出端连接，所述第四分压开关管的输入端输入第二恒压低电平；
所述第一分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述第二恒压高电平和所述第一恒压高电平由主恒压高电平进行分压操作后生成；其中所述主恒压高电平用于生成高电平的时钟信号以及启动信号。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的控制端与所述第二分压开关管的输出端连接，所述第三分压开关管的输出端与所述第二分压开关管的输出端连接，所述第三分压开关管的输入端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第一恒压低电平；
所述第三分压开关管的输出端输出所述第一恒压高电平，所述第四分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端输入所述第二恒压低电平，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
所述第八分压开关管的控制端输入所述第二恒压低电平，所述第八分压开关管的输入端输入所述第二恒压低电平；
其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
在本发明所述的扫描驱动电路中，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入所述主恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
所述第四分压开关管的控制端与所述第三分压开关管的输出端连接，所述第四分压开关管的输入端输入所述第二恒压低电平；
所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端与所述第二分压开关管的输出端连接，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
所述第八分压开关管的控制端与所述第六分压开关管的控制端连接，所述第八分压开关管的输入端输入所述第二恒压低电平；
其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
 有益效果
相较于现有的扫描驱动电路，本发明的扫描驱动电路通过设置第一恒压高电平和第二恒压高电平，加强了对Q点电位的控制能力，提高扫描驱动电路的可靠性；解决了现有的扫描驱动电路的可靠性较低的技术问题。
 附图说明
图1为一种现有的扫描驱动电路的结构示意图；
图2为本发明的扫描驱动电路的优选实施例的结构示意图；
图3为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之一；
图4为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之二；
图5为图4中的扫描驱动电路的分压电路的结构示意图之一；
图6为图4中的扫描驱动电路的分压电路的结构示意图之二；
图7为图4中的扫描驱动电路的分压电路的结构示意图之三；
图8为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之三；
图9为图8中的扫描驱动电路的分压电路的结构示意图之一；
图10为图8中的扫描驱动电路的分压电路的结构示意图之二；
图11为图8中的扫描驱动电路的分压电路的结构示意图之三。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在图中，结构相似的单元是以相同标号表示。
请参照图2，图2为本发明的扫描驱动电路的第一优选实施例的结构示意图。本优选实施例的扫描驱动电路20包括上拉控制模块201、上拉模块202、下拉模块203、下拉维持模块204、下传模块205以及自举电容206。上拉控制模块201用于接收上一级的下传信号ST(N-1)，并根据上一级的下传信号ST(N-1)以及第一恒压高电平DCH1生成相应的扫描线的扫描电平信号Q(N)；上拉模块202用于根据扫描电平信号Q(N)以及本级的时钟信号CK(N)，拉升相应的扫描线的扫描信号G(N)；下拉模块203用于根据下两级的时钟信号CK(N+2)，拉低相应的扫描线的扫描信号G(N)；下拉维持模块204用于根据第二恒压高电平DCH2维持相应的扫描线的扫描信号G(N)的低电平；下传模块205用于向下一级的上拉控制模块发送本级的下传信号ST(N)；自举电容206用于生成扫描线的扫描信号G(N)的高电平。
其中上拉控制模块201包括第一开关管T1，第一开关管T1的控制端输入上一级的下传信号ST(N-1)，第一开关管T11的输入端输入第一恒压高电平DCH1，第一开关管T11的输出端分别与上拉模块202、下拉模块203、下拉维持模块204、下传模块205以及自举电容206连接。
上拉模块202包括第二开关管T2，第二开关管T2的控制端与上拉控制模块的第一开关管T1的输出端连接，第二开关管T2的输入端输入本级的时钟信号CK(N)，第二开关管T2的输出端输出本级的扫描信号G(N)。
下传模块205包括第三开关管T3，第三开关管T3的控制端与上拉控制模块201的第一开关管T1的输出端连接，第三开关管T22的输入端输入本级的时钟信号CK(N)，第三开关管T22的输出端输出本级的下传信号ST(N)。
下拉模块203包括第四开关管T4以及第五开关管T5，第四开关管T4的控制端与上拉控制模块201的第一开关管T1的输出端连接，第四开关管T4的输入端与上拉控制模块201的第一开关管T5的输出端连接，第四开关管T4的输出端与第五开关管T5的输入端连接，第五开关管T4的控制端输入下两级的时钟信号CK(N+2)，第五开关管T5的输入端输入本级的扫描信号G(N)。
下拉维持模块204包括第六开关管T6、第七开关管T7、第八开关管T8、第九开关管T9、第十开关管T10、第十一开关管T11、第十二开关管T12、第十三开关管T13、第十四开关管T14以及第十五开关管T15。
第六开关管T6的控制端输入第二恒压高电平DCH2，第六开关管T6的输入端输入第二恒压高电平DCH2，第六开关管T6的输出端分别与第七开关管T7的输出端、第八开关管T8的控制端以及第十开关管T10的控制端连接。
第七开关管T7的控制端分别与第一开关管T1的输出端以及第十一开关管T11的控制端连接，第七开关管T7的输入端与第一恒压低电平VSS1连接.
第八开关管T8的输入端输入第二恒压高电平DCH2，第八开关管T8的输出端分别与第九开关管T9的输出端、第十四开关管T14的控制端以及第十五开关管T15的控制端连接。
第九开关管T9的控制端与第一开关管T1的输出端连接，第九开关管T9的输入端分别与第十开关管T10的输出端以及第十一开关管T11的输出端连接。
第十开关管T10的输入端输入第二恒压高电平DCH2；第十一开关管T11的输入端与第二恒压低电平DCL连接。
第十二开关管T12的控制端与第一开关管T1的输出端连接，第十二开关管T12的输入端输入第二恒压高电平DCH2，第十二开关管T12的输出端分别与第十三开关管T13的输出端以及第十四开关管T14的输出端连接。
第十三开关管T13的控制端与第十五开关管T15的控制端连接，第十三开关管T13的输入端与第二恒压低点平DCL连接。
第十四开关管T14的输入端与第一开关管T1的输出端连接。
第十五开关管T15的输入端与第一恒压低电平VSS1连接，第十五开关管T15的输出端与上拉模块202的第二开关管T2的输出端连接。
自举电容206设置在第一开关管T1的输出端以及上拉模块202的第二开关管T2的输出端之间。
本优选实施例的扫描驱动电路20使用时，当上一级的下传信号ST(N-1)为高电平时，第一开关管T1导通，第一恒压高电平DCH1通过第一开关管T1给自举电容206充电，使得参考点Q(N)上升到一较高的电平。随后上一级的下传信号ST(N-1)转为低电平，第一开关管T1断开，参考点Q(N)通过自举电容206维持一较高的电平，并且第二开关管T2和第三开关管T3导通。
随后本级的时钟信号CK(N)转为高电平，时钟信号CK(n)通过第二开关管T2继续给自举电容206充电，使得参考点Q(N)达到一更高的电平，本级的扫描信号G(N)以及本级的下传信号ST(N)也转为高电平。
此时参考点Q(N)为高电平状态，由于第一开关管T1的输入端与第一恒压高电平DCH1连接，因此参考点Q(N)不会通过第一开关管T1产生漏电现象。
同时由于第七开关管T7、第九开关管T9、第十一开关管T11以及第十二开关管T12导通，参考点P(N)为低电平状态，从而第十四开关管T14为断开状态，第二恒压高电平DCH2通过第十二开关管T12与第十四开关管T14的输出端连接，因此参考点Q(N)也不会通过第十四开关管T14产生漏电现象。
同时第五开关管T5为断开状态，但是第五开关管T5的输出端输入本级的扫描信号G(N)，该本级的扫描信号G(N)此时为一高电平状态，因此参考点Q(N)也不会通过第五开关管T5产生漏电现象。
综上所述，本优选实施例的扫描驱动电路20在高电平状态时，不会通过第一开关管T1、第十四开关管T14、第五开关管T5产生漏电现象，提升了扫描驱动电路20的可靠性。
当下两级的时钟信号CK(n+2)为高电平时，第五开关管T5导通，参考点Q(N)通过下拉模块203进行放电。并且由于第七开关管T7断开，参考点P(N)在第六开关管T6和第八开关管T8的作用下转为高电平，这时第十三开关管T13和第十四开关管T14导通，参考点Q(N)通过第十四开关管T14、第十三开关管T13与第二恒压低电平DCL连接，这样保证了参考点Q(N)的低电位，对低电平的本级的扫描信号G(N)起到了维持作用。同时当参考点Q(N)转为低电平之后，第四开关管T4断开，以保持参考点Q(N)的低电位。
为了便于对驱动电路进行解析，优选设置第一恒压低电平VSS1大于第二恒压低电平DCL，以便于对扫描驱动电路20中的各部件进行分开独立控制，第一恒压低电平VSS1和第二恒压低电平DCL的具体数值可根据实际情况进行设定。
同时设置第一恒压高电平DCH1的电压大于第二恒压高电平DCH2的电压，这样上拉控制模块201和下拉维持模块204由不同的恒压高电平源进行驱动，可较好的避免上拉控制模块201中的元件和下拉维持模块204之间的元件不匹配造成的对恒压高电平的影响，从而保证了对Q点的电位控制能力，提高了扫描驱动电路20的可靠性。
本发明的扫描驱动电路通过独立设置第一恒压高电平和第二恒压高电平，加强了对Q点电位的控制能力，提高扫描驱动电路的可靠性。
下面详细说明如何设置独立的第一恒压高电平和第二恒压高电平。请参照图3，图3为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之一。该液晶显示面板包括设置在印刷电路板上的驱动芯片31、柔性连接板32以及阵列基板33。阵列基板33上设置有多个级联的扫描驱动电路20，以对级联的扫描线进行驱动操作。其中用于阵列基板33上的扫描驱动电路20的第一恒压高点平DCH1和第二恒压高电平DCH2由驱动芯片31分别生成，通过柔性连接板32传输到阵列基板33的扫描驱动电路20上。
在本优选实施例中第一恒压高电平DCH1和第二恒压高电平DCH2由驱动芯片31分别生成，且第一恒压高电平DCH1的电压大于第二恒压高电平DCH2的电压。
请参照图4，图4为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之二。该液晶显示面板同样包括设置在印刷电路板上的驱动芯片31、柔性连接板32以及阵列基板43。但是该阵列基板43上还包括用于对第一恒压高电平DCH1进行分压操作的分压电路41，这样第二恒压高电平DCH2可通过对第一恒压高电平DCH1进行分压操作生成。
请参照图5，图5为图4中的扫描驱动电路的分压电路的结构示意图之一。该分压电路包括第一分压开关管PT51以及第二分压开关管PT52。
第一分压开关管PT51的输入端输入第一恒压高电平DCH1，第一分压开关管PT51的控制端输入第一恒压高电平DCH1，第一分压开关管PT51的输出端与第二分压开关管PT52的输出端连接。第二分压开关管PT52的控制端输入第二恒压低电平DCL，第二分压开关管PT52的输入端输入第一恒压低电平VSS1。第一分压开关管PT51的输出端输出第二恒压高电平DCH2。
该分压电路输入第一恒压高电平DCH1、第一恒压低电平VSS1和第二恒压低电平DCL，输出第二恒压高电平DCH2。这样可通过调整第二恒压低电平DCL的电位来控制第二恒压高电平DCH2的输出电位。第二恒压低电平DCL的电位越高，第二恒压高电平DCH2的输出电位就越低，反之亦然。
图6为图4中的扫描驱动电路的分压电路的结构示意图之二。该分压电路包括第一分压开关管PT61、第二分压开关管PT62、第三分压开关管PT63以及第四分压开关管PT64。
第一分压开关管PT61的输入端输入第一恒压高电平DCH1，第一分压开关管PT61的控制端输入第一恒压高电平DCH1，第一分压开关管PT61的输出端与第二分压开关管PT62的输出端连接。第二分压开关管PT62的控制端与第四分压开关管PT64的输出端连接，第二分压开关管PT62的输入端输入第一恒压低电平VSS1。第三分压开关管PT63的输入端输入第一恒压高电平DCH1，第三分压开关管PT63的控制端输入第二恒压低电平DCL，第三分压开关管PT63的输出端与第四分压开关管PT64的输出端连接。第四分压开关管PT64的控制端输入第二恒压低电平DCL，第四分压开关管PT64的输入端输入第二恒压低电平DCL。第一分压开关管PT61的输出端输出第二恒压高电平DCL。
该分压电路输入第一恒压高电平DCH1、第一恒压低电平VSS1和第二恒压低电平DCL，输出第二恒压高电平DCH2。这样同样可通过调整第二恒压低电平DCL的电位来控制第二恒压高电平DCH2的输出电位。第二恒压低电平DCL的电位越高，第二恒压高电平DCH2的输出电位就越低，反之亦然。该分压电路的调整精度较图5中的分压电路的调整精度更高。
图7为图4中的扫描驱动电路的分压电路的结构示意图之三；该分压电路包括第一分压开关管PT71、第二分压开关管PT72、第三分压开关管PT73以及第四分压开关管PT74。
第一分压开关管PT71的输入端输入第一恒压高电平DCH1，第一分压开关管PT71的控制端输入第一恒压高电平DCH1，第一分压开关管PT71的输出端与第二分压开关管PT72的输出端连接。第二分压开关管PT72的控制端与第四分压开关管PT74的输出端连接，第二分压开关管PT72的输入端输入第一恒压低电平VSS1。第三分压开关管PT73的输入端输入第一恒压高电平DCH1，第三分压开关管PT73的控制端输入第一恒压低电平VSS1，第三分压开关管PT73的输出端与第四分压开关管PT74的输出端连接。第四分压开关管第四分压开关管PT74的控制端与第三分压开关管PT3的输出端连接，第四分压开关管PT74的输入端输入第二恒压低电平DCL。第一分压开关管PT71的输出端输出第二恒压高电平DCH2。
该分压电路输入第一恒压高电平DCH1、第一恒压低电平VSS1和第二恒压低电平DCL，输出第二恒压高电平DCH2。这样同样可通过调整第二恒压低电平DCL的电位来控制第二恒压高电平DCH2的输出电位。第二恒压低电平DCL的电位越高，第二恒压高电平DCH2的输出电位就越低，反之亦然。该分压电路的调整精度较图5中的分压电路的调整精度更高。
图8为本发明的扫描驱动电路的优选实施例的所在液晶显示面板的结构示意图之三；该液晶显示面板同样包括设置在印刷电路板上的驱动芯片31、柔性连接板32以及阵列基板83。但是该阵列基板上还包括用于对主恒压高电平VGH进行分压操作的分压电路81，其中主恒压高电平VGH用于生成高电平的时钟信号以及启动信号。这样第二恒压高定平电平DCH2和第一恒压高电平DCH1可由主恒压高电平VGH分压操作生成。主恒压高电平VGH的电压大于第一恒压高电平DCH1的电压，第一恒压高电平DCH1的电压大于第二恒压高电平DCH2的电压。由于主恒压高电平VGH是一个固有的高电平，因此这样就不需要设置另外的独立的第一恒压高电平DCH1。
图9为图8中的扫描驱动电路的分压电路的结构示意图之一；该分压电路包括第一分压开关管PT91、第二分压开关管PT92、第三分压开关管PT93以及第四分压开关管PT94。
第一分压开关管PT91的输入端输入主恒压高电平VGH，第一分压开关管PT91的控制端输入主恒压高电平VGH，第一分压开关管PT91的输出端与第二分压开关管PT92的输出端连接。第二分压开关管PT92的控制端输入第二恒压低电平DCL，第二分压开关管PT92的输入端输入第一恒压低电平VSS1。第三分压开关管PT93的控制端与第二分压开关管的PT92输出端连接，第三分压开关管PT93的输出端与第二分压开关管PT92的输出端连接，第三分压开关管PT93的输入端与第四分压开关管PT94的输出端连接。第四分压开关管PT94的控制端输入第二恒压低电平DCL，第四分压开关管PT94的输入端输入第一恒压低电平VSS1，第三分压开关管PT93的输出端输出第一恒压高电平DCH1，第四分压开关管PT94的输出端输出第二恒压高电平DCH2。
该分压电路输入主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL，输出第一恒压高电平DCH1和第二恒压高电平DCH2。这样可通过调整第二恒压低电平DCL的电位来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。也可以通过调整各个分压开关管的阈值电压来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。由于主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL均为固有的控制信号源，因此设置第一恒压高电平DCH1和第二恒压高电平DCH2不需要增加新的控制信号源。
图10为图8中的扫描驱动电路的分压电路的结构示意图之二；该分压电路包括第一分压开关管PT101、第二分压开关管PT102、第三分压开关管PT103、第四分压开关管PT104、第五分压开关管PT105、第六分压开关管PT106、第七分压开关管PT107以及第八分压开关管PT108。
第一分压开关管PT101的输入端输入主恒压高电平VGH，第一分压开关管PT101的控制端输入主恒压高电平，第一分压开关管PT101的输出端与第二分压开关管PT102的输出端连接。第二分压开关管PT102的控制端与第四分压开关管PT104的输出端连接，第二分压开关管PT102的输入端输入第一恒压低电平VSS1。第三分压开关管PT103的输入端输入主恒压高电平VGH，第三分压开关管PT103的控制端输入第二恒压低电平DCL，第三分压开关管PT103的输出端与第四分压开关管PT104的输出端连接。第四分压开关管PT104的控制端输入第二恒压低电平DCL，第四分压开关管PT104的输入端输入第二恒压低电平DCL。第五分压开关管PT105的控制端与第二分压开关管PT102的输出端连接，第五分压开关管PT105的输出端与第二分压开关管PT102的输出端连接，第五分压开关管PT105的输入端与第六分压开关管PT106的输出端连接。第六分压开关管PT106的控制端与第八分压开关管PT108的输出端连接，第六分压开关管PT106的输入端输入第一恒压低电平VSS1。第七分压开关管PT107的输出端与第二分压开关管PT102的输出端连接，第七分压开关管PT107的控制端输入第二恒压低电平DCL，第七分压开关管PT107的输入端与第六分压开关管PT106的控制端连接。第八分压开关管PT108的控制端输入第二恒压低电平DCL，第八分压开关管PT108的输入端输入第二恒压低电平DCL。第五分压开关管PT105的输出端输出第一恒压高电平DCH1，第六分压开关管PT106的输出端输出第二恒压高电平DCH2。
该分压电路输入主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL，输出第一恒压高电平DCH1和第二恒压高电平DCH2。这样同样可通过调整第二恒压低电平DCL的电位来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。也可以通过调整各个分压开关管的阈值电压来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。由于主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL均为固有的控制信号源，因此设置第一恒压高电平DCH1和第二恒压高电平DCH2不需要增加新的控制信号源。该分压电路的调整精度较图9中的分压电路的调整精度更高。
图11为图8中的扫描驱动电路的分压电路的结构示意图之三。该分压电路包括第一分压开关管PT111、第二分压开关管PT112、第三分压开关管PT113、第四分压开关管PT114、第五分压开关管PT115、第六分压开关管PT116、第七分压开关管PT117以及第八分压开关管PT118。
第一分压开关管PT111的输入端输入主恒压高电平VGH，第一分压开关管PT111的控制端输入主恒压高电VGH，第一分压开关管的输出端PT111与第二分压开关管PT112的输出端连接。第二分压开关管PT112控制端与第四分压开关管PT114输出端连接，第二分压开关管PT112的输入端输入第一恒压低电平VSS1压开关管PT113输入端输入主恒压高电平，第三分压开关管PT113控制端输入主恒压高电平VGH，第三分压开关管PT113的输出端与第四分压开关管PT113的输出端连接。第四分压开关管PT114的控制端与第三分压开关管PT113的输出端连接，第四分压开关管PT114的输入端输入第二恒压低电平DCL。第五分压开关管PT115的控制端与第二分压开关管PT112的输出端连接，第五分压开关管PT115的输出端与第二分压开关管PT112的输出端连接，第五分压开关管PT115的输入端与第六分压开关管PT116的输出端连接。第六分压开关管PT116的控制端与第八分压开关管PT118的输出端连接，第六分压开关管PT116的输入端输入第一恒压低电平VSS1。第七分压开关管PT117的输出端与第二分压开关管PT112的输出端连接，第七分压开关管PT117的控制端与第二分压开关管PT112的输出端连接，第七分压开关管PT117的输入端与第六分压开关管PT116的控制端连接。第八分压开关管PT118的控制端与第六分压开关管PT116的控制度连接，第八分压开关管PT118的输入端输入第二恒压低电平DCL。第五分压开关管PT115的输出端输出第一恒压高电平DCH1，第六分压开关管的输出端输出第二恒压高电平DCH2。
该分压电路输入主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL，输出第一恒压高电平DCH1和第二恒压高电平DCH2。这样同样可通过调整第二恒压低电平DCL的电位来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。也可以通过调整各个分压开关管的阈值电压来控制第一恒压高电平DCH1和第二恒压高电平DCH2的输出电位。由于主恒压高电平VGH、第一恒压低电平VSS1和第二恒压低电平DCL均为固有的控制信号源，因此设置第一恒压高电平DCH1和第二恒压高电平DCH2不需要增加新的控制信号源。该分压电路的调整精度较图9中的分压电路的调整精度更高。
本发明的扫描驱动电路通过设置第一恒压高电平和第二恒压高电平，加强了对Q点电位的控制能力，提高扫描驱动电路的可靠性；解决了现有的扫描驱动电路的可靠性较低的技术问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
    上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号以及第一恒压高电平生成相应的所述扫描线的扫描电平信号；
    上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
    下拉模块，用于根据下两级的时钟信号，拉低相应的所述扫描线的扫描信号；
    下拉维持模块，用于根据第二恒压高电平，维持相应的所述扫描线的扫描信号的低电平；
    下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
    自举电容，用于生成所述扫描线的扫描信号的高电平；
    其中所述第一恒压高电平和所述第二恒压高电平由相应的液晶显示面板的驱动芯片分别生成，其中所述第一恒压高电平的电压大于所述第二恒压高电平的电压；
    所述第二恒压高电平由所述第一恒压高电平进行分压操作后生成。
  2. 根据权利要求1所述的扫描驱动电路，其中所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述第一恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接；
    所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号；
    所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号；
    所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输出端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输入端输入所述本级的扫描信号；
    所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
    所述第六开关管的控制端输入所述第二恒压高电平，所述第六开关管的输入端输入所述第二恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
    所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
    所述第八开关管的输入端输入所述第二恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
    所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
    所述第十开关管的输入端输入所述第二恒压高电平；
    所述第十一开关管的输入端与第二恒压低电平连接；
    所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述第二恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
    所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
    所述第十四开关管的输入端与所述第一开关管的输出端连接；
    所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
  3. 根据权利要求1所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管以及第二分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  4. 根据权利要求1所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  5. 根据权利要求1所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入所述第一恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端与所述第三开关管的输出端连接，所述第四分压开关管的输入端输入第二恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  6. 根据权利要求1所述的扫描驱动电路，其中所述第二恒压高电平和所述第一恒压高电平由主恒压高电平进行分压操作后生成；其中所述主恒压高电平用于生成高电平的时钟信号以及启动信号。
  7. 根据权利要求6所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的控制端与所述第二分压开关管的输出端连接，所述第三分压开关管的输出端与所述第二分压开关管的输出端连接，所述第三分压开关管的输入端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第一恒压低电平；
    所述第三分压开关管的输出端输出所述第一恒压高电平，所述第四分压开关管的输出端输出所述第二恒压高电平。
  8. 根据权利要求6所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
    所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
    所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端输入所述第二恒压低电平，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
    所述第八分压开关管的控制端输入所述第二恒压低电平，所述第八分压开关管的输入端输入所述第二恒压低电平；
    其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
  9. 根据权利要求6所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入所述主恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端与所述第三分压开关管的输出端连接，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
    所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
    所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端与所述第二分压开关管的输出端连接，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
    所述第八分压开关管的控制端与所述第六分压开关管的控制度连接，所述第八分压开关管的输入端输入所述第二恒压低电平；
    其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
  10. 一种扫描驱动电路，用于对级联的扫描线进行驱动操作，其包括：
    上拉控制模块，用于接收上一级的下传信号，并根据所述上一级的下传信号以及第一恒压高电平生成相应的所述扫描线的扫描电平信号；
    上拉模块，用于根据所述扫描电平信号以及本级的时钟信号，拉升相应的所述扫描线的扫描信号；
    下拉模块，用于根据下两级的时钟信号，拉低相应的所述扫描线的扫描信号；
    下拉维持模块，用于根据第二恒压高电平，维持相应的所述扫描线的扫描信号的低电平；
    下传模块，用于向下一级的上拉控制模块发送本级的下传信号；以及
    自举电容，用于生成所述扫描线的扫描信号的高电平。
  11. 根据权利要求10所述的扫描驱动电路，其中所述上拉控制模块包括第一开关管，所述第一开关管的控制端输入所述上一级的下传信号，所述第一开关管的输入端输入所述第一恒压高电平，所述第一开关管的输出端分别与所述上拉模块、所述下拉模块、所述下拉维持模块、所述下传模块以及所述自举电容连接；
    所述上拉模块包括第二开关管，所述第二开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第二开关管的输入端输入所述本级的时钟信号，所述第二开关管的输出端输出本级的扫描信号；
    所述下传模块包括第三开关管，所述第三开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第三开关管的输入端输入所述本级的时钟信号，所述第三开关管的输出端输出所述本级的下传信号；
    所述下拉模块包括第四开关管以及第五开关管，所述第四开关管的控制端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输入端与所述上拉控制模块的第一开关管的输出端连接，所述第四开关管的输出端与所述第五开关管的输出端连接，所述第五开关管的控制端输入所述下两级的时钟信号，所述第五开关管的输入端输入所述本级的扫描信号；
    所述下拉维持模块包括第六开关管、第七开关管、第八开关管、第九开关管、第十开关管、第十一开关管、第十二开关管、第十三开关管、第十四开关管以及第十五开关管；
    所述第六开关管的控制端输入所述第二恒压高电平，所述第六开关管的输入端输入所述第二恒压高电平，所述第六开关管的输出端分别与所述第七开关管的输出端、所述第八开关管的控制端以及第十开关管的控制端连接；
    所述第七开关管的控制端分别与所述第一开关管的输出端以及所述第十一开关管的控制端连接，所述第七开关管的输入端与第一恒压低电平连接；
    所述第八开关管的输入端输入所述第二恒压高电平，所述第八开关管的输出端分别与所述第九开关管的输出端、所述第十四开关管的控制端以及所述第十五开关管的控制端连接；
    所述第九开关管的控制端与所述第一开关管的输出端连接，所述第九开关管的输入端分别与所述第十开关管的输出端以及所述第十一开关管的输出端连接；
    所述第十开关管的输入端输入所述第二恒压高电平；
    所述第十一开关管的输入端与第二恒压低电平连接；
    所述第十二开关管的控制端与所述第一开关管的输出端连接，所述第十二开关管的输入端输入所述第二恒压高电平，所述第十二开关管的输出端分别与所述第十三开关管的输出端以及所述第十四开关管的输出端连接；
    所述第十三开关管的控制端与所述第十五开关管的控制端连接，所述第十三开关管的输入端与所述第二恒压低电平连接；
    所述第十四开关管的输入端与所述第一开关管的输出端连接；
    所述第十五开关管的输入端与所述第一恒压低电平连接，所述第十五开关管的输出端与所述上拉模块的第二开关管的输出端连接。
  12. 根据权利要求10所述的扫描驱动电路，其中所述第一恒压高电平和所述第二恒压高电平由相应的液晶显示面板的驱动芯片分别生成，其中所述第一恒压高电平的电压大于所述第二恒压高电平的电压。
  13. 根据权利要求10所述的扫描驱动电路，其中所述第二恒压高电平由所述第一恒压高电平进行分压操作后生成。
  14. 根据权利要求13所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管以及第二分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  15. 根据权利要求13所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  16. 根据权利要求13所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述第一恒压高电平，所述第一分压开关管的控制端输入所述第一恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述第一恒压高电平，所述第三分压开关管的控制端输入所述第一恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端与所述第三开关管的输出端连接，所述第四分压开关管的输入端输入第二恒压低电平；
    所述第一分压开关管的输出端输出所述第二恒压高电平。
  17. 根据权利要求10所述的扫描驱动电路，其中所述第二恒压高电平和所述第一恒压高电平由主恒压高电平进行分压操作后生成；其中所述主恒压高电平用于生成高电平的时钟信号以及启动信号。
  18. 根据权利要求17所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以及第四分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端输入第二恒压低电平，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的控制端与所述第二分压开关管的输出端连接，所述第三分压开关管的输出端与所述第二分压开关管的输出端连接，所述第三分压开关管的输入端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第一恒压低电平；
    所述第三分压开关管的输出端输出所述第一恒压高电平，所述第四分压开关管的输出端输出所述第二恒压高电平。
  19. 根据权利要求17所述的扫描驱动电路，其中所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入第二恒压低电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端输入所述第二恒压低电平，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
    所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
    所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端输入所述第二恒压低电平，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
    所述第八分压开关管的控制端输入所述第二恒压低电平，所述第八分压开关管的输入端输入所述第二恒压低电平；
    其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
  20. 根据权利要求17所述的扫描驱动电路，其特征在于，所述扫描驱动电路还包括用于进行所述分压操作的分压电路；
    所述分压电路包括第一分压开关管、第二分压开关管、第三分压开关管以、第四分压开关管、第五分压开关管、第六分压开关管、第七分压开关管以及第八分压开关管；
    所述第一分压开关管的输入端输入所述主恒压高电平，所述第一分压开关管的控制端输入所述主恒压高电平，所述第一分压开关管的输出端与所述第二分压开关管的输出端连接；
    所述第二分压开关管的控制端与所述第四分压开关管的输出端连接，所述第二分压开关管的输入端输入第一恒压低电平；
    所述第三分压开关管的输入端输入所述主恒压高电平，所述第三分压开关管的控制端输入所述主恒压高电平，所述第三分压开关管的输出端与所述第四分压开关管的输出端连接；
    所述第四分压开关管的控制端与所述第三分压开关管的输出端连接，所述第四分压开关管的输入端输入所述第二恒压低电平；
    所述第五分压开关管的控制端与所述第二分压开关管的输出端连接，所述第五分压开关管的输出端与所述第二分压开关管的输出端连接，所述第五分压开关管的输入端与所述第六分压开关管的输出端连接；
    所述第六分压开关管的控制端与所述第八分压开关管的输出端连接，所述第六分压开关管的输入端输入所述第一恒压低电平；
    所述第七分压开关管的输出端与所述第二分压开关管的输出端连接，所述第七分压开关管的控制端与所述第二分压开关管的输出端连接，所述第七分压开关管的输入端与所述第六分压开关管的控制端连接；
    所述第八分压开关管的控制端与所述第六分压开关管的控制度连接，所述第八分压开关管的输入端输入所述第二恒压低电平；
    其中所述第五分压开关管的输出端输出所述第一恒压高电平，所述第六分压开关管的输出端输出所述第二恒压高电平。
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