WO2015178296A1 - 電力用半導体装置 - Google Patents

電力用半導体装置 Download PDF

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Publication number
WO2015178296A1
WO2015178296A1 PCT/JP2015/063993 JP2015063993W WO2015178296A1 WO 2015178296 A1 WO2015178296 A1 WO 2015178296A1 JP 2015063993 W JP2015063993 W JP 2015063993W WO 2015178296 A1 WO2015178296 A1 WO 2015178296A1
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WIPO (PCT)
Prior art keywords
power semiconductor
lead terminal
semiconductor device
ceramic substrate
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2015/063993
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English (en)
French (fr)
Japanese (ja)
Inventor
藤野　純司
三紀夫 石原
雅芳 新飼
啓行 原田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2016521067A priority Critical patent/JP6316412B2/ja
Priority to DE112015002348.8T priority patent/DE112015002348T5/de
Priority to CN201580013957.2A priority patent/CN106104779B/zh
Priority to US15/124,489 priority patent/US10658284B2/en
Publication of WO2015178296A1 publication Critical patent/WO2015178296A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
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    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
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    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
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    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
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    • H10W90/763—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between laterally-adjacent chips

Definitions

  • the present invention relates to a power semiconductor device, and more particularly to a configuration using a lead terminal for electrical connection with a main electrode of a power semiconductor element.
  • Power semiconductor devices are spreading in all kinds of products from industrial equipment to home appliances and information terminals, and power semiconductor devices mounted on home appliances have high productivity and high reliability that can be used in various types as well as being smaller and lighter. Desired.
  • the package form be applicable to a silicon carbide (SiC) semiconductor that is likely to become the mainstream in the future because of its high operating temperature and excellent efficiency.
  • a ceramic substrate with excellent thermal conductivity is often used as an insulating substrate in order to handle a high voltage and a large current and generate a large amount of heat and efficiently exhaust heat. Further, with the increase in the density of the power semiconductor element described above, a technique of directly soldering the copper electrode plate to the main electrode of the power semiconductor element is being used in order to form a circuit with a high current density.
  • the sealing body is configured so that materials with different physical properties are properly used depending on the region, such as sealing the periphery of the joint between the copper electrode plate and the semiconductor element with a flexible urethane resin and then sealing the whole with an epoxy resin. Attempts have been made to reduce stress and the like (for example, see Patent Document 1).
  • JP 2006-351737 paragraphs 0020 to 0027, FIG. 1
  • the present invention has been made to solve the above-described problems, and an object thereof is to obtain a highly reliable power semiconductor device corresponding to a large current.
  • the power semiconductor device of the present invention includes a circuit board, a power semiconductor element having an electrode formed on one surface and the other surface bonded to the circuit substrate, one end side bonded to the electrode, and the other end electrically connected to the outside.
  • An inclined surface is formed so as to move away from the circuit board toward the portion.
  • the power semiconductor device of the present invention since the inclined surface away from the circuit board is formed at the end portion of the lead terminal, the stress concentration on the boundary portion with the end portion is suppressed, and the reliability corresponding to the large current is achieved. A high power semiconductor device can be obtained.
  • 2A and 2B are a plan view and a cross-sectional view for explaining the configuration of the power semiconductor device according to the first embodiment of the present invention. It is sectional drawing for every process for demonstrating the manufacturing method of the semiconductor device for electric power concerning Embodiment 1 of this invention. It is a fragmentary sectional view showing the displacement of the portion near the end of each lead terminal of a conventional example and an example for explaining the operation effect in the power semiconductor device according to the first exemplary embodiment of the present invention. It is a fragmentary sectional view of the end of a lead terminal for explaining the composition of the power semiconductor device concerning the modification of Embodiment 1 of the present invention. It is sectional drawing for demonstrating the structure of the semiconductor device for electric power concerning the modification of Embodiment 1 of this invention. It is sectional drawing for demonstrating the structure of the semiconductor device for electric power concerning Embodiment 2 of this invention.
  • FIG. FIGS. 1 to 3 are diagrams for explaining the configuration of the power semiconductor device and the manufacturing method thereof according to the first embodiment of the present invention.
  • FIG. 1 (a) shows the sealing resin from the power semiconductor device.
  • FIG. 1B is a cross-sectional view corresponding to the line AA in FIG. 1A.
  • FIG. 2 is a cross-sectional view for each step corresponding to FIG. 1B for explaining the method of manufacturing the power semiconductor device, and
  • FIG. It is a fragmentary sectional view which shows the displacement with respect to the power semiconductor element of the edge part of a lead terminal at the time.
  • FIG. 4 is a partial cross-sectional view of the end portion of the lead terminal for explaining a configuration in which the shape of the end portion of the lead terminal is changed as a first modification.
  • FIG. 5 is a cross-sectional view for explaining a configuration in which the form of the sealing body is changed as a second modified example, and corresponds to the AA line in FIG.
  • the feature of the power semiconductor device according to the first embodiment is the shape of the end of the lead terminal joined to the main electrode of the element.
  • a power semiconductor element 3 (simply referred to as “element”) is formed by solder 4 on a conductive layer 2a of a ceramic substrate 2 as a circuit board. Yes) is die-bonded (joined).
  • the ceramic substrate 2 has copper conductive layers 2a and 2b each having a thickness of 0.4 mm formed on both sides of a ceramic base 2i made of aluminum nitride (AlN) having a size of 40 mm ⁇ 25 mm ⁇ thickness 0.635 mm.
  • the power semiconductor element 3 is an element using SiC which is a wide band gap semiconductor material.
  • an IGBT (Insulated Gate Bipolar Transistor) 3S having a rectangular plate shape with a thickness of 0.25 mm and a 15 mm square is used.
  • a diode 3R having a rectangular plate shape with a thickness of 0.25 mm and 15 mm ⁇ 15 mm was used.
  • one end of the lead terminal 62 which is a feature of the present invention, is joined to the main electrodes (3a, 3e) on the front side including the emitter electrode 3e of the IGBT 3S.
  • a lead terminal 61 made of a copper plate having a width of 8 mm and a thickness of 0.7 mm is joined by solder 4 to the conductive layer 2a including the collector electrode 3c of the IGBT 3S to which the electrodes on the back side of each element are joined. .
  • the ceramic substrate 2 uses a silicone adhesive 9 so as to fill a gap between the ceramic substrate 2i portion inside a case 8 made of PPS (Poly Phenylene Sulfide) resin of 48 mm ⁇ 28 mm ⁇ height 12 mm. The positioning is fixed.
  • the lead terminal 61, the lead terminal 62, and the signal terminal 52 are each formed by insert molding in the case 8, and the width exposed from the upper part of the case 8 of the lead terminal 61 and the lead terminal 62 (upper left side in the figure).
  • the 10 mm terminal portions 61j and 62j are screw terminals.
  • one end (width: 1.5 mm) of the signal terminal 52 is electrically connected inside the case 8 by a gate electrode 3g which is a control electrode of the IGBT 3S and a bonding wire 51 (aluminum: ⁇ 0.15 mm). From the upper part (upper right side in the figure), the other end of the pin shape is exposed.
  • the lead terminal 61 and the lead terminal 62 form a main current circuit 6 including the power semiconductor element 3 and an external circuit.
  • the gate electrode 3g (1 mm ⁇ 2 mm) of the IGBT 3S has an external signal circuit 5 formed by a signal terminal 52 and a bonding wire 51.
  • the inside of the case 8 is filled with resin (sealing body 7) by direct potting, and is heat-cured and insulated and sealed.
  • the linear expansion coefficient of the sealing body 7 is adjusted so as to be an intermediate value between the linear expansion coefficient of the lead terminal 62 and the linear expansion coefficient of the ceramic substrate 2.
  • the lead terminal 62 which is a feature of the power semiconductor device 1 according to the first embodiment, has an inclined surface 62t that moves away from the ceramic substrate 2 and the power semiconductor element 3 as it proceeds to the end 62e in the longitudinal direction. Is provided.
  • the inclined surface 62t has a bent portion 62b (a portion 2b in front of the end portion 62e (on the opposite side of the terminal portion 62j) from the joined portion with respect to the flat portion 62f joined to the power semiconductor element 3 of the lead terminal 62. It is formed by providing a flip-up angle of 45 degrees).
  • the end portion 62e of the portion sealed by the sealing body 7 inside the case 8 is directed toward the end portion 62e. It inclines so that it may leave
  • the case 8 in which the lead terminal 61, the lead terminal 62, and the signal terminal 52 are integrated is formed by a mold insert.
  • the power semiconductor elements 3 are joined to the predetermined positions on the circuit surface (conductive layer 2 a side) of the ceramic substrate 2 by the solder 4.
  • the ceramic substrate 2 on which the power semiconductor element 3 is mounted is inserted from the lower side (lower side in the drawing) of the case 8 described above.
  • the inserted ceramic substrate 2 is fixed to the case 8 using an adhesive 9.
  • the gap between the ceramic base 2 i and the case 8 is filled with the adhesive 9, so that the case 8 and the ceramic substrate 2 form a container with the ceramic substrate 2 as a bottom and an open top.
  • the lead terminal 61 is opposed to the conductive layer 2a with an interval of 2 mm, and the lead terminal 62 (flat portion 62f) is predetermined with respect to the main electrodes 3a and 3e of the power semiconductor element 3. Opposite with a gap. And between each, the solder material which is not shown in figure is installed.
  • each of the lead terminal 61 and the conductive layer 2a, the lead terminal 62, and the power semiconductor element 3 The main electrodes 3a and 3e are joined by solder 4. Further, the end of the signal terminal 52 exposed in the case 8 is electrically connected to the control electrode of the IGBT 3S such as a temperature sensor electrode including the gate electrode 3g by the bonding wire 51.
  • the ceramic substrate 2 has copper conductor layers 2a and 2b formed on both sides of an AlN ceramic substrate 2i, and the linear expansion coefficient of the entire substrate is about 10 ppm / K, whereas a copper lead terminal
  • the linear expansion coefficient of 62 is 16 ppm / K.
  • an inclined surface 62t is formed by the bent portion 62b, so that the lead terminal 62 and the element (in the first embodiment, IGBT 3S) The gap becomes wider toward the end 62e. Therefore, the resin thickness of the sealing body 7 interposed between the lead terminal 62 and the element gradually increases toward the end 62e.
  • the present inventors have carried out a number of heat cycle tests on various samples of power semiconductor devices using combinations of ceramic substrates and lead electrodes.
  • the results were analyzed, it was found that in many samples, the end portion of the lead terminal to be joined to the main electrode in the sealed body was the starting point of destruction.
  • the lead terminal that electrically connects the external circuit and the main electrode of the power semiconductor element basically extends so as to run longitudinally in the circuit surface. It was found that the stress due to strain was concentrated and became the starting point of fracture.
  • the inclined surface 62t is formed at the end 62e, the distance from the element gradually increases toward the end 62e. That is, as it goes to the end 62e, the thickness of the sealing body 7 interposed between objects having different linear expansion coefficients increases, and the bending strength also increases. On the other hand, when the process proceeds further than the end 62e, the lead terminal 62 is interrupted, and the thickness of the sealing body 7 becomes the thickness.
  • the thickness of the sealing body does not change toward the end portion and is constant, but in this case as well, if the process proceeds further than the end portion 62e, the sealing body It becomes the thickness of the body 7 body.
  • the thickness of the sealing body 7 changes in a step shape at the portion where the terminal is interrupted.
  • the portion where the thickness changes along the longitudinal direction is only one point of the end portion 62e.
  • the thickness (and bending strength) also changes in the portion sandwiched between the lead terminals 62, and the portion where the thickness changes has a length including the end portion 62e ( It is dispersed on the inclined surface 62t). Therefore, it is possible to alleviate the concentration of stress applied to the sealing body 7 at the boundary portion with the end portion 62e, thereby extending the life.
  • FIG. 3 four partial sectional views of the vicinity of the end portion of the lead terminal are arranged vertically and horizontally, and a conventional example is shown on the left side and an embodiment of the present invention is shown on the right side.
  • the upper part shows the state at normal temperature, that is, the state at the stop
  • the lower part shows the state at the high temperature, that is, the state at the start.
  • broken lines passing through the upper and lower stages respectively indicate the position Pe of the end 62e of the conventional lead terminal 62C at normal temperature and the position Pe of the end 62e of the lead terminal 62 according to the embodiment.
  • the first intersection point from the broken line position Pe toward the power semiconductor element 3 is a position Pp on the main surface 3p of the element, which is directly below the end portion at normal temperature.
  • the thermal stress is based on the position Pe (on the end in the figure) of the lead terminal 62 (or 62C) facing the element at normal temperature and the position Pp on the main surface 3p of the element immediately below at a high temperature. It is considered to be proportional to the magnitude of the angle Ae between the line connecting the position Pe and the position Pp and the line perpendicular to the main surface 3p. Therefore, as the inclined surface 62t is formed as in the embodiment, the angle Ae is reduced by increasing the distance toward the end 62e, and the distortion is reduced. That is, the stress applied to the boundary portion with the end portion 62e of the sealing body 7 is smaller than that in the related art.
  • the bent portion 62b that bends the plate material is provided as a method of forming the inclined surface 62t that increases the distance from the element toward the end portion 62e, but is not limited thereto.
  • the inclined surface 62t may be formed by changing the thickness of the end 62e portion like a corner cut. Also in this case, the concentration of stress and starting point generation can be relaxed and the life can be extended.
  • the direct potting resin for forming the sealing body 7 can have the same effect even if it is of a type that is poured and cured at room temperature.
  • the diode 3R and the IGBT 3S have a one-to-one module configuration of “1 in 1”, but even two pairs of “2 in 1” and six pairs of “6 in 1” serve as lead terminals. The same effect can be obtained by arranging the signal terminal on the metal plate.
  • IGBT3S Metal Oxide Semiconductor Field Effect Transistor
  • SBD Schottky Barrier Diode
  • the number of elements is not limited to two, and may be more or one.
  • the same effect can be obtained by using a copper wire, an aluminum-coated copper wire, or a gold wire. Further, the same effect can be obtained by using a ribbon bond or a bus bar that ultrasonically bonds a metal plate.
  • the sealing body 7M may be formed by transfer molding using a mold (not shown) without using a case (transfer mold package).
  • the circuit board (ceramic substrate 2) and the electrodes (for example, 3a and 3e) are formed on one surface, and the other surface is formed on the circuit board.
  • the power semiconductor element 3 is sealed together with the joined power semiconductor element 3, one end side joined to the electrode and the other end side electrically connected to the outside, and the part joined to the electrode of the lead terminal 62.
  • An end face 62t on one end side of the lead terminal 62 (strictly speaking, an inclined surface 62t that moves away from the circuit board as the face facing the circuit board moves toward the end 62e). Is formed.
  • a portion where the thickness (and bending strength) of the portion sandwiched between the lead terminals 62 of the sealing body 7 changes is dispersed in a range (inclined surface 62t) having a length including the end portion 62e. Therefore, the concentration of stress applied to the sealing body 7 on the boundary portion with the end 62e is alleviated.
  • the angle Ae is reduced by increasing the interval, the strain is reduced, and the stress applied to the boundary portion with the end 62e of the sealing body 7 is smaller than that in the related art. As a result, even when the lead terminal 62 corresponding to a large current is used, the life can be extended.
  • the bent portion 62b is provided in the vicinity of the end portion 62e, the inclined surface 62t can be easily formed.
  • the inclined surface 62t can be easily formed even if, for example, a corner cut portion is provided so that the thickness decreases toward the end portion 62e.
  • FIG. 6 is a cross-sectional view corresponding to the line AA of FIG. 1A used in the first embodiment for explaining the configuration of the power semiconductor device according to the second embodiment of the present invention. is there.
  • the configuration other than the lead terminal is the same as that described in the first embodiment including the modification, the description thereof is omitted.
  • the same components as those described in the first embodiment are denoted by the same reference numerals, and a detailed description of overlapping portions is omitted.
  • the power semiconductor element 3 is die-bonded (joined) to the conductive layer 2 a of the ceramic substrate 2, which is a circuit board, by solder 4. .
  • the ceramic substrate 2 was formed by forming 0.4 mm thick copper conductive layers 2 a and 2 b on both sides of a 40 mm ⁇ 25 mm ⁇ 0.635 mm thick aluminum nitride ceramic substrate 2 i.
  • the power semiconductor element 3 is an element using SiC which is a wide band gap semiconductor material.
  • an IGBT (Insulated Gate Bipolar Transistor) 3S having a rectangular plate shape with a thickness of 0.25 mm and a 15 mm square is used.
  • a diode 3R having a rectangular plate shape with a thickness of 0.25 mm and 15 mm ⁇ 15 mm was used.
  • one end of the lead terminal 62 which is a feature of the present invention, is joined to the main electrodes (3a, 3e) on the front side including the emitter electrode 3e of the IGBT 3S.
  • a lead terminal 61 made of a copper plate having a width of 8 mm and a thickness of 0.7 mm is joined by solder 4 to the conductive layer 2a including the collector electrode 3c of the IGBT 3S to which the electrodes on the back side of each element are joined. .
  • the ceramic substrate 2 uses a silicone adhesive 9 so as to fill a gap between the ceramic substrate 2i portion inside a case 8 made of PPS (Poly Phenylene Sulfide) resin of 48 mm ⁇ 28 mm ⁇ height 12 mm. The positioning is fixed.
  • the lead terminal 61, the lead terminal 62, and the signal terminal 52 are each formed by insert molding in the case 8, and the width exposed from the upper part of the case 8 of the lead terminal 61 and the lead terminal 62 (upper left side in the figure).
  • the 10 mm terminal portions 61j and 62j are screw terminals.
  • one end (width: 1.5 mm) of the signal terminal 52 is electrically connected inside the case 8 by a gate electrode 3g which is a control electrode of the IGBT 3S and a bonding wire 51 (aluminum: ⁇ 0.15 mm). From the upper part (upper right side in the figure), the other end of the pin shape is exposed.
  • the lead terminal 61 and the lead terminal 62 form a main current circuit 6 including the power semiconductor element 3 and an external circuit.
  • the gate electrode 3g of the IGBT 3S has a signal circuit 5 connected to the outside by a signal terminal 52 and a bonding wire 51.
  • the inside of the case 8 is filled with resin (sealing body 7) by direct potting, heat cured, and insulated and sealed as described in the first embodiment.
  • the linear expansion coefficient of the sealing body 7 is adjusted so as to be an intermediate value between the linear expansion coefficient of the lead terminal 62 and the linear expansion coefficient of the ceramic substrate 2.
  • the lead terminal 62 of the power semiconductor device 1 according to the second embodiment protrudes downward over the region including the joint portion with the element so that both end portions in the longitudinal direction are farther from the ceramic substrate 2 than the center portion. (Curved portion 62c is formed). Since the curved portion 62c is formed, the vicinity of the end portion 62e is separated from the ceramic substrate 2 and the power semiconductor element 3 toward the end portion 62e. That is, of the facing surface of the lead terminal 62 to the power semiconductor element 3 or the ceramic substrate 2, the end portion 62e of the portion sealed by the sealing body 7 inside the case 8 is directed toward the end portion 62e. An inclined surface 62t that is inclined away from the power semiconductor element 3 or the ceramic substrate 2 is formed.
  • the occurrence of the breakdown starting point is alleviated from concentrating on the boundary portion with the end 62e, and as a result, the life until the breakdown is extended is extended. Can do.
  • the configuration in which the bent portion 62b described in the first embodiment is provided, the configuration in which the thickness is changed, and the configuration in which the bending is performed over the region including the joint portion with the element described in the second embodiment are appropriately combined. It is possible.
  • the sealing body 7 is formed by potting resin in the case 8 is shown, but the present invention is not limited to this.
  • the sealing body may be formed by transfer molding using a mold (not shown) without using a case.
  • the lead terminal 62 is opposed to the ceramic substrate 2 including the portion joined to the power semiconductor element 3 (the electrode thereof). Even if the portion (curved portion 62c) is configured to be curved, the inclined surface 62t can be easily formed.
  • the power semiconductor element 3 has been described using an example of SiC, which is a wide band gap semiconductor material.
  • SiC gallium nitride
  • GaN gallium nitride
  • the present invention can also be applied to a general element using silicon.
  • GaN gallium nitride
  • GaN gallium nitride
  • the inclined surface 62t on the lead terminal 62 so as to be away from the power semiconductor element 3 or the ceramic substrate 2 toward the end 62e, the occurrence of the starting point of destruction is prevented from occurring at the end. As a result, it is possible to relieve the concentration at the boundary with 62e, and as a result, it is possible to further increase the life until the destruction. That is, by using the configuration of the lead terminal 62 according to each embodiment of the present invention, it is possible to obtain a high-performance power semiconductor device 1 that takes advantage of the characteristics of a wide band gap semiconductor.

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
PCT/JP2015/063993 2014-05-20 2015-05-15 電力用半導体装置 Ceased WO2015178296A1 (ja)

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JP2016521067A JP6316412B2 (ja) 2014-05-20 2015-05-15 電力用半導体装置
DE112015002348.8T DE112015002348T5 (de) 2014-05-20 2015-05-15 Halbleitervorrichtung für elektrische Energie
CN201580013957.2A CN106104779B (zh) 2014-05-20 2015-05-15 功率用半导体装置
US15/124,489 US10658284B2 (en) 2014-05-20 2015-05-15 Shaped lead terminals for packaging a semiconductor device for electric power

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US10658284B2 (en) 2020-05-19
US20170018495A1 (en) 2017-01-19
CN110120375A (zh) 2019-08-13
JPWO2015178296A1 (ja) 2017-04-20
CN106104779B (zh) 2019-05-10
JP6316412B2 (ja) 2018-04-25
DE112015002348T5 (de) 2017-02-16
JP2018093244A (ja) 2018-06-14

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