WO2015015800A1 - 半導体基板および半導体基板の製造方法 - Google Patents
半導体基板および半導体基板の製造方法 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 131
- 239000004065 semiconductor Substances 0.000 title claims abstract description 110
- 238000000034 method Methods 0.000 title claims description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000012535 impurity Substances 0.000 claims abstract description 26
- 125000004429 atom Chemical group 0.000 claims description 60
- 239000013078 crystal Substances 0.000 claims description 53
- 125000004432 carbon atom Chemical group C* 0.000 claims description 44
- 150000004767 nitrides Chemical class 0.000 claims description 37
- 239000000203 mixture Substances 0.000 claims description 31
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 229910052742 iron Inorganic materials 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 3
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- 229910052799 carbon Inorganic materials 0.000 description 32
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- 239000010980 sapphire Substances 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
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- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
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Definitions
- the present invention relates to a semiconductor substrate and a method for manufacturing the semiconductor substrate.
- Non-Patent Document 1 discloses a structure in which a buffer layer, a superlattice structure, and a gallium nitride layer are sequentially stacked on a silicon (111) surface.
- the gallium nitride layer becomes the active layer of the transistor.
- this structure since the warp of the substrate is suppressed by the superlattice structure, there is an advantage that a relatively thick gallium nitride layer can be easily formed and a high breakdown voltage nitride semiconductor crystal layer can be easily obtained.
- a first GaN / AlN superlattice layer in which a plurality of pairs of GaN layers and AlN layers are stacked is formed on a substrate so that GaN layers and AlN layers are alternately stacked.
- a second GaN / AlN superlattice layer in which a plurality of pairs of GaN layers and AlN layers are laminated is formed so as to be in contact with the first GaN / AlN superlattice layer so that the GaN layers and the AlN layers are alternately laminated.
- an element operation layer including a GaN electron transit layer and an AlGaN electron supply layer is formed on the second GaN / AlN superlattice layer.
- the c-axis average lattice constant LC1 of the first GaN / AlN superlattice layer, the c-axis average lattice constant LC2 of the second GaN / AlN superlattice layer, and the c-axis average lattice constant LC3 of the GaN electron transit layer are LC1. It is disclosed that ⁇ LC2 ⁇ LC3 is satisfied.
- Patent Document 2 discloses an epitaxial substrate in which a group III nitride layer group is formed on a (111) single crystal Si substrate so that the (0001) crystal plane is substantially parallel to the substrate surface.
- the epitaxial substrate includes a buffer layer in which a first stack unit and a second stack unit are alternately stacked, and the uppermost layer and the lowermost layer are both configured by the first stack unit; And a crystal layer formed.
- the first stack unit includes a composition modulation layer in which compression strain is contained by repeatedly and alternately laminating first unit layers and second unit layers having different compositions, and a compression strain in the composition modulation layer. And a first intermediate layer for strengthening.
- the second stacked unit is formed to be a substantially unstrained second intermediate layer.
- Patent Literature Japanese Patent Application Laid-Open No. 2011-238865
- Patent Document 2 International Publication WO 2011/102045
- Non-Patent Document "High quality GaN grown on Si (111) by gas source molecular beam epitaxy with ammonia", S. A. Nikishin et. Al., Applied Physics letter, Vol. 75, 2073 (1999)
- the present inventor has conducted an experimental study of introducing impurity atoms such as carbon atoms into the underlying layer (superlattice layer) of the nitride semiconductor crystal layer for the purpose of obtaining a nitride semiconductor crystal layer having a high withstand voltage. .
- impurity atoms such as carbon atoms into the underlying layer (superlattice layer) of the nitride semiconductor crystal layer for the purpose of obtaining a nitride semiconductor crystal layer having a high withstand voltage.
- the technique for controlling the warpage amount of the substrate described in Patent Document 1 and Patent Document 2 described above is a state in which no impurity atoms are introduced for improving the withstand voltage, or the amount of introduced impurity atoms is small.
- the technology described in Patent Document 1 and Patent Document 2 controls the amount of warping of the substrate when impurity atoms are introduced to such an extent that the effect of improving the withstand voltage is sufficiently obtained. It came to recognize that there is a problem that can not be.
- the object of the present invention is to reduce the amount of warping even when an amount of impurity atoms is introduced into the superlattice layer, which is the underlayer of the nitride semiconductor crystal layer, so that the effect of improving the withstand voltage is sufficiently obtained.
- An object of the present invention is to provide a semiconductor substrate having a layer structure in which a control effect is not lost or a method for manufacturing the same.
- the semiconductor device includes a base substrate, a first superlattice layer, a connection layer, a second superlattice layer, and a nitride semiconductor crystal layer
- the base substrate, the first superlattice layer, the connection layer, the second superlattice layer, and the nitride semiconductor crystal layer are in the order of the base substrate, the first superlattice layer, the connection layer, the second superlattice layer, and the nitride semiconductor crystal layer.
- the first superlattice layer has a plurality of first unit layers composed of the first layer and the second layer
- the second superlattice layer includes a plurality of second unit layers composed of the third layer and the fourth layer.
- the first layer is made of Al x1 Ga 1-x1 N (0 ⁇ x1 ⁇ 1)
- the second layer is made of Al y1 Ga 1-y1 N (0 ⁇ y1 ⁇ 1, x1> y1)
- the third layer is made of Al x2 Ga 1-x2 N (0 ⁇ x2 ⁇ 1)
- the fourth layer is Al y2 Ga 1-y2 N (0 ⁇ y2 ⁇ 1, x2>).
- the average lattice constant of the first superlattice layer is different from the average lattice constant of the second superlattice layer, and one or more layers selected from the first superlattice layer and the second superlattice layer have resistance to Provided is a semiconductor substrate in which impurity atoms that improve voltage are included at a density exceeding 7 ⁇ 10 18 [atoms / cm 3 ].
- the connection layer is preferably a crystal layer in contact with the first superlattice layer and the second superlattice layer.
- the composition of the connection layer may continuously change from the first superlattice layer to the second superlattice layer in the thickness direction of the connection layer. Alternatively, the composition of the connection layer may change stepwise from the first superlattice layer toward the second superlattice layer in the thickness direction of the connection layer.
- connection layer examples include those made of Al z Ga 1-z N (0 ⁇ z ⁇ 1).
- the thickness of the connection layer is preferably larger than any one of the first layer, the second layer, the third layer, and the fourth layer.
- the average lattice constant of the connection layer is preferably smaller than the average lattice constant of either the first superlattice layer or the second superlattice layer.
- a method for manufacturing a semiconductor substrate according to the first aspect wherein the first layer and the second layer are first unit layers, and the formation of the first unit layer is repeated n times.
- forming a nitride semiconductor crystal layer and formed in one or more steps selected from the step of forming the first superlattice layer and the step of forming the second superlattice layer
- a method for manufacturing a semiconductor substrate in which a layer is formed so that impurity atoms that improve the withstand voltage of the layer are included at a density exceeding 7 ⁇ 10 18 [atoms / cm 3 ].
- the compositions of the first layer to the fourth layer, the first layer to the fourth layer, so that the warp on the surface of the nitride semiconductor crystal layer of the semiconductor substrate is 50 ⁇ m or less.
- One or more parameters selected from the thicknesses n, the number n of unit layer repetitions in the first superlattice layer, and the number m of unit layer repetitions in the second superlattice layer can be adjusted.
- the number n of unit layers in the first superlattice layer and the second superlattice layer so that the warp on the surface of the nitride semiconductor crystal layer of the semiconductor substrate is 50 ⁇ m or less. It is preferable to adjust the number m of repeating unit layers.
- FIG. 3 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Example 1.
- FIG. 5 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 1.
- 10 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 2.
- 10 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 3.
- 6 is a graph showing the amount of warpage and the withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Example 2.
- 6 is a graph showing the amount of warpage of the semiconductor substrates of Examples 1 and 2 and Comparative Examples 1 to 3 with respect to the carbon atom concentration. It is the graph which showed the amount of curvature and withstand voltage at the time of changing the number of layers of the 1st superlattice layer of the semiconductor substrate of Example 3, and the 2nd superlattice layer. 10 is a graph showing the amount of warpage when the number of first superlattice layers and second superlattice layers of the semiconductor substrate of Example 4 is changed. 6 is a graph showing the amount of warpage with respect to the average lattice constant difference of the semiconductor substrate of Example 5.
- FIG. 1 shows a cross-sectional view of a semiconductor substrate 100 according to an embodiment of the present invention.
- the semiconductor substrate 100 includes a base substrate 102, a buffer layer 104, a first superlattice layer 110, a connection layer 120, a second superlattice layer 130, and a nitride semiconductor crystal layer 140.
- the base substrate 102, the first superlattice layer 110, the connection layer 120, the second superlattice layer 130, and the nitride semiconductor crystal layer 140 are the base substrate 102, the first superlattice layer 110, the connection layer 120, and the second superlattice layer. 130 and the nitride semiconductor crystal layer 140 are arranged in this order.
- the base substrate 102 is a substrate that supports each layer above the buffer layer 104 described below.
- the material of the base substrate 102 is arbitrary as long as it has mechanical strength necessary to support each layer and has thermal stability when forming each layer by an epitaxial growth method or the like.
- As the base substrate 102 a Si substrate, a sapphire substrate, a Ge substrate, a GaAs substrate, an InP substrate, or a ZnO substrate can be exemplified.
- the buffer layer 104 is a layer that buffers a difference in lattice constant between the base substrate 102 and the first superlattice layer 110.
- the buffer layer 104 can be formed by an epitaxial growth method with a reaction temperature (substrate temperature) of 500 ° C. to 1000 ° C.
- a reaction temperature substrate temperature
- an AlN layer can be exemplified as the buffer layer 104.
- the thickness of the buffer layer 104 is preferably in the range of 10 nm to 300 nm, and more preferably in the range of 50 nm to 200 nm.
- the first superlattice layer 110, the connection layer 120, and the second superlattice layer 130 control the amount of warp of the semiconductor substrate 100 even when a sufficient amount of impurity atoms is introduced for improving the withstand voltage.
- Is a layer structure capable of The first superlattice layer 110 has a plurality of first unit layers 116, and the second superlattice layer 130 has a plurality of second unit layers 136.
- the first unit layer 116 includes a first layer 112 and a second layer 114
- the second unit layer 136 includes a third layer 132 and a fourth layer 134.
- the first layer 112 is made of Al x1 Ga 1-x1 N (0 ⁇ x1 ⁇ 1)
- the second layer 114 is made of Al y1 Ga 1-y1 N (0 ⁇ y1 ⁇ 1, x1> y1).
- the third layer 132 is made of Al x2 Ga 1-x2 N (0 ⁇ x2 ⁇ 1)
- the fourth layer 134 is made of Al y2 Ga 1-y2 N (0 ⁇ y2 ⁇ 1, x2> y2).
- the first layer 112, the second layer 114, the third layer 132, and the fourth layer 134 can be formed using an epitaxial growth method.
- the first layer 112 and the third layer 132 when x1 and x2 are 1, an AlN layer can be exemplified.
- the thickness of the first layer 112 and the third layer 132 is preferably in the range of 1 nm to 10 nm, and more preferably in the range of 3 nm to 7 nm.
- y1 and y2 are in the range of 0.05 to 0.25, that is, the range of the Al 0.05 Ga 0.95 N layer to the Al 0.25 Ga 0.75 N layer. It can be illustrated.
- the thicknesses of the second layer 114 and the fourth layer 134 are preferably in the range of 10 nm to 30 nm, and more preferably in the range of 15 nm to 25 nm.
- the first superlattice layer 110 is formed by forming a plurality of first unit layers 116 including the first layer 112 and the second layer 114.
- the average lattice constant a1 of the first superlattice layer 110 can be changed.
- the average lattice constant a1 of the first superlattice layer 110 can be defined as the lattice constant of the first layer 112 ⁇ the ratio of the first layer 112 + the lattice constant of the second layer 114 ⁇ the ratio of the second layer 114.
- the number n of the first unit layers 116 included in the first superlattice layer 110 is preferably in the range of 1 to 200 layers, and more preferably in the range of 1 to 150 layers.
- a plurality of second unit layers 136 composed of the third layer 132 and the fourth layer 134 are formed to constitute the second superlattice layer 130.
- the average lattice constant a2 of the second superlattice layer 130 can be changed.
- the average lattice constant a2 of the second superlattice layer 130 can be defined as the lattice constant of the third layer 132 ⁇ the ratio of the third layer 132 + the lattice constant of the fourth layer 134 ⁇ the ratio of the fourth layer 134.
- the number m of the second unit layers 136 included in the second superlattice layer 130 is preferably in the range of 1 to 200 layers, and more preferably in the range of 1 to 150 layers.
- the average lattice constant a1 of the first superlattice layer 110 and the average lattice constant a2 of the second superlattice layer 130 are different and are selected from the first superlattice layer 110 and the second superlattice layer 130.
- the one or more layers formed include impurity atoms that improve the withstand voltage at a density exceeding 7 ⁇ 10 18 [atoms / cm 3 ].
- the impurity atom include one or more atoms selected from the group consisting of C atom, Fe atom, Mn atom, Mg atom, V atom, Cr atom, Be atom, and B atom.
- a C atom or an Fe atom is preferable, and a C atom is particularly preferable.
- connection layer 120 connects the first superlattice layer 110 and the second superlattice layer 130.
- the connection layer 120 can be formed by an epitaxial growth method.
- An example of the connection layer 120 is Al z Ga 1-z N (0 ⁇ z ⁇ 1).
- the connection layer 120 may be a crystal layer in contact with the first superlattice layer 110 and the second superlattice layer 130.
- the connection layer 120 may be a single layer or a multilayer.
- the composition of the connection layer 120 may change in the thickness direction. Specifically, the composition of the connection layer 120 may continuously change from the first superlattice layer 110 toward the second superlattice layer 130 in the thickness direction of the connection layer 120.
- the composition of the connection layer 120 may change stepwise from the first superlattice layer 110 toward the second superlattice layer 130 in the thickness direction of the connection layer 120.
- the thickness of the connection layer 120 may be larger than any one of the first layer 112, the second layer 114, the third layer 132, and the fourth layer 134.
- the average lattice constant of the connection layer 120 can be smaller than the average lattice constant of the first superlattice layer 110 and the second superlattice layer 130.
- the thickness of the connection layer 120 can be 20 to 300 nm, preferably 25 to 200 nm, more preferably 30 to 200 nm, and still more preferably 30 to 150 nm.
- the nitride semiconductor crystal layer 140 can have a device base layer 142 and an active layer 144. By increasing the thickness of the device base layer 142, the withstand voltage of the device can be increased. In the active layer 144, an active region such as a channel of a transistor is formed.
- the semiconductor substrate 100 of the present embodiment by introducing impurity atoms at a density exceeding 7 ⁇ 10 18 [atoms / cm 3 ], a high withstand voltage of 450 V or more is realized, and at the same time, a nitride semiconductor crystal
- the amount of warpage on the surface of the layer 140 can be 50 ⁇ m (absolute value) or less.
- the amount of warpage refers to the elevation at the center of the substrate with respect to the edge, where the direction in which the nitride semiconductor crystal layer 140 side is convex is negative, the direction in which the nitride semiconductor crystal layer 140 is concave is positive.
- the warpage amount of the semiconductor substrate 100 can be controlled to 50 ⁇ m (absolute value) or less.
- the following mechanism can be considered as the reason.
- the thermal expansion coefficient of the GaN-based crystal is larger than that of Si, so the GaN-based crystal on the Si substrate grown by lattice matching at high temperature is When the temperature is lowered, it will warp upward.
- the concave on the upper side refers to a state in which the surface of the GaN-based crystal layer opposite to the Si substrate is concave.
- a stack composed of an upper superlattice layer (USL layer) and a lower superlattice layer (LSL layer) is provided between the Si substrate and the GaN layer.
- the stress due to the difference in average lattice constant between the USL layer and the LSL layer causes the USL A compressive stress acts on the layer, and a tensile stress acts on the LSL layer.
- the stress acting on the laminated structure composed of the USL layer and the LSL layer (sometimes referred to as “USL / LSL structure” in this specification) is a force that warps upwards, and the warp due to the difference in thermal expansion coefficient described above. Is the force in the opposite direction. Therefore, the USL / LSL structure has an effect of reducing the warpage of the substrate.
- the stress in the USL / LSL structure acts around the interface between the USL layer and the LSL layer as a fulcrum. Since there are dislocations and irregularities at the interface in the actual crystal, it seems that the fulcrum has a width of about several nanometers to several tens of nanometers (thickness in the growth direction). If the GaN crystal contains many impurity atoms such as carbon atoms, it tends to generate defects near the stack interface. If the USL / LSL structure contains many impurity atoms, the interface between the USL layer and the LSL layer or It is considered that many defects are generated at the superlattice interface in the USL layer and the LSL layer.
- connection layer 120 is formed between the first superlattice layer 110 (corresponding to the LSL layer) and the second superlattice layer 130 (corresponding to the USL layer).
- the connection layer 120 acts as a fulcrum for stress generated by the average lattice constant difference between the first superlattice layer 110 and the second superlattice layer 130.
- the connection layer 120 is thicker than the first layer 112, the second layer 114, the third layer 132, and the fourth layer 134 constituting the first superlattice layer 110 and the second superlattice layer 130, and is in the growth direction (thickness direction). ) Has a small interface density per unit length. Therefore, it is hardly affected by the relaxation of the interface.
- the stresses generated in the first superlattice layer 110 and the second superlattice layer 130 can be transmitted to each other. That is, it is possible to control the amount of warpage, and as a result, it is considered that the warpage of the semiconductor substrate 100 can be reduced.
- the thickness of the connection layer 120 is larger than the thicknesses of the first layer 112, the second layer 114, the third layer 132, and the fourth layer 134 constituting the first superlattice layer 110 and the second superlattice layer 130. It also has the effect of reducing defects such as dislocations generated at the interface during the growth process. This occurs because dislocations having Burgers vectors with opposite signs coalesce during the growth process. As a result, it is considered that not only the interface but also defects in the bulk crystal can be suppressed and stress can be transmitted more efficiently. As a result, it is considered that the warpage of the substrate can be reduced even when the first superlattice layer 110 or the second superlattice layer 130 contains a high concentration of carbon atoms.
- the semiconductor substrate 100 described above can be manufactured by the following manufacturing method. That is, after the buffer layer 104 is formed on the base substrate 102, the first layer 112 and the second layer 114 are used as the first unit layer 116, and the formation of the first unit layer 116 is repeated n times to form the first superlattice layer 110. Form. Then, the connection layer 120 is formed, the third layer 132 and the fourth layer 134 are used as the second unit layer 136, and the second unit layer 136 is formed m times to form the second superlattice layer 130. Furthermore, the nitride semiconductor crystal layer 140 can be formed.
- impurity atoms that improve the withstand voltage of the formed layer are 7 ⁇
- the layer is formed so as to be included at a density exceeding 10 18 [atoms / cm 3 ].
- the first layer 112, the second layer 114, the connection layer 120, the third layer 132, the fourth layer 134, and the nitride semiconductor crystal layer 140 can be formed using an epitaxial growth method.
- the epitaxial growth method include MOCVD (Metal Organic Chemical Vapor Deposition) method and MBE (Molecular Beam Epitaxy) method.
- MOCVD Metal Organic Chemical Vapor Deposition
- MBE Molecular Beam Epitaxy
- the source gas include TMG (trimethyl gallium), TMA (trimethyl aluminum), and NH 3 (ammonia). Nitrogen gas or hydrogen gas may be used as the carrier gas.
- the reaction temperature can be selected in the range of 400 ° C to 1300 ° C.
- the carbon atom concentration can be controlled by changing at least one of the ratio of the group III source gas to the group V source gas, the reaction temperature, and the reaction pressure.
- the higher the reaction temperature, the lower the carbon atom concentration, and the smaller the ratio of the group V source gas to the group III source gas the higher the carbon atom concentration.
- the carbon atom concentration increases as the reaction pressure is lowered.
- the carbon atom concentration can be detected by, for example, SIMS (secondary ion mass spectrometry).
- the compositions of the first layer 112 to the fourth layer 134, the first layer so that the warp on the surface of the nitride semiconductor crystal layer 140 of the semiconductor substrate 100 is 50 ⁇ m or less.
- One or more parameters selected from the thickness of each of the layers 112 to 134, the repeating number n of the unit layers in the first superlattice layer 110, and the repeating number m of the unit layers in the second superlattice layer 130 are adjusted. can do.
- the number n of unit layers in first superlattice layer 110 and the number of repetitions of warp on the surface of nitride semiconductor crystal layer 140 of semiconductor substrate 100 become 50 ⁇ m or less.
- the number m of repeating unit layers in the two superlattice layers 130 can be adjusted.
- Example 1 A 4-inch Si substrate (thickness: 625 ⁇ m, p-type dope) having a plane orientation of (111) was used as the base substrate 102, and an AlN layer having a thickness of 150 nm was formed as the buffer layer 104 on the Si substrate.
- an AlN layer is formed as a first layer 112 with a thickness of 5 nm
- an Al 0.15 Ga 0.85 N layer is formed as a second layer 114 with a thickness of 16 nm
- a first unit layer is formed.
- 116 After 75 first unit layers 116 were formed to form the first superlattice layer 110, an AlN layer was formed as the connection layer 120 to a thickness of 70 nm.
- an AlN layer having a thickness of 5 nm was formed as the third layer 132, and an Al 0.1 Ga 0.9 N layer having a thickness of 16 nm was formed as the fourth layer 134 to form the second unit layer 136.
- a GaN layer is formed to a thickness of 800 nm as the device base layer 142, and an Al 0.2 Ga 0.
- the 8 N layer was formed with a thickness of 20 nm.
- a plurality of types of semiconductor substrates 100 were produced by changing the reaction temperature when forming the first superlattice layer 110.
- the average lattice constant of the first superlattice layer 110 is 0.316187 nm
- the average lattice constant of the second superlattice layer 130 is 0.316480 nm.
- the average lattice constant of the connection layer 120 is 0.311200 nm.
- Comparative example As comparative examples, the following comparative examples 1 to 3 were prepared.
- FIG. 2 is a graph showing the amount of warpage and the withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Example 1.
- FIG. 3 is a graph showing the amount of warpage and the withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 1.
- FIG. 4 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 2.
- FIG. 5 is a graph showing the amount of warpage and the withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Comparative Example 3.
- the carbon atom concentration was an average concentration in SIMS depth analysis.
- the amount of warpage was evaluated by measuring the height of each part of the substrate using laser light, with the direction in which the central portion of the substrate was higher than the peripheral portion being positive.
- the withstand voltage is measured by measuring the current voltage between the 250 ⁇ m ⁇ 200 ⁇ m ohmic electrode formed on the active layer 144 and the ohmic electrode formed on the entire back surface of the base substrate 102, and the current value exceeds 1 ⁇ A / mm 2. Defined as voltage.
- Example 2 In the semiconductor substrate of Example 2, the composition in the thickness direction of the connection layer 120 was continuously changed from AlN to Al 0.3 Ga 0.7 N from the first superlattice layer 110 toward the second superlattice layer 130. It formed similarly to Example 1 except having changed.
- the carbon atom concentration was set at two levels of 1 ⁇ 10 19 and 6 ⁇ 10 19 (unit: cm ⁇ 3 ).
- FIG. 6 is a graph showing the amount of warpage and withstand voltage with respect to the carbon atom concentration of the semiconductor substrate of Example 2.
- FIG. 7 is shown for easy understanding of comparison with Example 1.
- FIG. 7 is a graph showing the amount of warpage of the semiconductor substrates of Examples 1 and 2 and Comparative Examples 1 to 3 with respect to the carbon atom concentration. It can be seen that the amount of warpage of the semiconductor substrate of Example 2 is lower than that of the semiconductor substrate of Example 1 as well as Comparative Examples 1 to 3.
- Example 3 The semiconductor substrate of Example 3 shows an example in which the number n of the first unit layers 116 in the first superlattice layer 110 and the number m of the second unit layers 136 in the second superlattice layer 130 are changed.
- a semiconductor substrate was formed in the same manner as in Example 1 except that the carbon atom concentration was fixed to 1 ⁇ 10 19 (cm ⁇ 3 ) and the number of layers n and m were changed.
- FIG. 8 is a graph showing the amount of warpage and the withstand voltage of the semiconductor substrate of Example 3. It can be seen that the amount of warpage can be controlled by changing the number of layers n and the number of layers m.
- Example 4 The semiconductor substrate of Example 4 shows the case where a sapphire substrate is used as the base substrate 102.
- FIG. 9 is a graph showing the amount of warpage of the semiconductor substrate of Example 4. Even when the base substrate 102 is a sapphire substrate, the amount of warpage can be controlled by changing the number n and the number m of unit layers in the first superlattice layer 110 and the second superlattice layer 130. .
- Example 5 shows an example of a semiconductor substrate in which the Al composition of the AlGaN layer that is the fourth layer 134 is changed in the range of 0.15 to 0.10.
- the carbon atom concentration was fixed at 1 ⁇ 10 19 (cm ⁇ 3 ), and the others were the same as in Example 1.
- the Al composition was set to six levels of 0.15, 0.14, 0.13, 0.12, 0.11, and 0.10.
- the Al composition level of 0.10 and 0.15 corresponds to the case where the carbon atom concentration of Example 1 and Comparative Example 2 is 1 ⁇ 10 19 (cm ⁇ 3 ), respectively.
- the semiconductor substrates in the case of 0.10 and 0.15 the semiconductor substrates having the carbon atom concentration of 1 ⁇ 10 19 (cm ⁇ 3 ) in Example 1 and Comparative Example 2, respectively, were used.
- the average lattice constants of the second superlattice layer 130 when the Al composition is 0.15, 0.14, 0.13, 0.12, 0.11 and 0.10 are 0.316187 and 0.316245, respectively. , 0.316304, 0.316363, 0.316421 and 0.316480 (unit: nm).
- the average lattice constant of the first superlattice layer 110 is 0.316187 nm
- the average lattice when the Al composition is 0.15, 0.14, 0.13, 0.12, 0.11 and 0.10
- the constant difference (average lattice constant of the second superlattice layer 130 ⁇ average lattice constant of the first superlattice layer 110) is 0.000000, 0.000059, 0.000117, 0.000176, 0.000235 and 0, respectively. .000293 (unit: nm).
- FIG. 10 is a graph showing the amount of warpage with respect to the average lattice constant difference of the semiconductor substrate of Example 5. It can be seen that the amount of warpage decreases as the average lattice constant difference increases. Then, when the average lattice constant of the second superlattice layer 130 is slightly larger than the average lattice constant of the first superlattice layer 110 (the average lattice constant difference is large), the amount of warpage changes, corresponding to the average lattice constant difference. Thus, it can be seen that the value of the warping amount is sensitively changed.
- the stress generated in the first superlattice layer 110 and the second superlattice layer 130 is mutually controlled in the mechanism that can control the amount of warp of the semiconductor substrate even if impurity atoms are introduced at a high concentration. This indicates that the amount of warpage can be controlled.
- the amount of warpage can be precisely controlled by the difference in average lattice constant, and that the amount of warpage tends to saturate when the average lattice constant difference is large is consistent with the mechanism described above, and the correctness of the mechanism is inferred. This is one of the facts.
- DESCRIPTION OF SYMBOLS 100 Semiconductor substrate, 102 ... Base substrate, 104 ... Buffer layer, 110 ... First superlattice layer, 112 ... First layer, 114 ... Second layer, 116 ... First unit layer, 120 ... Connection layer, 130 ... First 2 superlattice layers, 132 ... third layer, 134 ... fourth layer, 136 ... second unit layer, 140 ... nitride semiconductor crystal layer, 142 ... device base layer, 144 ... active layer
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Abstract
Description
[先行技術文献]
[特許文献]
[特許文献1]特開2011-238685号公報
[特許文献2]国際公開WO2011/102045号
[非特許文献]
[非特許文献1]"High quality GaN grown on Si(111) by gas source molecular beam epitaxy with ammonia", S. A. Nikishin et. al., Applied Physics letter, Vol.75, 2073(1999)
下地基板102として面方位が(111)の4インチSi基板(厚さ625μm、p型ドープ)を用い、Si基板上に緩衝層104としてAlN層を150nmの厚さで形成した。当該AlN層上に、第1層112としてAlN層を5nmの厚さで形成し、第2層114としてAl0.15Ga0.85N層を16nmの厚さで形成し、第1単位層116とした。第1単位層116を75層形成して第1超格子層110とした後、接続層120として、AlN層を70nmの厚さで形成した。さらに、第3層132としてAlN層を5nmの厚さで形成し、第4層134としてAl0.1Ga0.9N層を16nmの厚さで形成し、第2単位層136とした。第2単位層136を75層形成して第2超格子層130とした後、デバイス基層142として、GaN層を800nmの厚さで形成し、さらに活性層144として、Al0.2Ga0.8N層を20nmの厚さで形成した。なお、第1超格子層110を形成する際の反応温度を変えて複数種類の半導体基板100を作成した。これにより、炭素原子濃度を、1×1018、5×1018、7×1018、1×1019、6×1019(単位はcm-3)の5水準で変化させた複数の半導体基板100を作成した。第1超格子層110の平均格子定数は、0.316187nmであり、第2超格子層130の平均格子定数は、0.316480nmである。接続層120の平均格子定数は0.311200nmである。
比較例として、以下の比較例1~3を作成した。
[比較例1]:接続層120を設けず、第4層134のAl組成を0.15として第1超格子層110の平均格子定数と第2超格子層130の平均格子定数を同じとし、その他は実施例1と同じにしたもの
[比較例2]:第4層134のAl組成を0.15として第1超格子層110の平均格子定数と第2超格子層130の平均格子定数を同じとし、その他は実施例1と同じにしたもの
[比較例3]:接続層120を設けず、その他は実施例1と同じにしたもの
実施例2の半導体基板は、接続層120の厚さ方向における組成を、第1超格子層110から第2超格子層130に向かってAlNからAl0.3Ga0.7Nまで連続的に変化させた以外は、実施例1と同様に形成した。なお、炭素原子濃度は、1×1019、6×1019(単位はcm-3)の2水準とした。図6は、実施例2の半導体基板の炭素原子濃度に対する反り量と耐電圧を示したグラフである。実施例1との比較がわかりやすいよう、図7を示す。図7は、実施例1および2並びに比較例1から3の半導体基板の炭素原子濃度に対する反り量を示したグラフである。実施例2の半導体基板は、比較例1~3は勿論、実施例1の半導体基板より反り量が低く抑えられていることがわかる。
実施例3の半導体基板は、第1超格子層110における第1単位層116の層数nと第2超格子層130における第2単位層136の層数mを変えた例を示す。炭素原子濃度を1×1019(cm-3)に固定し、層数nと層数mを変化させたこと以外は、実施例1と同様に半導体基板を形成した。層数nおよび層数mは、n/m=75/75、100/50、1/149の3水準とした。図8は、実施例3の半導体基板の反り量と耐電圧を示したグラフである。層数nと層数mとを変化させることで、反り量が制御できることがわかる。
実施例4の半導体基板は、下地基板102としてサファイア基板を用いた場合を示す。下地基板102としてサファイア基板を用い、炭素原子濃度を1×1019(cm-3)に固定し、層数nと層数mを変化させたこと以外は、実施例1と同様に半導体基板を形成した。層数nおよび層数mは、n/m=75/75、50/100の2水準とした。図9は、実施例4の半導体基板の反り量を示したグラフである。下地基板102がサファイア基板の場合であっても、第1超格子層110および第2超格子層130における単位層の層数nおよび層数mを変化することで、反り量を制御できることがわかる。
実施例5は、第4層134であるAlGaN層のAl組成を、0.15から0.10の範囲で変化させた半導体基板の例を示す。炭素原子濃度は、1×1019(cm-3)で固定し、その他は実施例1と同じとした。Al組成は、0.15、0.14、0.13、0.12、0.11、0.10の6水準とした。Al組成の水準が0.10および0.15の場合は、各々、実施例1および比較例2の炭素原子濃度が1×1019(cm-3)の場合に対応するので、Al組成の水準が0.10および0.15の場合の半導体基板として、各々、実施例1および比較例2の炭素原子濃度が1×1019(cm-3)の場合の半導体基板を用いた。Al組成が0.15、0.14、0.13、0.12、0.11および0.10の場合の第2超格子層130の平均格子定数は、各々、0.316187、0.316245、0.316304,0.316363,0.316421および0.316480(単位はnm)である。第1超格子層110の平均格子定数が0.316187nmであることから、Al組成が0.15、0.14、0.13、0.12、0.11および0.10の場合の平均格子定数差(第2超格子層130の平均格子定数-第1超格子層110の平均格子定数)は、各々、0.000000、0.000059、0.000117、0.000176、0.000235および0.000293(単位はnm)である。
Claims (14)
- 下地基板と、第1超格子層と、接続層と、第2超格子層と、窒化物半導体結晶層とを有し、
前記下地基板、前記第1超格子層、前記接続層、前記第2超格子層および前記窒化物半導体結晶層が、前記下地基板、前記第1超格子層、前記接続層、前記第2超格子層、前記窒化物半導体結晶層の順に位置し、
前記第1超格子層が、第1層および第2層からなる第1単位層を複数有し、
前記第2超格子層が、第3層および第4層からなる第2単位層を複数有し、
前記第1層が、Alx1Ga1-x1N(0<x1≦1)からなり、
前記第2層が、Aly1Ga1-y1N(0≦y1<1、x1>y1)からなり、
前記第3層が、Alx2Ga1-x2N(0<x2≦1)からなり、
前記第4層が、Aly2Ga1-y2N(0≦y2<1、x2>y2)からなり、
前記第1超格子層の平均格子定数と前記第2超格子層の平均格子定数とが異なり、
前記第1超格子層および前記第2超格子層から選択された1以上の層に、耐電圧を向上する不純物原子が、7×1018[atoms/cm3]を超える密度で含まれる
半導体基板。 - 前記不純物原子が、C原子、Fe原子、Mn原子、Mg原子、V原子、Cr原子、Be原子およびB原子からなる群から選択された1種以上の原子である
請求項1に記載の半導体基板。 - 前記不純物原子が、C原子またはFe原子である
請求項2に記載の半導体基板。 - 前記接続層が、前記第1超格子層および前記第2超格子層に接する結晶層である
請求項1から請求項3の何れか一項に記載の半導体基板。 - 前記接続層の組成が、前記接続層の厚さ方向において前記第1超格子層から前記第2超格子層へ向かって連続的に変化する
請求項1から請求項4の何れか一項に記載の半導体基板。 - 前記接続層の組成が、前記接続層の厚さ方向において前記第1超格子層から前記第2超格子層に向かって段階的に変化する
請求項1から請求項4の何れか一項に記載の半導体基板。 - 前記接続層が、AlzGa1-zN(0≦z≦1)からなる
請求項1から請求項6の何れか一項に記載の半導体基板。 - 前記接続層の厚さが、前記第1層、前記第2層、前記第3層および前記第4層の何れの層の厚さより大きい
請求項1から請求項7の何れか一項に記載の半導体基板。 - 前記接続層の平均格子定数が、前記第1超格子層および前記第2超格子層のいずれの平均格子定数より小さい
請求項1から請求項8の何れか一項に記載の半導体基板。 - 前記第1超格子層が、前記第1層および前記第2層からなる前記第1単位層を1層~200層有する請求項1から請求項9の何れか一項に記載の半導体基板。
- 前記第2超格子層が、前記第3層および前記第4層からなる前記第2単位層を1層~200層有する請求項1から請求項10の何れか一項に記載の半導体基板。
- 請求項1から請求項11の何れか一項に記載の半導体基板の製造方法であって、
前記第1層および前記第2層を第1単位層とし、前記第1単位層の形成をn回繰り返して前記第1超格子層を形成するステップと、
前記接続層を形成するステップと、
前記第3層および前記第4層を第2単位層とし、前記第2単位層の形成をm回繰り返して前記第2超格子層を形成するステップと、
前記窒化物半導体結晶層を形成するステップと、を有し、
前記第1超格子層を形成するステップおよび前記第2超格子層を形成するステップから選択された1以上のステップにおいて、形成される層の耐電圧を向上する不純物原子が、7×1018[atoms/cm3]を超える密度で含まれるよう当該層を形成する
半導体基板の製造方法。 - 前記窒化物半導体結晶層の組成および厚さに応じ、前記半導体基板の前記窒化物半導体結晶層の表面における反りが50μm以下となるよう、前記第1層~第4層の各組成、前記第1層~第4層の各厚さ、前記第1超格子層における単位層の繰り返し数nおよび前記第2超格子層における単位層の繰り返し数mから選択された1以上のパラメータを調整する
請求項12に記載の半導体基板の製造方法。 - 前記窒化物半導体結晶層の組成および厚さに応じ、前記半導体基板の前記窒化物半導体結晶層の表面における反りが50μm以下となるよう、前記第1超格子層における単位層の繰り返し数nおよび前記第2超格子層における単位層の繰り返し数mを調整する
請求項13に記載の半導体基板の製造方法。
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