WO2012172862A1 - パワー半導体モジュールおよびその製造方法 - Google Patents
パワー半導体モジュールおよびその製造方法 Download PDFInfo
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- WO2012172862A1 WO2012172862A1 PCT/JP2012/060278 JP2012060278W WO2012172862A1 WO 2012172862 A1 WO2012172862 A1 WO 2012172862A1 JP 2012060278 W JP2012060278 W JP 2012060278W WO 2012172862 A1 WO2012172862 A1 WO 2012172862A1
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- Prior art keywords
- power semiconductor
- sealing material
- semiconductor module
- semiconductor element
- copper
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000003566 sealing material Substances 0.000 claims abstract description 78
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 49
- 239000010949 copper Substances 0.000 claims abstract description 49
- 229910052802 copper Inorganic materials 0.000 claims abstract description 49
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000007943 implant Substances 0.000 claims abstract description 19
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 claims description 17
- 239000003063 flame retardant Substances 0.000 claims description 17
- 239000008393 encapsulating agent Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 239000004850 liquid epoxy resins (LERs) Substances 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 abstract description 3
- 239000003779 heat-resistant material Substances 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 2
- 238000000465 moulding Methods 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 239000007788 liquid Substances 0.000 description 7
- 238000001723 curing Methods 0.000 description 6
- 238000007789 sealing Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 150000008065 acid anhydrides Chemical class 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 239000011353 cycloaliphatic epoxy resin Substances 0.000 description 3
- 238000001721 transfer moulding Methods 0.000 description 3
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005187 foaming Methods 0.000 description 1
- 238000001879 gelation Methods 0.000 description 1
- 230000026030 halogenation Effects 0.000 description 1
- 238000005658 halogenation reaction Methods 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000010525 oxidative degradation reaction Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Definitions
- the present invention relates to a power semiconductor module sealing structure, and more particularly to a power semiconductor module using silicon carbide and a method for manufacturing the same.
- FIG. 2 shows a cross-sectional structure diagram of a conventional power semiconductor module.
- a silicon power semiconductor element 25 is soldered to a copper base substrate 23 having an insulating layer 21 and a circuit pattern 22 by a solder layer 24a. Further, the lead frame 27 is soldered by the solder layer 26b, and the external connection terminals 28 are attached.
- the number of silicon power semiconductor elements 25 mounted on the power semiconductor module 200 is determined by the volume of the power semiconductor module 200, and is attached to the copper base substrate 23 having a size matching this volume.
- the sealing material layer 30 is a silicone gel material, which is a two-component mixed reaction material. A predetermined amount of this silicone gel material is weighed, mixed and stirred, defoamed for 10 minutes in a vacuum state of 13.33 Pa (0.1 Torr), and then poured into the case 29. Then, after secondary defoaming for 10 minutes in a vacuum state of 13.33 Pa, heat curing is performed at 120 ° C. for 2 hours, the lid 31 is attached, and the power semiconductor module 200 is completed.
- the power semiconductor module 200 is used by being attached to a cooling fin coated with a heat conductive paste.
- a large current flows through the power semiconductor element 25 and the circuit pattern 22. Therefore, heat generated in the power semiconductor element 25 is transferred from the copper base substrate 23 to the cooling fins via the heat conductive paste 12. It is important to heat and cool.
- silicon carbide Since silicon carbide has superior electrical characteristics compared to silicon, it is assumed that the material of the power semiconductor element will be replaced from silicon to silicon carbide in the future.
- a power semiconductor element made of silicon carbide has superior operating characteristics at high temperatures as compared with silicon. Therefore, when silicon carbide is used for the power semiconductor element, the current density flowing through the power semiconductor element can be increased.
- the amount of heat generation increases, and the temperature near the element of the sealing material for sealing the power semiconductor element becomes high.
- the element temperature is used at about 200 ° C.
- the outer peripheral temperature of the power semiconductor module tends to be lower than the temperature near the element.
- the heat resistance performance of the sealing material in the vicinity of the element is important, and it is important to apply a sealing material having stable performance even in an operating region at a high temperature.
- a sealing material to which aluminum hydroxide or the like is added as a flame retardant is used as a sealing material for a power semiconductor module equipped with a silicon carbide element.
- the sealing material is likely to be thermally deteriorated due to the influence of the flame retardant, and a decrease in heat resistance has been a problem.
- An object of the present invention is to provide a power semiconductor module using a sealing material suitable for the temperature in the vicinity of the element of the power semiconductor module using the silicon carbide element and the temperature of the outer periphery in order to solve the above-described problems. There is to do.
- the above object is An insulating layer; A copper base substrate comprising a first copper block and a second copper block, each fixed to one side and the other side of the insulating layer; A plurality of power semiconductor elements using silicon carbide, one surface of which is fixed onto the first copper block by a conductive bonding layer; A plurality of implant pins fixed to each other surface of the power semiconductor element by a conductive bonding layer; A printed circuit board fixed to the implant pin and disposed opposite the power semiconductor element; A first sealing material which is disposed at least between the power semiconductor element and the printed circuit board and does not add a flame retardant; A second encapsulant added with a flame retardant, disposed to cover the first encapsulant; Is achieved.
- the thermal deformation temperature of the first sealing material is preferably 175 ° C. to 225 ° C. Further, it is preferable that the thermal expansion coefficient of the first sealing member is 1.5 ⁇ 10 -5 /°C ⁇ 1.8 ⁇ 10 -5 / °C . Furthermore, the adhesion strength of the first sealing material to the copper base substrate is preferably 10 MPa to 30 MPa. Further, the heat deformation temperature of the second sealing material is preferably 100 ° C. to 175 ° C. It is preferred thermal expansion coefficient of the second sealing member is 1.5 ⁇ 10 -5 /°C ⁇ 1.8 ⁇ 10 -5 / °C .
- the adhesion strength of the second sealing material to the copper base substrate is preferably 10 MPa to 30 MPa. It is preferable to use a liquid epoxy resin for the first sealing material and the second sealing material.
- a step of preparing an insulating layer Preparing a copper base substrate comprising a first copper block and a second copper block on one surface and the other surface of the insulating layer, respectively; Fixing one surface of the plurality of power semiconductor elements using silicon carbide on the first copper block with a conductive bonding layer; Fixing a plurality of implant pins to the other surface of each of the power semiconductor elements with a conductive bonding layer; Arranging the printed circuit board so as to be fixed to the implant pin and facing the power semiconductor element; Filling a first encapsulant not adding a flame retardant between at least the power semiconductor element and the printed circuit board; Disposing a second sealing material added with a flame retardant so as to cover the first sealing material; It shall have.
- the sealing material which does not add a flame retardant as a 1st sealing material, heat resistance can be improved, By using the sealing material which added the flame retardant as a 2nd sealing material Although the heat resistance is inferior to that in the case where no flame retardant is added, the temperature is lower than that around the element, so that a power semiconductor module free from problems can be provided.
- FIG. 1 is a cross-sectional structure diagram of a molded structure of a silicon carbide power semiconductor module according to an embodiment of the present invention.
- a method for manufacturing a molded structure of a silicon carbide power semiconductor module will be described with reference to FIG.
- a plurality of silicon carbide power semiconductor elements 6 are mounted on and attached to the upper surface of a copper base substrate 4 in which the copper block 2 and the copper block 3 are disposed on both surfaces of the insulating layer 1, and further, silicon carbide.
- An implant type printed circuit board 9 having an implant pin 8 is attached to the upper surface of the power semiconductor element 6 by a conductive bonding layer 7b.
- the size of the implant pin 8 is, for example, a diameter of 120 ⁇ m and a length of 300 ⁇ m, and about 11 pieces at the maximum are arranged for each power semiconductor element 6.
- the implant pin 8 is fixed to a conductive pattern (not shown) of the printed board 9.
- the distance between the printed circuit board 9 and the copper block 3 is about 1 mm, and is about 200 ⁇ m at the narrowest place.
- the printed circuit board 9 is made of, for example, an epoxy resin or a polyimide resin.
- an external connection terminal 10 is attached, and a first sealing material 11 is injected and formed by a dispenser in the vicinity of the silicon carbide power semiconductor element 6 between the copper base substrate 4 and the implant-type printed circuit board 9. And the silicon carbide power semiconductor module molded structure 100 is completed.
- the sealing material injection method of the first sealing material 11 is a position near the silicon carbide power semiconductor element 6 between the copper base substrate 4 and the implant type printed circuit board 9. In addition, it is formed by injection using a dispenser.
- the first sealing material 11 is a mixed composition of a cycloaliphatic epoxy resin and an acid anhydride curing agent, and is a one-liquid type molded seal containing 85 wt% of silica filler. It is a liquid sealing material in a state where a flame retardant is not added.
- the curing condition of the first sealing material 11 is 100 ° C. and 1 hour. Regarding the physical properties of the cured material, the thermal deformation temperature of the first sealing material 11 is 225 ° C., the thermal expansion coefficient is 1.5 ⁇ 10 ⁇ 5 / ° C., and the adhesive strength to the copper base substrate 4 is 23 MPa.
- the material properties of the first sealing material 11 will be described.
- the thermal deformation temperature of the sealing material 11 is 175 ° C. to 225 ° C.
- the inflection point with respect to the thermal characteristics of the sealing material 11 increases, Since an increase in thermal resistance due to fatigue can be prevented, a power semiconductor module with high heat resistance and high reliability can be obtained.
- the temperature of the power semiconductor element is about 200 ° C.
- the thermal deformation temperature of the encapsulant 11 needs to be at least 175 ° C.
- the upper limit of the heat distortion temperature is 225 ° C. with a margin.
- the thermal expansion coefficient of the sealing material 11 is equivalent to the thermal expansion coefficient of copper, the warp of the copper base substrate 4 including the insulating layer 1 and the copper blocks 2 and 3, and the upper and lower sides of the power semiconductor element 6.
- the increase in thermal resistance due to thermal fatigue of the conductive bonding layers 5a and 7b can be prevented, and a highly reliable power semiconductor module can be provided.
- the power semiconductor element 6 can be firmly bonded to the copper base substrate 4 because the adhesion strength of the sealing material 11 to the copper blocks 2 and 3 is 10 MPa to 30 MPa, An increase in the thermal resistance of the bonding layers 5a and 7b can be prevented, and a highly reliable power semiconductor module can be provided. Therefore, it is confirmed that the power semiconductor device of the present invention has high reliability in load tests such as a power cycle and a heat shock test. In the heat shock test, the tendency of the warp of the copper base substrate 4 and the thermal resistance of the power semiconductor module to increase with an increase in the number of cycles is small.
- the method of sealing the silicon carbide power semiconductor unit 100 with the second sealing material 12 is housed in a cavity formed by an upper and lower mold (not shown) for liquid transfer molding, and the molding temperature is raised to 160 ° C. Wait in the warm state.
- the upper and lower molds for transfer molding are provided with a pot portion and a runner portion of the second sealing material 12.
- the cavity, the pot portion, and the runner portion are provided in the upper and lower molds, the pot for storing the resin, the cavity for storing the power semiconductor element 6 to be sealed with the resin, and the pot. It is a runner that is a path for the resin to guide the resin to the cavity.
- the second sealing material 12 is a mixed composition of a cycloaliphatic epoxy resin and an acid anhydride curing agent, with a silica filler of 85 wt% and aluminum hydroxide as a flame retardant. 1 liquid type molding sealing material.
- the thermal deformation temperature of the encapsulant is 175 ° C.
- the thermal expansion coefficient is 1.5 ⁇ 10 ⁇ 5 / ° C.
- the adhesive strength to the first encapsulant is 20 MPa.
- the material properties of the second sealing material 12 are basically the same as those of the first sealing material 11.
- the heat deformation temperature since the temperature of the power semiconductor element 6 is about 200 ° C., the temperature in the vicinity of the element is high. Therefore, the heat deformation temperature of about the first sealing material 11 is required, but the outside of the element is Since the temperature is not so high, not much heat resistance is required, and a relatively inexpensive sealing material can be used. Therefore, the upper limit of the thermal deformation temperature of the sealing material 12 is set to 175 ° C., which is the lower limit of the thermal deformation temperature of the sealing material 11, because the temperature of the power semiconductor element 6 is about 200 ° C. The lower limit of the heat deformation temperature of 12 is set to 100 ° C. because heat is not transmitted so much to the sealing material 12.
- the thermal expansion coefficient is matched to the thermal expansion coefficient of copper. In this way, the thermal expansion coefficients of the first sealing material 11 and the second sealing material 12 are equal, so that the module as a whole is not subjected to non-uniform stress and moves in the same way.
- the adhesive strength is also about the same as the first sealing material. If it is 30 MPa or more, the strength of the sealing material itself is the limit, and if it is 10 MPa or less, the adhesion between the sealing material and copper is weakened, and the device does not have the power to peel off and guard the element.
- one liquid type molding sealing material comprising a cycloaliphatic epoxy resin and an acid anhydride curing agent is preliminarily removed for 10 minutes in a vacuum state of 13.33 Pa in advance. After foaming, inject into the cylinder container. After that, the required amount is injected from the cylinder container into the pot part in the mold, and then the upper and lower molds are clamped, and the molding sealing material is pressed into the mold cavity from the pot part via the runner part. Then, the molding of the silicon carbide power semiconductor module is completed.
- the molding conditions are such that the clamping pressure of the upper and lower molds is 150 kg / cm 2 (14.7 MPa), the gelation time at 160 ° C. is 1 minute, and the curing time is 3 minutes.
- the second sealing material 12 can be filled, and at the same time, molding can be performed in a short time, and a power semiconductor module with high productivity and reliability can be provided.
- the first sealing material 11 disposed in the vicinity of the element since it is not in direct contact with air, the heat resistance performance is improved by using a sealing material to which no flame retardant is added from the situation where oxidation degradation is small. Can do.
- the second sealing material 12 since it is in direct contact with air at the outer periphery of the power semiconductor module, a structure resistant to oxidative degradation is provided by using a sealing material to which a flame retardant is added. Can do.
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Abstract
Description
パワー半導体モジュール200の動作時は、パワー半導体素子25や回路パターン22に大電流が流れるため、パワー半導体素子25で発生した熱を、銅ベース基板23から熱伝導ペースト12を介して冷却フィンに伝熱し冷却することが大切となる。
炭化シリコン素子を搭載したパワー半導体モジュールの封止材には、ノンハロゲン化に対応するため、難燃剤として、水酸化アルミニウム等を添加した封止材が使用される。しかしこの場合、封止材は、難燃剤の影響で熱劣化し易くなり、耐熱性の低下が問題であった。
絶縁層と、
前記絶縁層の一方の面と他方の面にそれぞれ固着された、第1銅ブロックと第2銅ブロックとを備える銅ベース基板と、
前記第1銅ブロックの上にその一方の面が導電接合層により固着された、炭化シリコンを用いた複数のパワー半導体素子と、
前記パワー半導体素子のそれぞれの他方の面に導電接合層により固着された複数のインプラントピンと、
前記インプラントピンに固着され、パワー半導体素子に対向して配置されたプリント基板と、
少なくともパワー半導体素子とプリント基板との間に配置された、難燃剤を添加しない第1の封止材と、
前記第1の封止材を覆うように配置された、難燃剤を添加した第2の封止材と、
を備えることにより達成される。
ここで、第1の封止材の熱変形温度が、175℃~225℃であることが好ましい。
また、第1の封止材の熱膨張係数が1.5×10-5/℃~1.8×10-5/℃であることが好ましい。
さらに、第1の封止材の銅ベース基板に対する接着強さが10MPa~30MPaであることが好ましい。
また、第2の封止材の熱変形温度が100℃~175℃であることが好ましい。
第2の封止材の熱膨張係数が1.5×10-5/℃~1.8×10-5/℃であることが好ましい。
第1の封止材ならびに第2の封止材に液状エポキシ樹脂を用いることが好ましい。
絶縁層を用意する工程と、
前記絶縁層の一方の面と他方の面にそれぞれ第1銅ブロックと第2銅ブロックを備える銅ベース基板を用意する工程と、
前記第1の銅ブロックの上に炭化シリコンを用いた複数のパワー半導体素子の一方の面を導電接合層により固着する工程と、
前記パワー半導体素子のそれぞれの他方の面に複数のインプラントピンを導電接合層により固着する工程と、
前記インプラントピンに固着されパワー半導体素子に対向するようにプリント基板を配置する工程と、
少なくともパワー半導体素子とプリント基板との間に難燃剤を添加しない第1の封止材を充填する工程と、
前記第1の封止材を覆うように難燃剤を添加した第2の封止材を配置する工程と、
を有することとする。
[実施例]
図1は、本発明の実施例である炭化シリコンパワー半導体モジュールの成形構造体の断面構造図である。
絶縁層1の両面に銅ブロック2と銅ブロック3とを配置した銅ベース基板4の上面に、導電接合層5aにより炭化シリコンパワー半導体素子6が複数個、搭載されて取り付けられ、さらに、炭化シリコンパワー半導体素子6の上面に導電接合層7bにより、インプラントピン8を有するインプラント方式のプリント基板9が取り付けられる。
さらに外部接続端子10を取り付け、銅ベース基板4とインプラント方式のプリント基板9の間の炭化シリコンパワー半導体素子6の近傍に第1の封止材11をディスペンサーにより注入形成し、図示しない金型内に載置して、第2の封止材12により封止され、炭化シリコンパワー半導体モジュール成形構造体100が完成する。
硬化後の材料物性は、第1の封止材11の熱変形温度が225℃で、熱膨張係数が1.5×10-5/℃、銅ベース基板4に対する接着強さが23MPaである。
封止材11の熱変形温度が、175℃から225℃であると、封止材11の熱特性に対する変曲点が高くなり、パワー半導体素子6の上下の導電接合層5a、7bの、熱疲労による熱抵抗の増大を防止できるので、耐熱性能が高く、信頼性の高い、パワー半導体モジュールを得ることができる。パワー半導体素子の温度は、200℃程度になるので、封止材11の熱変形温度は最低でも175℃が必要である。熱変形温度の上限は、余裕を持って225℃としている。
第2の封止材12の材料物性は基本的には第1の封止材11と同様である。
2 銅ブロック
3 銅ブロック
4 銅ベース基板
5a 導電接合層
6 炭化シリコン半導体素子
7b 導電接合層
8 インプラントピン
9 インプラント方式プリント基板
10 外部端子
11 第1の封止材
12 第2の封止材
13 取付け金具
100 炭化シリコン半導体パワーモジュール成形構造体
21 絶縁層
22 回路パターン
23 銅ベース基板
24a 半田層
25 シリコンパワー半導体素子
26b 半田層
27 リードフレーム
28 外部接続端子
29 ケース
30 封止材
31 フタ
200 シリコンパワー半導体モジュール構造体
Claims (9)
- 絶縁層と、
前記絶縁層の一方の面と他方の面にそれぞれ固着された、第1銅ブロックと第2銅ブロックとを備える銅ベース基板と、
前記第1銅ブロックの上にその一方の面が導電接合層により固着された、炭化シリコンを用いた複数のパワー半導体素子と、
前記パワー半導体素子のそれぞれの他方の面に導電接合層により固着された複数のインプラントピンと、
前記インプラントピンに固着され、パワー半導体素子に対向して配置されたプリント基板と、
少なくともパワー半導体素子とプリント基板との間に配置された、難燃剤を添加しない第1の封止材と、
前記第1の封止材を覆うように配置された、難燃剤を添加した第2の封止材と、
を備えることを特徴とするパワー半導体モジュール。 - 第1の封止材の熱変形温度が、175℃~225℃であることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第1の封止材の熱膨張係数が1.5×10-5/℃~1.8×10-5/℃であることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第1の封止材の銅ベース基板に対する接着強さが10MPa~30MPaであることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第2の封止材の熱変形温度が100℃~175℃であることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第2の封止材の熱膨張係数が1.5×10-5/℃~1.8×10-5/℃であることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第2の封止材の銅ベース基板に対する接着強さが、10MPa~30MPaであることを特徴とする請求項1に記載のパワー半導体モジュール。
- 第1の封止材ならびに第2の封止材に液状エポキシ樹脂を用いることを特徴とする請求項1に記載のパワー半導体モジュール。
- 絶縁層を用意する工程と、
前記絶縁層の一方の面と他方の面にそれぞれ第1銅ブロックと第2銅ブロックを備える銅ベース基板を用意する工程と、
前記第1の銅ブロックの上に炭化シリコンを用いた複数のパワー半導体素子の一方の面を導電接合層により固着する工程と、
前記パワー半導体素子のそれぞれの他方の面に複数のインプラントピンを導電接合層により固着する工程と、
前記インプラントピンに固着されパワー半導体素子に対向するようにプリント基板を配置する工程と、
少なくともパワー半導体素子とプリント基板との間に難燃剤を添加しない第1の封止材を充填する工程と、
前記第1の封止材を覆うように難燃剤を添加した第2の封止材を配置する工程と、
を有することを特徴とするパワー半導体モジュールの製造方法。
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WO2015037349A1 (ja) * | 2013-09-13 | 2015-03-19 | 富士電機株式会社 | 半導体装置 |
JP2015207632A (ja) * | 2014-04-18 | 2015-11-19 | 富士電機株式会社 | 半導体装置およびその製造方法 |
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JP6167535B2 (ja) * | 2013-01-30 | 2017-07-26 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
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EP2980843B1 (en) * | 2013-03-29 | 2019-04-24 | Mitsubishi Materials Corporation | Power module |
JP6171586B2 (ja) * | 2013-06-04 | 2017-08-02 | 富士電機株式会社 | 半導体装置 |
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JP2018170362A (ja) * | 2017-03-29 | 2018-11-01 | 株式会社東芝 | 半導体モジュール |
US11482462B2 (en) | 2017-08-25 | 2022-10-25 | Mitsubishi Electric Corporation | Power semiconductor device with first and second sealing resins of different coefficient of thermal expansion |
JP6860453B2 (ja) * | 2017-09-11 | 2021-04-14 | 株式会社東芝 | パワー半導体モジュール |
CN109727925A (zh) * | 2017-10-31 | 2019-05-07 | 华润微电子(重庆)有限公司 | 一种提高塑封模块可靠性的封装结构及方法 |
JP6827404B2 (ja) | 2017-11-30 | 2021-02-10 | 三菱電機株式会社 | 半導体装置および電力変換装置 |
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