WO2011048834A1 - 試験用キャリア - Google Patents
試験用キャリア Download PDFInfo
- Publication number
- WO2011048834A1 WO2011048834A1 PCT/JP2010/057898 JP2010057898W WO2011048834A1 WO 2011048834 A1 WO2011048834 A1 WO 2011048834A1 JP 2010057898 W JP2010057898 W JP 2010057898W WO 2011048834 A1 WO2011048834 A1 WO 2011048834A1
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- WIPO (PCT)
- Prior art keywords
- test carrier
- film
- conductive path
- present
- wiring pattern
- Prior art date
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2891—Features relating to contacting the IC under test, e.g. probe heads; chucks related to sensing or controlling of force, position, temperature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49131—Assembling to base an electrical component, e.g., capacitor, etc. by utilizing optical sighting device
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
- Y10T29/53183—Multilead component
Definitions
- the present invention relates to a test carrier on which a die chip is temporarily mounted in order to test an electronic circuit element such as an integrated circuit element formed on the die chip.
- test carrier On which a semiconductor chip in a bare chip state is temporarily mounted, a test carrier in which a semiconductor chip is sandwiched between a lid and a base in an atmosphere reduced in pressure compared to outside air is known (for example, see Patent Document 1). ).
- a wiring pattern corresponding to the electrode of the semiconductor chip is formed on the lid of the test carrier, and the semiconductor chip is connected to an external test apparatus via the wiring pattern.
- the problem to be solved by the present invention is to provide a test carrier that can cope with a wide variety of electronic components and is excellent in productivity.
- a test carrier according to the present invention is a test carrier provided with a first member and a second member sandwiching an electronic component, and the first member is a pre-formed first carrier.
- One of the first member and the second member is first so that a second conductive path electrically connected to the first conductive path is formed by printing. It has the printing area
- the first member includes a first film
- the second member includes a second film facing the first film
- the first printing is performed.
- the region may be provided in one of the first film and the second film
- the electronic component may be interposed between the first film and the second film.
- the first conductive path may be connected to an external terminal provided in the first film.
- the first member further includes a first frame in which a first opening is formed at a center and the first film is attached.
- One conductive path may be connected to an external terminal provided in the first frame.
- the second member may further include a second frame in which a second opening is formed at a center and the second film is attached.
- the first member includes a plate-shaped rigid plate
- the second member includes a film facing the rigid plate
- the first printing area includes It may be provided on one of the rigid plate and the film
- the electronic component may be interposed between the rigid plate and the film.
- the first conductive path may be connected to an external terminal provided on the rigid plate.
- the second member may further include a frame in which an opening is formed in the center and the film is attached.
- the first member includes a film
- the second member includes a flat rigid plate facing the film
- the first printing region includes the film.
- the electronic component may be provided on one of the rigid plates, and the electronic component may be interposed between the film and the rigid plate.
- the first conductive path may be connected to an external terminal provided on the film.
- the first member further includes a frame having an opening formed at a center and the film attached thereto, and the first conductive path is formed on the frame. You may connect to the provided external terminal.
- the first member has the first printing region
- the second member has a third conductive path formed in advance, and the third conductive path and the electric And a fourth printed area to be formed by printing.
- one of the first member and the second member is formed on the second conductive path and a portion corresponding to an outline of the electronic component in the second conductive path. And an insulating layer.
- the second conductive path may have a pad in contact with an electrode of the electronic component.
- the electronic component may be a die diced from a semiconductor wafer.
- an accommodation space that is formed between the first member and the second member and accommodates the electronic component may be depressurized compared to outside air.
- the second conductive path is printed in the first printing region, it is possible to deal with a wide variety of electronic components with a single test carrier.
- the second conductive path is shortened by forming the first conductive path in advance, the printing time of the second conductive path can be shortened. Productivity can be improved.
- FIG. 1 is a flowchart showing a part of a device manufacturing process in the first embodiment of the present invention.
- FIG. 2 is an exploded perspective view of the test carrier in the first embodiment of the present invention.
- FIG. 3 is a cross-sectional view of the test carrier in the first embodiment of the present invention.
- FIG. 4 is an exploded cross-sectional view of the test carrier in the first embodiment of the present invention.
- FIG. 5 is an enlarged view of a portion V in FIG.
- FIG. 6 is a plan view showing the base member of the test carrier in the first embodiment of the present invention.
- FIG. 7 is an exploded perspective view showing a first modification of the test carrier in the first embodiment of the present invention.
- FIG. 1 is a flowchart showing a part of a device manufacturing process in the first embodiment of the present invention.
- FIG. 2 is an exploded perspective view of the test carrier in the first embodiment of the present invention.
- FIG. 3 is a cross-sectional view of the test carrier in the first embodiment
- FIG. 8 is an exploded perspective view showing a second modification of the test carrier in the first embodiment of the present invention.
- FIG. 9 is an exploded perspective view showing a third modification of the test carrier in the first embodiment of the present invention.
- FIG. 10 is an exploded perspective view showing a fourth modification of the test carrier in the first embodiment of the present invention.
- FIG. 11 is an exploded perspective view showing a fifth modification of the test carrier in the first embodiment of the present invention.
- FIG. 12 is an exploded perspective view showing a sixth modification of the test carrier in the first embodiment of the present invention.
- FIG. 13 is a cross-sectional view showing a test carrier in the second embodiment of the present invention.
- FIG. 14 is a cross-sectional view showing a test carrier in the third embodiment of the present invention.
- FIG. 15 is a cross-sectional view showing a test carrier in the fourth embodiment of the present invention.
- FIG. 16 is a cross-sectional view showing a test carrier in the fifth embodiment of the present invention.
- FIG. 17 is a sectional view showing a test carrier in the sixth embodiment of the present invention.
- FIG. 18 is a cross-sectional view showing a test carrier in the seventh embodiment of the present invention.
- FIG. 19 is a sectional view showing a test carrier in the eighth embodiment of the present invention.
- FIG. 1 is a flowchart showing a part of a device manufacturing process in the first embodiment of the present invention.
- step S10 in FIG. 1 after dicing the semiconductor wafer (after step S10 in FIG. 1) and before final packaging (before step S50), an electronic circuit such as an integrated circuit element built in the die 90 is provided.
- the element is tested (steps S20 to S40).
- the die 90 is temporarily mounted on the test carrier 10 (step S20).
- the electronic circuit element formed on the die 90 is tested by electrically connecting the die 90 to a test apparatus (not shown) via the test carrier 10 (step S30).
- the test carrier 10 is disassembled, the die 90 is taken out from the carrier 10 (step S40), and the die 90 is fully packaged to complete the device as a final product.
- test carrier 10 on which the die 90 is temporarily mounted temporary packaging in the present embodiment
- FIGS. 7 to 12 are modified examples of the test carrier in the present embodiment. It is sectional drawing shown.
- the test carrier 10 in this embodiment includes a base member 20A on which the die 90 is placed and a cover member 50A that covers the base member 20A.
- the test carrier 10 holds the die 90 by sandwiching the die 90 between the base member 20A and the cover member 50A in a state where the pressure is lower than the atmospheric pressure.
- the base member 20 ⁇ / b> A includes a base frame 30 and a base film 40.
- the base frame 30 is a rigid plate having high rigidity (at least higher rigidity than the base film 40 and the cover film 70) and having an opening 31 formed in the center.
- the base frame 30 is made of, for example, polyamideimide resin, ceramics, glass, or the like.
- the base film 40 is a flexible film and is attached to the entire surface of the base frame 30 including the central opening 31 via an adhesive (not shown). In this embodiment, since the highly rigid base frame 30 is affixed to the flexible base film 40, the handling property of the base member 20A is improved.
- the base film 40 includes a base layer 42 on which a first wiring pattern 41 is formed, and a cover layer 43 that covers the base layer 42. Both the base layer 42 and the cover layer 43 of the base film 40 are made of a polyimide film or the like.
- the first wiring pattern 41 is formed in advance by, for example, etching a copper foil laminated on the base layer 42.
- a second wiring pattern 44 is formed on the surface of the cover layer 43 by ink jet printing.
- the second wiring pattern 44 is printed in real time by a wiring forming apparatus (not shown) immediately before the die 90 is mounted on the base member 20A.
- the second wiring pattern 44 may be formed by, for example, laser printing instead of inkjet printing. Further, the first wiring pattern 41 in the present embodiment corresponds to an example of the first conductive path in the present invention, and the second wiring pattern 44 in the present embodiment corresponds to an example of the second conductive path in the present invention. To do.
- one end of the first wiring pattern 41 is connected to the external terminal 45 through the through hole 431 of the cover layer 43.
- the external terminal 45 comes into contact with a contact pin of a test apparatus.
- the other end of the first conductive pattern 41 is connected to one end of the second wiring pattern 44 through the through hole 432 of the cover layer 43.
- the second wiring pattern 44 has a pad 44 at the other end.
- An electrode 91 of the die 90 is connected to the pad 441.
- the insulating layer 47 is formed on the base film 40 at a portion corresponding to the edge (contour) of the die 90.
- the insulating layer 47 is made of, for example, a solder resist and has electrical insulation.
- the second wiring pattern 44 can be formed in real time by ink jet printing according to the arrangement of the electrodes 91 of the die 90, a wide variety of dies can be formed with one test carrier 10. 90.
- the base member 20 ⁇ / b> A includes the first region 21 in which the first wiring pattern 41 is formed in advance and the second wiring pattern 44 is inkjet printed. And a second region 22 formed in real time.
- the second area 22 in the present embodiment corresponds to an example of the first print area in the present invention.
- the position of the pad and the position of the external terminal are not particularly limited, and may be configured as shown in FIGS. 7 to 11 described below, or may be a combination of these.
- the second wiring pattern 44 including the pad 441 is formed on the base film 40 by inkjet printing, and the second wiring pattern 44 and the external terminal 32 are connected.
- the conductive path 46 may be formed in the base film 40 and the base frame 30 in advance.
- the conductive path 46 in this example includes a first wiring pattern 41 formed in advance in the base film 40 and a through hole 33 formed in advance in the base frame 30.
- the through hole 33 electrically connects the first wiring pattern 41 and the external terminal 32.
- the second wiring pattern 44 corresponds to an example of the second conductive path in the present invention
- the conductive path 46 corresponds to an example of the first conductive path in the present invention.
- the pads 441 may be formed on the upper surface of the base film 40 and the external terminals 45 may be formed on the lower surface of the base film 40.
- the second wiring pattern 74 including the pad 741 is formed on the cover film 70 by ink jet printing, and the second wiring pattern 74 and the external terminal 62 are connected.
- the conductive path 76 may be formed in the cover film 70 and the cover frame 60 in advance.
- the conductive path 76 in this example includes a first wiring pattern 71 formed in advance on the cover film 70 and a through hole 63 formed in advance on the cover frame 60.
- the through hole 63 electrically connects the first wiring pattern 71 and the external terminal 62.
- the second wiring pattern 74 corresponds to an example of the second conductive path in the present invention
- the conductive path 76 corresponds to an example of the first conductive path in the present invention.
- the second wiring pattern 74 is formed on the lower surface of the cover film 70 by ink jet printing, and the conductive path 46 that connects the second wiring pattern 74 and the external terminal 32. May be formed in advance on the base film 40 and the base frame 30.
- the conductive path 46 in this example includes a first wiring pattern 41 formed in advance in the base film 40 and a through hole 33 formed in advance in the base frame 30.
- the through hole 33 electrically connects the first wiring pattern 41 and the external terminal 32.
- the second wiring pattern 74 corresponds to an example of the second conductive path in the present invention
- the conductive path 46 corresponds to an example of the first conductive path in the present invention.
- a wiring pattern that is formed on the base film 40 by ink jet printing and that connects the first wiring pattern 41 and the second wiring pattern 74 may be further provided.
- pads 441 and 741 are formed on both the base film 40 and the cover film 70 as in the fifth modification shown in FIG. 32 and 62 may be formed on both the base frame 30 and the cover frame 60.
- the cover member 50A includes a cover frame 60 and a cover film 70.
- the cover frame 60 is a rigid substrate having high rigidity (at least higher rigidity than the base film 40 and the cover film 70) and having an opening 61 formed in the center.
- the cover frame 60 is made of, for example, polyamideimide resin, ceramics, glass, or the like.
- the cover film 70 is a flexible film and is attached to the entire surface of the cover frame 60 including the central opening 61 via an adhesive (not shown).
- the cover film 70 is made of, for example, a polyimide film.
- test carrier 10 described above is assembled as follows.
- the die 90 is placed on the base film 40 of the base member 20 ⁇ / b> A with the electrode 91 aligned with the pad 441.
- the cover member 50A is overlaid on the base member 20A, and the die 90 is sandwiched between the base member 20A and the cover member 50A. At this time, the cover member 50A is stacked on the base member 20A so that the base film 40 and the cover film 70 are in direct contact with each other.
- test carrier 10 is returned to the atmospheric pressure environment while the die 90 is sandwiched between the base member 20A and the cover member 50A, whereby the housing formed between the base member 20A and the cover member 50A is accommodated.
- a die 90 is held in the space 11 (see FIG. 3).
- the electrode 91 of the die 90 and the pad 441 of the base film 40 are not fixed with solder or the like.
- the die 90 is pressed by the base film 40 and the cover film 70, and the electrode 91 of the die 90 and the pad 441 of the base film 40 are mutually connected. Touching.
- the base member 20 ⁇ / b> A and the cover member 50 ⁇ / b> A are fixed to each other by an adhesive portion 80 in order to maintain the airtightness of the accommodation space 11.
- the adhesive 81 that constitutes the adhesive portion 80 include an ultraviolet curable adhesive.
- the adhesive 81 is applied to the base member 20A at a position facing the outer periphery of the cover member 50A. Then, after covering the base member 20A with the cover member 50A, the adhesive portion 80 is formed by irradiating the adhesive 81 with ultraviolet rays and curing the adhesive 81. Note that an adhesive may not be used when the close contact between the base member 20A and the cover member 50A can be ensured only by decompression.
- the cover member 50A is overlaid on the base member 20A so that the base frame 30 and the cover frame 60 are in direct contact as in the sixth modification shown in FIG. Also good.
- FIG. 13 shows a test carrier in the second embodiment of the present invention.
- the configuration of the base member is different from that of the first embodiment (see FIG. 3), but other configurations are the same as those of the first embodiment.
- differences between the test carrier in the second embodiment and the first embodiment will be described, and portions having the same configuration as in the first embodiment will be denoted by the same reference numerals and description thereof will be omitted.
- the base member 20 ⁇ / b> B in the present embodiment has only high rigidity (at least higher rigidity than the cover film 70), but is composed only of a flat rigid plate that does not have a central opening.
- the base member 20B is made of, for example, a polyamideimide resin, ceramics, glass, or the like.
- a first wiring pattern is formed in advance on the base member 20B, and a second wiring pattern is formed on the base member 20B in real time by ink jet printing.
- the first wiring pattern can be formed on the base member 20B by configuring the base member 20B with, for example, a single-layer or multilayer printed wiring board.
- the second wiring pattern is formed in real time on the base member 20B by ink jet printing, a single test carrier can be used for various types of dies.
- the base member 20B since the base member 20B has the first wiring pattern formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. And the productivity of the test carrier can be improved.
- the cover member 50 ⁇ / b> A is stacked on the base member 20 ⁇ / b> B so that the cover film 70 and the base member 20 ⁇ / b> B are in direct contact with each other.
- the cover member 50A may be stacked on the base member 20B so that the cover frame 60 and the base member 20B are in direct contact with each other.
- FIG. 14 is a view showing a test carrier in the third embodiment of the present invention.
- the configuration of the cover member is different from that of the first embodiment (see FIG. 3), but the other configurations are the same as those of the first embodiment.
- differences between the test carrier in the second embodiment and the first embodiment will be described, and portions having the same configuration as in the first embodiment will be denoted by the same reference numerals and description thereof will be omitted.
- the cover member 50 ⁇ / b> B in the present embodiment has only high rigidity (at least higher rigidity than the base film 40), but is composed only of a flat rigid plate having no central opening.
- the cover member 50B is made of, for example, polyamideimide resin, ceramics, glass, or the like.
- the second wiring pattern 44 is formed in real time on the base member 20A by inkjet printing, a single test carrier can be used for various types of dies.
- the base member 20A since the base member 20A has the first wiring pattern 41 formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. The productivity of the test carrier can be improved.
- the cover member 50 ⁇ / b> B is stacked on the base member 20 ⁇ / b> A so that the base film 40 and the cover member 50 ⁇ / b> B are in direct contact with each other, but is not particularly limited thereto.
- the cover member 50B may be stacked on the base member 20A so that the base frame 30 and the cover member 50B are in direct contact with each other.
- FIG. 15 is a view showing a test carrier in the fourth embodiment of the present invention.
- the configuration of the cover member is different from that of the first embodiment (see FIG. 3), but the other configurations are the same as those of the first embodiment.
- the differences from the first embodiment of the test carrier in the fourth embodiment will be described, and portions having the same configuration as in the first embodiment will be denoted by the same reference numerals and description thereof will be omitted.
- the cover member 50 ⁇ / b> C in the present embodiment is composed only of a flexible film.
- the cover member 50C is made of, for example, a polyimide film.
- the second wiring pattern 44 is formed in real time on the base member 20A by inkjet printing, a single test carrier can be used for various types of dies.
- the base member 20A since the base member 20A has the first wiring pattern 41 formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. The productivity of the test carrier can be improved.
- the cover member 50 ⁇ / b> C is stacked on the base member 20 ⁇ / b> A so that the base film 40 and the cover member 50 ⁇ / b> C are in direct contact with each other, but the present invention is not particularly limited thereto.
- the cover member 50C may be stacked on the base member 20A so that the base frame 30 and the cover member 50C are in direct contact with each other.
- FIG. 16 is a view showing a test carrier in the fifth embodiment of the present invention.
- the configuration of the base member is different from that of the first embodiment (see FIG. 3), but other configurations are the same as those of the first embodiment.
- the differences from the first embodiment of the test carrier in the fifth embodiment will be described, and portions having the same configuration as in the first embodiment will be denoted by the same reference numerals and description thereof will be omitted.
- the base member 20C in the present embodiment is composed only of a flexible film.
- the base member 20C is made of, for example, a polyimide film.
- a first wiring pattern is formed in advance on the base member 20C, and a second wiring pattern is formed on the base member 20C in real time by inkjet printing.
- the second wiring pattern is formed in real time on the base member 20C by ink jet printing, a single test carrier can be used for various types of dies.
- the base member 20C since the base member 20C has the first wiring pattern formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. And the productivity of the test carrier can be improved.
- the cover member 50 ⁇ / b> A is stacked on the base member 20 ⁇ / b> C so that the base member 20 ⁇ / b> C and the cover film 70 are in direct contact with each other, but the invention is not particularly limited thereto.
- the cover member 50A may be stacked on the base member 20C so that the base member 20C and the cover frame 60 are in direct contact.
- FIG. 17 is a view showing a test carrier in the sixth embodiment of the present invention.
- the configuration of the cover member is different from that of the second embodiment (see FIG. 13), but other configurations are the same as those of the second embodiment. Only the differences from the second embodiment will be described below for the test carrier in the sixth embodiment, and the same reference numerals are given to the parts having the same configuration as in the second embodiment, and the description will be omitted.
- the cover member 50 ⁇ / b> C in the present embodiment is composed only of a flexible film.
- the cover member 50C is made of, for example, a polyimide film.
- the second wiring pattern is formed in real time on the base member 20B by ink jet printing, a single test carrier can be used for various types of dies.
- the base member 20B since the base member 20B has the first wiring pattern formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. And the productivity of the test carrier can be improved.
- FIG. 18 is a view showing a test carrier in the seventh embodiment of the present invention.
- the configuration of the cover member is different from that of the fifth embodiment (see FIG. 16), but other configurations are the same as those of the fifth embodiment. Only the differences from the fifth embodiment of the test carrier in the seventh embodiment will be described below, and portions having the same configuration as in the fifth embodiment will be denoted by the same reference numerals and description thereof will be omitted.
- the cover member 50B in the present embodiment has only high rigidity (at least higher rigidity than the base member 20C), but is composed only of a flat rigid plate having no central opening.
- the cover member 50B is made of, for example, polyamideimide resin, ceramics, glass, or the like.
- the second wiring pattern is formed in real time on the base member 20C by ink jet printing, a single test carrier can be used for various types of dies.
- the base member 20C since the base member 20C has the first wiring pattern formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. And the productivity of the test carrier can be improved.
- FIG. 19 is a view showing a test carrier in the eighth embodiment of the present invention.
- the configuration of the cover member is different from that of the fifth embodiment (see FIG. 16), but other configurations are the same as those of the fifth embodiment. Only the differences from the fifth embodiment will be described below for the test carrier in the eighth embodiment, and the same reference numerals are given to the parts having the same configuration as in the fifth embodiment, and the description will be omitted.
- the cover member 50 ⁇ / b> C in the present embodiment is composed only of a flexible film.
- the cover member 50C is made of, for example, a polyimide film.
- the second wiring pattern is formed in real time on the base member 20C by ink jet printing, a single test carrier can be used for various types of dies.
- the base member 20C since the base member 20C has the first wiring pattern formed in advance, the range of inkjet printing can be reduced, and the printing time of the second wiring pattern can be shortened. And the productivity of the test carrier can be improved.
- the base members 20A to 20C in the first to eighth embodiments described above correspond to an example of one of the first member and the second member in the present invention, and the cover member in the first to eighth embodiments. 50A to 50C correspond to another example of the second member or the first member in the present invention.
- conductive paths as shown in FIGS. 7 to 11 may be employed.
Abstract
Description
図13は本発明の第2実施形態における試験用キャリアを示す図である。
図14は本発明の第3実施形態における試験用キャリアを示す図である。
図15は本発明の第4実施形態における試験用キャリアを示す図である。
図16は本発明の第5実施形態における試験用キャリアを示す図である。
図17は本発明の第6実施形態における試験用キャリアを示す図である。
図18は本発明の第7実施形態における試験用キャリアを示す図である。
図19は本発明の第8実施形態における試験用キャリアを示す図である。
11…収容空間
20A~20C…ベース部材
21…第1の領域
22…第2の領域
30…ベースフレーム
31…中央開口
40…ベースフィルム
41…第1の配線パターン
42…ベース層
43…カバー層
44…第2の配線パターン
441…パッド
45…外部端子
46…導電路
47…絶縁層
50A~50C…カバー部材
60…カバーフレーム
61…中央開口
70…カバーフィルム
80…接着部
81…接着剤
90…ダイ
91…電極
Claims (16)
- 電子部品を間に挟む第1の部材と第2の部材とを備えた試験用キャリアであって、
前記第1の部材は、予め形成された第1の導電路を有し、
前記第1の部材又は前記第2の部材の一方は、前記第1の導電路と電気的に接続される第2の導電路が印刷によって形成されるべく第1の印刷領域を有することを特徴とする試験用キャリア。 - 請求項1記載の試験用キャリアであって、
前記第1の部材は、第1のフィルムを有し、
前記第2の部材は、前記第1のフィルムに対向する第2のフィルムを有し、
前記第1の印刷領域は、前記第1のフィルム又は前記第2のフィルムの一方に設けられており、
前記第1のフィルムと前記第2のフィルムとの間に前記電子部品を介在させることを特徴とする試験用キャリア。 - 請求項2記載の試験用キャリアであって、
前記第1の導電路は、前記第1のフィルムに設けられた外部端子に接続されていることを特徴とする試験用キャリア。 - 請求項2記載の試験用キャリアであって、
前記第1の部材は、中央に第1の開口が形成されていると共に、前記第1のフィルムが貼り付けられた第1のフレームをさらに有しており、
前記第1の導電路は、前記第1のフレームに設けられた外部端子に接続されていることを特徴とする試験用キャリア。 - 請求項2~4の何れかに記載の試験用キャリアであって、
前記第2の部材は、中央に第2の開口が形成されていると共に、前記第2のフィルムが貼り付けられる第2のフレームをさらに有することを特徴とする試験用キャリア。 - 請求項1記載の試験用キャリアであって、
前記第1の部材は、平板状のリジッド板を有し、
前記第2の部材は、前記リジッド板に対向するフィルムを有し、
前記第1の印刷領域は、前記リジッド板又は前記フィルムの一方に設けられており、
前記リジッド板と前記フィルムとの間に前記電子部品を介在させることを特徴とする試験用キャリア。 - 請求項5記載の試験用キャリアであって、
前記第1の導電路は、前記リジッド板に設けられた外部端子に接続されていることを特徴とする試験用キャリア。 - 請求項6又は7記載の試験用キャリアであって、
前記第2の部材は、中央に開口が形成されていると共に、前記フィルムが貼り付けられるフレームをさらに有することを特徴とする試験用キャリア。 - 請求項1記載の試験用キャリアであって、
前記第1の部材は、フィルムを有し、
前記第2の部材は、前記フィルムに対向する平板状のリジッド板を有し、
前記第1の印刷領域は、前記フィルム又は前記リジッド板の一方に設けられており、
前記フィルムと前記リジッド板との間に前記電子部品を介在させることを特徴とする試験用キャリア。 - 請求項9記載の試験用キャリアであって、
前記第1の導電路は、前記フィルムに設けられた外部端子に接続されていることを特徴とする試験用キャリア。 - 請求項9記載の試験用キャリアであって、
前記第1の部材は、中央に開口が形成されていると共に、前記フィルムが貼り付けられたフレームをさらに有しており、
前記第1の導電路は、前記フレームに設けられた外部端子に接続されていることを特徴とする試験用キャリア。 - 請求項1~11の何れかに記載の試験用キャリアであって、
前記第1の部材は、前記第1の印刷領域を有し、
前記第2の部材は、
予め形成された第3の導電路と、
前記第3の導電路と電気的に接続される第4の導電路が印刷によって形成されるべく第2の印刷領域と、を有することを特徴とする試験用キャリア。 - 請求項1~12の何れかに記載の試験用キャリアであって、
前記第1の部材又は前記第2の部材の一方は、
前記第2の導電路と、
前記第2の導電路において前記電子部品の輪郭に対応する部分の上に形成された絶縁層と、を有することを特徴とする試験用キャリア。 - 請求項13記載の試験用キャリアであって、
前記第2の導電路は、前記電子部品の電極と接触するパッドを有することを特徴とする試験用キャリア。 - 請求項1~14の何れかに記載の試験用キャリアであって、
前記電子部品は、半導体ウェハからダイシングされたダイであることを特徴とする試験用キャリア。 - 請求項1~15の何れかに記載の試験用キャリアであって、
前記第1の部材と前記第2の部材との間に形成され、前記電子部品を収容する収容空間は、外気に比して減圧されていることを特徴とする試験用キャリア。
Priority Applications (5)
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JP2011537155A JP5529154B2 (ja) | 2009-10-19 | 2010-05-10 | 試験用キャリア |
CN201080042423XA CN102576046A (zh) | 2009-10-19 | 2010-05-10 | 测试用载体 |
US13/502,655 US9030223B2 (en) | 2009-10-19 | 2010-05-10 | Test carrier |
KR1020127009688A KR101364486B1 (ko) | 2009-10-19 | 2010-05-10 | 시험용 캐리어 |
TW099130475A TWI476848B (zh) | 2009-10-19 | 2010-09-09 | Test vehicle |
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JP2009-240654 | 2009-10-19 | ||
JP2009240654A JP2011086880A (ja) | 2009-10-19 | 2009-10-19 | 電子部品実装装置および電子部品の実装方法 |
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US (2) | US9030223B2 (ja) |
JP (2) | JP2011086880A (ja) |
KR (2) | KR101364486B1 (ja) |
CN (2) | CN102576046A (ja) |
TW (2) | TW201130067A (ja) |
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JPH1068758A (ja) * | 1996-06-21 | 1998-03-10 | Fujitsu Ltd | 半導体装置の支持装置、半導体装置の試験用キャリア、半導体装置の固定方法、半導体装置の支持装置からの離脱方法及び試験用キャリアへの半導体装置の取付方法 |
JP2003344484A (ja) * | 2003-05-30 | 2003-12-03 | Fujitsu Ltd | 半導体集積回路装置の試験用キャリア |
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KR101561446B1 (ko) * | 2012-05-23 | 2015-10-19 | 가부시키가이샤 아드반테스트 | 시험용 캐리어 및 양부 판정 장치 |
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WO2013183478A1 (ja) * | 2012-06-05 | 2013-12-12 | 株式会社アドバンテスト | 試験用キャリア |
JP5816365B2 (ja) * | 2012-06-05 | 2015-11-18 | 株式会社アドバンテスト | 試験用キャリア |
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Also Published As
Publication number | Publication date |
---|---|
US20110089968A1 (en) | 2011-04-21 |
US8653846B2 (en) | 2014-02-18 |
TW201126626A (en) | 2011-08-01 |
KR101186800B1 (ko) | 2012-09-28 |
TW201130067A (en) | 2011-09-01 |
US20120235699A1 (en) | 2012-09-20 |
TWI476848B (zh) | 2015-03-11 |
CN102044450A (zh) | 2011-05-04 |
CN102044450B (zh) | 2012-12-05 |
US9030223B2 (en) | 2015-05-12 |
JP2011086880A (ja) | 2011-04-28 |
KR20120061979A (ko) | 2012-06-13 |
JPWO2011048834A1 (ja) | 2013-03-07 |
JP5529154B2 (ja) | 2014-06-25 |
CN102576046A (zh) | 2012-07-11 |
KR101364486B1 (ko) | 2014-02-20 |
KR20110043441A (ko) | 2011-04-27 |
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