WO2011010611A1 - 薄膜トランジスタ、その製造方法及び液晶表示装置 - Google Patents
薄膜トランジスタ、その製造方法及び液晶表示装置 Download PDFInfo
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- WO2011010611A1 WO2011010611A1 PCT/JP2010/062075 JP2010062075W WO2011010611A1 WO 2011010611 A1 WO2011010611 A1 WO 2011010611A1 JP 2010062075 W JP2010062075 W JP 2010062075W WO 2011010611 A1 WO2011010611 A1 WO 2011010611A1
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- film
- amorphous silicon
- transistor
- polysilicon
- thin film
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- 239000010409 thin film Substances 0.000 title claims abstract description 50
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000010408 film Substances 0.000 claims abstract description 162
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 48
- 229920005591 polysilicon Polymers 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 72
- 230000001678 irradiating effect Effects 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 claims description 2
- 239000011521 glass Substances 0.000 abstract description 6
- 238000009413 insulation Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- 230000002093 peripheral effect Effects 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02678—Beam shaping, e.g. using a mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78609—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Definitions
- the present invention relates to a thin film transistor having an inverted stagger structure, and more particularly to a thin film transistor suitable for a pixel transistor in a display portion of a liquid crystal display device, a manufacturing method thereof, and a liquid crystal display device.
- a gate electrode is formed of a metal layer such as Cr or Al on an insulating substrate, and then, for example, a SiN film is formed as a gate insulating film on the substrate including the gate electrode.
- a SiN film is formed as a gate insulating film on the substrate including the gate electrode.
- a-Si: H hydrogenated amorphous silicon
- an n + Si film is formed on the a-Si: H film, and the a-Si: H film and the n + Si film are patterned in an island shape in a predetermined region on the gate electrode.
- the amorphous silicon thin film transistor having the inverted stagger structure has a small off current I OFF and is used, for example, as a pixel transistor of a liquid crystal display device.
- the amorphous silicon transistor uses an a-Si: H film for the channel region, there is a problem that the charge mobility in the channel region is small.
- a liquid crystal display device in which a drive circuit is formed in the peripheral portion of a substrate on which a pixel portion is formed has been proposed.
- an amorphous silicon transistor is a usable level as a pixel transistor in the pixel portion.
- the charge mobility of the channel region is too small to be used.
- a-Si is irradiated with a laser and annealed to crystallize a-Si into polycrystalline silicon (hereinafter referred to as polysilicon) and form a polysilicon film in the channel region.
- polysilicon polycrystalline silicon
- the low-temperature polysilicon transistor described in Patent Document 1 is formed as follows. That is, as shown in FIG. 7, a gate electrode 102 such as Cr or Al is formed on a glass substrate 101, and a gate insulating film 103 made of SiN is further formed on the entire surface of the substrate 101 including the gate electrode 102. An a-Si: H film is formed thereon with a thickness of 10 to 40 nm. Then, the a-Si: H film is scanned with a laser irradiation member for irradiating a laser beam in a line in a direction perpendicular to the line, so that an excimer laser beam is irradiated on the entire surface of the a-Si: H film.
- Irradiation and annealing are performed to modify the entire a-Si: H film into the polysilicon film 104. Then, an a-Si: H film 105 is formed again on the modified polysilicon film 104, and an n + Si film 106 is further formed on the a-Si: H film 105. These n + The Si film 106, the a-Si: H film 105, and the polysilicon film 104 are etched into an island shape above the gate electrode 102.
- a source / drain electrode 107 is formed on the island-like Si3 layer film, the n + Si film 106 is removed using the source / drain electrode 107 as a mask, and then a passivation film 108 is formed on the entire surface. To do.
- the channel region is composed of a two-layer film of the polysilicon film 104 and the a-Si: H film 105, and the polysilicon film 104 is in contact with the SiN gate insulating film 103. Therefore, the charge mobility in the channel region is high, the on-current is increased, and the operation speed is increased, so that it can be sufficiently used as a transistor for a peripheral driver circuit of a liquid crystal display device.
- the above-described conventional low-temperature polysilicon transistor has a high on-current, the off-current is also high, the potential holding characteristic is low, and a leakage current increases, resulting in a problem of high power consumption.
- a thin film transistor including a low-temperature polysilicon transistor having a low off-state current, excellent potential holding characteristics, low power consumption, and high operation speed It is an object to provide a manufacturing method and a liquid crystal display device using the same.
- the thin film transistor according to the present invention corresponds to an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating film formed on the gate electrode, and the gate electrode on the gate insulating film.
- a polysilicon film formed in an island shape at a position where it is formed, an amorphous silicon film formed so as to cover the upper and side surfaces of the polysilicon film, and formed so as to be electrically connected to both ends of the amorphous silicon film A thin film transistor having an inverted staggered structure.
- the gate insulating film is, for example, a SiN film.
- the method of manufacturing a thin film transistor according to the present invention includes a step of forming a gate electrode on an insulating substrate, a step of forming a gate insulating film on the substrate including the gate electrode, and a first step on the gate insulating film.
- a step of forming an amorphous silicon film a step of irradiating the island-like region corresponding to the gate electrode with respect to the first amorphous silicon film with a laser beam, and modifying the region into a polysilicon film; Forming a second amorphous silicon film on the polysilicon region and the first amorphous silicon region, and leaving an amorphous silicon film covering the upper surface and side surfaces of the modified polysilicon film, Source / drain electrodes so as to be electrically connected to both ends of the remaining amorphous silicon film Forming a manufacturing method of a thin film transistor of a reverse stagger structure characterized by having a.
- the amorphous silicon film includes a hydrogen-free amorphous silicon film (a-Si: H film) containing hydrogen in addition to a film not containing hydrogen (a-Si film).
- the laser light is collected by a microlens array in which a plurality of microlenses are arranged to obtain a plurality of laser beams, and the island shape of the plurality of thin film transistors arranged in a matrix is obtained.
- a microlens array in which a plurality of microlenses are arranged to obtain a plurality of laser beams, and the island shape of the plurality of thin film transistors arranged in a matrix is obtained.
- the liquid crystal display device is characterized in that the thin film transistor is used as a pixel transistor in a display portion and a drive transistor in a peripheral drive circuit.
- the channel region is formed at the boundary between the gate insulating film such as the SiN film and the polysilicon film, the charge movement speed is high, the on-current is high, and the writing speed is high. Because it is fast, the operation speed is fast. Then, the side of the polysilicon film is covered with an amorphous silicon film, and this amorphous silicon film has a low charge transfer speed, so that the leakage current is reduced compared to the case where there is no amorphous silicon film, and the potential holding characteristics. Is excellent and power consumption is reduced.
- the first amorphous silicon film is irradiated with laser light locally on the island-shaped region corresponding to the gate electrode, and this region is changed to the polysilicon film. Furthermore, after the second amorphous silicon film is formed on the polysilicon film and the first amorphous silicon film, the polysilicon film and the amorphous silicon film covering the side surface and the upper surface of the polysilicon film are formed. Since the channel region is formed, the thin film transistor of the present invention can be easily manufactured.
- the operation of the drive circuit is fast, the leakage current is small, and the power consumption can be reduced.
- FIG. 1 shows a thin film transistor according to an embodiment of the present invention, in which (a) is a plan view, (b) is a sectional view taken along line BB in (a), and (c) is a sectional view taken along line CC in (a). is there. It is a top view which shows 1 pixel of the display part of the liquid crystal display device in embodiment of this invention. It is a figure which shows the laser irradiation apparatus using the micro lens array used with the manufacturing method which concerns on embodiment of this invention, (a) is a general view, (b) shows a micro lens array. (A) thru
- or (c) is sectional drawing which shows the manufacturing method of the thin-film transistor which concerns on embodiment of this invention in order of a process, and shows the process following FIG. (A) thru
- or (c) are sectional drawings which show the manufacturing method of the thin-film transistor which concerns on embodiment of this invention in order of a process, and shows the process following FIG. It is sectional drawing which shows the thin film transistor of the conventional reverse stagger structure.
- FIG. 1 shows a thin film transistor according to an embodiment of the present invention
- FIG. 2 is a plan view showing one pixel of a display unit of a liquid crystal display device.
- a display unit and a peripheral circuit for driving are arranged at the periphery of the display unit.
- a plurality of scanning lines SL and a plurality of scanning lines SL are provided in the display unit.
- the signal line DL is formed to be orthogonal to each other, and one pixel is formed in a unit region surrounded by the scanning line SL and the signal line DL.
- a transparent electrode TE made of ITO (Indium Tin Oxide) and a switching transistor T are formed.
- the gate electrode of the transistor T is connected to the scanning line SL, and the drain of the transistor T is connected to the signal line DL.
- the source is connected to the transparent electrode TE made of ITO.
- FIG. 1A is a plan view of the transistor 1 (T)
- FIG. 1B is a cross-sectional view taken along line BB in FIG. 1A
- FIG. 1C is a cross-sectional view taken along line CC in FIG. It is sectional drawing by a line.
- the transistor T has a gate G connected to the scanning line SL, a drain D connected to the signal line DL, and a source S connected to the transparent electrode TE.
- An island IL constituting the channel region is formed above the gate G, and a drain D and a source S are formed above the island IL so as to face each other with an appropriate length interval.
- the gate insulating film 12 made of SiN is formed on the substrate 10 including the gate electrode 11.
- the gate electrode 11 is a metal layer such as Cr or Al, and can be formed by sputtering.
- a polysilicon film 13 is formed in an island (IL) shape at a position on the gate electrode 11.
- the polysilicon film 13 is covered with a hydrogenated amorphous film so as to cover the upper surface and side surfaces of the polysilicon film 13.
- a silicon film (hereinafter referred to as a-Si: H film) 14 is formed.
- a drain electrode 15 a (D) connected to the signal line DL and a source electrode 15 b (S) connected to the transparent electrode (TE) of the pixel are formed so as to overlap both ends of the a-Si: H film 14. Is formed.
- a protective film 16 made of SiN is formed on the entire surface.
- the a-Si: H film 14 is electrically connected to the drain electrode 15a and the source electrode 15b.
- the a-Si: H film 14 and the polysilicon film 13 forms a channel region.
- charge is generated at the boundary between the polysilicon film 13 and the SiN gate insulating film 12 and moves along this boundary. Therefore, the thin film transistor of this embodiment has high charge mobility and high on-current. high.
- the thin film transistor of this embodiment has a high on-state current, the writing time is short and high-speed operation is possible.
- the amorphous a-Si: H film 14 is formed around the island made of the polysilicon film 13, that is, on the side surface of the polysilicon film 13, the leakage current is routed around the island. And low off-state current.
- the off-state current is low, the potential holding characteristics are excellent, and the potential of the pixel transistor in the display portion of the liquid crystal display device can be prevented from decreasing with time.
- a transistor having a high on-current and a low off-current can be obtained. Therefore, this transistor can operate at high speed, has excellent potential holding characteristics, and consumes little power.
- FIGS. 5A to 5C, and FIGS. 6A to 6C are cross-sectional views illustrating the manufacturing method of this embodiment in the order of steps.
- a gate electrode 2 made of a metal film such as Mo, Cr or Al is formed on a glass substrate 1 to a thickness of, for example, 2000 to 3000 mm by sputtering.
- This gate electrode can be patterned on the glass substrate 1 simultaneously with the scanning line SL.
- the gate insulating film 3 made of a SiN film is formed on the entire surface by, for example, a low temperature plasma CVD method using silane and H 2 gas as a raw material gas at 250 to 300 ° C. It is formed to a thickness of 2500 to 5000 mm.
- the first a-Si: H film 4a is formed on the gate insulating film 3 to a thickness of 200 to 1000 mm, for example, by plasma CVD, for example.
- the a-Si: H film 4a is continuously formed after the formation of the SiN film by moving the substrate to another chamber without taking it out into the air.
- the a-Si: H film 4a is formed by using silane, ammonia, and H 2 gas as source gases. Although the mixing of H 2 gas contributes to the improvement of the film quality, its addition is optional. Thereafter, the substrate is taken out, and the a-Si: H film 4a is annealed by irradiating only the channel region formation scheduled region with laser light by laser annealing using the microlens array shown in FIG. The channel region formation planned region is polycrystallized to form a polysilicon film 4.
- the laser annealing apparatus using the microlens array forms laser light emitted from the light source 31 into a parallel beam by the lens group 32, and the irradiated object 36 through the microlens array 35. Irradiate.
- the laser light source 31 is, for example, an excimer laser that emits laser light having a wavelength of 308 nm or 353 nm at a repetition period of, for example, 50 Hz.
- the microlens array 35 has a large number of microlenses 35 arranged on a transparent substrate 34, and condenses laser light on a thin film transistor formation region set on a thin film transistor substrate as an irradiated body 36.
- the transparent substrate 34 is arranged in parallel to the irradiation object 36, and the microlenses 35 are arranged at a pitch of an integer multiple of 2 (for example, 2) or more of the arrangement pitch of the transistor formation regions.
- the irradiated object 36 of the present embodiment is the thin film transistor 1, and irradiates the laser light condensed by the microlens 35 onto the channel region formation scheduled region shown in FIG.
- the laser beam shaped into a parallel beam by the lens group 32 is provided with a light shielding member 33 in the middle thereof, and is condensed by the microlens 34 by this light shielding member 33 and applied to the irradiated object 36.
- the beam shape of the laser beam can be shaped into a rectangle, for example. Therefore, as shown in FIG. 1A, even if the channel region formation scheduled region is rectangular, the region can be selectively irradiated by the microlens 34.
- a second a-Si: H film 5a is formed on the entire surface of the polysilicon film 4 and the first a-Si: H film 4a with, for example, 2000 to It is formed to a thickness of 3000 mm.
- the film formation conditions for the second a-Si: H film 5a are the same as the film formation conditions for the first a-Si: H film 4a.
- an n + Si film 6a is formed on the a-Si: H film 5a to a thickness of about 500 mm, for example. .
- the n + Si film 6a can be formed by plasma CVD using a gas in which a gas containing P such as phosphine is mixed with silane as a source gas.
- a gas containing P such as phosphine
- H 2 gas can be mixed with the raw material gas.
- the substrate is taken out, and as shown in FIG. 5C, the a-Si: H film 4a, the a-Si: H film 5a, and the n + film 6a are formed on the polysilicon film 4 and the polysilicon film. Only the a-Si: H film 4a on the side surface of the film 4 is left, and other portions are removed to pattern island-shaped channel regions.
- the drain electrode 7a and the source electrode 7b are formed to a thickness of, for example, 2000 to 5000 mm so as to be in contact with the end portion of the n + Si film 6a.
- the n + Si film 6a is removed by etching, whereby the drain electrode 7a and the source electrode 7b and the a-Si: H are removed.
- the n + film 6 is left only between the film 5.
- a protective film 8 made of a SiN film is formed on the entire surface.
- FIG. 6 (c) the reference numerals of the corresponding parts of the structure of FIG. 1 (b) are shown in parentheses.
- the structure shown in FIG. 6C is different from the structure shown in FIG. 1B in that an n + Si film 6 is provided between the source / drain electrodes and the a-Si: H film.
- the n + Si film 6 is for increasing the adhesion between the source / drain electrodes and the a-Si: H film and decreasing the contact resistance.
- the formation of the n + Si film is optional, and as shown in FIG. 1, the n + Si film may not be formed, or the source / drain electrode, the a-Si: H film, and the like may be formed by other means. The contact resistance between the two may be reduced.
- the thin film transistor shown in FIG. 1 can be manufactured.
- the laser region can be irradiated only to the channel region of the thin film transistor by using the microlens array. Therefore, the channel region is scheduled to be formed by annealing the a-Si: H film by this laser beam irradiation. Only the region can be crystallized to form the island-shaped polysilicon film 4. Therefore, a thin film transistor having a structure in which the a-Si: H film 14 (4a) covers the side surface and the upper surface of the polysilicon film 13 (4) can be easily manufactured.
- the use of the inverted staggered thin film transistor of the present embodiment as the pixel transistor of the display unit of the liquid crystal display device speeds up the pixel transistor of the display unit and reduces the leakage current. This makes it possible to stabilize the potential.
- the thin film transistor having the inverted staggered structure of this embodiment can also be used as a transistor of a peripheral drive circuit of a liquid crystal display device. Since the thin film transistor of this embodiment uses a polysilicon film in a channel region, the high speed Operation is possible. In any case, since the thin film transistor of this embodiment has a high on-state current and a low off-state current, it is suitable as a transistor of a liquid crystal display device.
- the present invention is useful for manufacturing a liquid crystal display device using a thin film transistor having an inverted stagger structure.
Abstract
Description
2,11:ゲート電極
3,12:ゲート絶縁膜
4,13:ポリシリコン膜
4a,5,5a,14:a-Si:H膜
6,6a:n+膜
7a,15a:ドレイン電極
7b,15b:ソース電極
8,16:保護膜
Claims (5)
- 絶縁性基板と、この絶縁性基板の上に形成されたゲート電極と、このゲート電極上に形成されたゲート絶縁膜と、このゲート絶縁膜上の前記ゲート電極に対応する位置にアイランド状に形成されたポリシリコン膜と、このポリシリコン膜の上面及び側面を覆うように形成されたアモルファスシリコン膜と、このアモルファスシリコン膜の両端部に電気的に接続するように形成されたソース・ドレイン電極と、を有することを特徴とする逆スタガ構造の薄膜トランジスタ。
- 前記ゲート絶縁膜はSiN膜であることを特徴とする請求項1に記載の薄膜トランジスタ。
- 絶縁性基板上にゲート電極を形成する工程と、前記ゲート電極を含む前記基板上にゲート絶縁膜を形成する工程と、前記ゲート絶縁膜上に第1のアモルファスシリコン膜を形成する工程と、前記第1のアモルファスシリコン膜に対し前記ゲート電極に対応するアイランド状領域にレーザ光を照射してこの領域をポリシリコン膜に改質する工程と、この改質ポリシリコン領域及び第1のアモルファスシリコン領域上に第2のアモルファスシリコン膜を形成する工程と、前記改質ポリシリコン膜の上面及び側面を覆うアモルファスシリコン膜を残して他の部分のアモルファスシリコン膜を除去する工程と、残存したアモルファスシリコン膜の両端部に電気的に接続するようにソース・ドレイン電極を形成する工程と、を有することを特徴とする逆スタガ構造の薄膜トランジスタの製造方法。
- 前記レーザ光の照射工程において、複数個のマイクロレンズを配置したマイクロレンズアレイによりレーザ光を集光して複数個のレーザビームを得、マトリクス状に配置された複数個の薄膜トランジスタの前記アイランド状領域を前記各レーザビームにより照射して、複数個の薄膜トランジスタのポリシリコン領域を形成することを特徴とする請求項3に記載の薄膜トランジスタの製造方法。
- 前記請求項1又は2に記載の薄膜トランジスタを、表示部の画素トランジスタとして使用することを特徴とする液晶表示装置。
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WO2016157313A1 (ja) * | 2015-03-27 | 2016-10-06 | 堺ディスプレイプロダクト株式会社 | 薄膜トランジスタ及び表示パネル |
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WO2014061762A1 (en) * | 2012-10-17 | 2014-04-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
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WO2018109912A1 (ja) | 2016-12-15 | 2018-06-21 | 堺ディスプレイプロダクト株式会社 | レーザーアニール装置、レーザーアニール方法及びマスク |
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KR20170017008A (ko) | 2017-02-14 |
KR20120033353A (ko) | 2012-04-06 |
TW201115742A (en) | 2011-05-01 |
TWI509810B (zh) | 2015-11-21 |
CN102576733A (zh) | 2012-07-11 |
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