WO2008089043A2 - Multi-junction solar cells and methods and apparatuses for forming the same - Google Patents

Multi-junction solar cells and methods and apparatuses for forming the same Download PDF

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Publication number
WO2008089043A2
WO2008089043A2 PCT/US2008/050770 US2008050770W WO2008089043A2 WO 2008089043 A2 WO2008089043 A2 WO 2008089043A2 US 2008050770 W US2008050770 W US 2008050770W WO 2008089043 A2 WO2008089043 A2 WO 2008089043A2
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sccm
silicon layer
junction
amorphous silicon
type
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English (en)
French (fr)
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WO2008089043A3 (en
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Soo-Young Choi
Yong-Kee Chae
Shuran Sheng
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Applied Materials Inc
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Applied Materials Inc
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Priority claimed from US11/624,677 external-priority patent/US20080173350A1/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Priority to JP2009546463A priority Critical patent/JP2010517271A/ja
Priority to EP08727534A priority patent/EP2104955A4/en
Publication of WO2008089043A2 publication Critical patent/WO2008089043A2/en
Publication of WO2008089043A3 publication Critical patent/WO2008089043A3/en
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/17—Photovoltaic cells having only PIN junction potential barriers
    • H10F10/172—Photovoltaic cells having only PIN junction potential barriers comprising multiple PIN junctions, e.g. tandem cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/70—Surface textures, e.g. pyramid structures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Embodiments of the present invention generally relate to solar cells and methods and apparatuses for forming the same. More particularly, embodiments of the present invention relate to thin film multi-junction solar cells and methods and apparatuses for forming the same.
  • Crystalline silicon solar cells and thin film solar cells are two types of solar cells.
  • Crystalline silicon solar cells typically use either mono-crystalline substrates (i.e., single-crystal substrates of pure silicon) or a multi-crystalline silicon substrates (i.e., poly-crystalline or polysilicon). Additional film layers are deposited onto the silicon substrates to improve light capture, form the electrical circuits, and protect the devices.
  • Thin-film solar cells use thin layers of materials deposited on suitable substrates to form one or more p-n junctions. Suitable substrates include glass, metal, and polymer substrates.
  • Embodiments of the present invention relate to thin film multi-junction solar cells and methods and apparatuses for forming the same.
  • a method of forming a thin film multi-junction solar cell over a substrate comprises forming a first p-i-n junction and forming a second p-i-n junction over the first p-i-n junction.
  • Forming a first p-i-n junction may comprise forming a p-type amorphous silicon layer, forming an intrinsic type amorphous silicon layer over the p-type amorphous silicon layer, and forming an n-type microcrystalline silicon layer over the intrinsic type amorphous silicon layer.
  • Forming a second p-i-n junction may comprise forming a p-type microcrystalline silicon layer, forming an intrinsic type microcrystalline silicon layer over the p- type microcrystalline silicon layer, and forming an n-type amorphous silicon layer over the intrinsic type microcrystalline layer.
  • an apparatus for forming a thin film multi-junction solar cell comprises at least one first system configured to form a first p-i-n junction and at least one second system configured to form a second p-i-n junction over the first p-i-n junction.
  • the first system may comprise a single p-chamber configured to deposit a p- type amorphous silicon layer and a plurality of i/n-chambers each configured to deposit an intrinsic type amorphous silicon layer and an n-type microcrystalline silicon layer.
  • the second system may comprise a single p-chamber configured to deposit a p-type microcrystalline silicon layer and a plurality of i/n-chambers each configured to deposit an intrinsic type microcrystalline silicon layer and an n-type amorphous silicon layer.
  • Figure 1 is a schematic diagram of certain embodiments of a multi- junction solar cell oriented toward the light or solar radiation.
  • Figure 2 is a schematic diagram of the multi-junction solar cell of Figure 1 further comprising an n-type amorphous silicon buffer layer.
  • Figure 3 is a schematic diagram of the multi-junction solar cell of Figure 1 further comprising a p-type microcrystalline silicon contact layer.
  • Figure 4 is a schematic cross-section view of one embodiment of a plasma enhanced chemical vapor deposition (PECVD) chamber in which one or more films of a solar cell may be deposited.
  • PECVD plasma enhanced chemical vapor deposition
  • Figure 5 is a top schematic view of one embodiment of a process system having a plurality of process chambers.
  • Figure 6 depicts deposition parameters set to form a tandem p-i-n junction solar cell.
  • Figure 7 depicts properties of a solar cell of one embodiment of the present invention.
  • Embodiments of the present invention include improved thin film multi-junction solar cells and methods and apparatus for forming the same.
  • Figure 1 is a schematic diagram of certain embodiments of a multi-junction solar cell 100 oriented toward the light or solar radiation 101.
  • Solar cell 100 comprises a substrate 102, such as a glass substrate, polymer substrate, metal substrate, or other suitable substrate, with thin films formed thereover.
  • the solar cell 100 further comprises a first transparent conducting oxide (TCO) layer 110 formed over the substrate 102, a first p-i-n junction 120 formed over the first TCO layer 110, a second p-i-n junction 130 formed over the first p-i-n junction 120, a second TCO layer 140 formed over the second p-i-n junction 130, and a metal back layer 150 formed over the second TCO layer 140.
  • TCO transparent conducting oxide
  • the substrate and/or one or more of thin films formed thereover may be optionally textured by wet, plasma, ion, and/or mechanical processes.
  • the first TCO layer 110 is textured and the subsequent thin films deposited thereover will generally follow the topography of the surface below it.
  • the first TCO layer 110 and the second TCO layer 140 may each comprise tin oxide, zinc oxide, indium tin oxide, cadmium stannate, combinations thereof, or other suitable materials. It is understood that the TCO materials may also include additional dopants and components.
  • zinc oxide may further include dopants, such as aluminum, gallium, boron, and other suitable dopants.
  • Zinc oxide preferably comprises 5 atomic % or less of dopants, and more preferably comprises 2.5 atomic % or less aluminum.
  • the substrate 102 may be provided by the glass manufacturers with the first TCO layer 110 already provided.
  • the first p-i-n junction 120 may comprise a p-type amorphous silicon layer 122, an intrinsic type amorphous silicon layer 124 formed over the p-type amorphous silicon layer 122, and an n-type microcrystalline silicon layer 126 formed over the intrinsic type amorphous silicon layer 124.
  • the p-type amorphous silicon layer 122 may be formed to a thickness between about 6 ⁇ A and about 3O ⁇ A.
  • the intrinsic type amorphous silicon layer 124 may be formed to a thickness between about 1 ,5O ⁇ A and about 3,50OA.
  • the n-type microcrystalline semiconductor layer 126 may be formed to a thickness between about 100A and about 400A.
  • the second p-i-n junction 130 may comprise a p-type microcrystalline silicon layer 132, an intrinsic type microcrystalline silicon layer 134 formed over the p-type microcrystalline silicon layer 132, and an n-type amorphous silicon layer 136 formed over the intrinsic type microcrystalline silicon layer 134.
  • the p-type microcrystalline silicon layer 132 may be formed to a thickness between about 100A and about 400A.
  • the intrinsic type microcrystalline silicon layer 134 may be formed to a thickness between about 10,000A and about 30,00OA.
  • the n-type amorphous silicon layer 136 may be formed to a thickness between about 100A and about 5O ⁇ A.
  • the metal back layer 150 may include, but not limited to a material selected from the group consisting of Al, Ag, Ti, Cr, Au, Cu, Pt, alloys thereof, or combinations thereof. Other processes may be performed to form the solar cell 100, such a laser scribing processes. Other films, materials, substrates, and/or packaging may be provided over metal back layer 150 to complete the solar cell.
  • the solar cells may be interconnected to form modules, which in turn can be connected to form arrays.
  • Solar radiation 101 is absorbed by the intrinsic layers of the p-i-n junctions 120, 130 and is converted to electron-holes pairs.
  • the electric field created between the p-type layer and the n-type layer that stretches across the intrinsic layer causes electrons to flow toward the n-type layers and holes to flow toward the p-type layers creating current.
  • the first p-i-n junction 120 comprises an intrinsic type amorphous silicon layer 124 and the second p-i-n junction 130 comprises an intrinsic type microcrystalline silicon layer 134 because amorphous silicon and microcrystalline silicon absorb different wavelengths of solar radiation 101. Therefore, the solar cell 100 is more efficient since it captures a larger portion of the solar radiation spectrum.
  • the intrinsic layer of amorphous silicon and the intrinsic layer of microcrystalline are stacked in such a way that solar radiation 101 first strikes the intrinsic type amorphous silicon layer 124 and then strikes the intrinsic type microcrystalline silicon layer 134 since amorphous silicon has a larger bandgap than microcrystalline silicon.
  • Solar radiation not absorbed by the first p-i-n junction 120 continues on to the second p-i-n junction 130. It was surprising to find that the thicknesses disclosed herein of the p-i-n layers of the first p-i-n junction 120 and the second p-i-n junction 130 provided for a solar cell with improved efficiency and with a reduced cost of producing the same.
  • the solar cell 100 does not need to utilize a metal tunnel layer between the first p-i-n junction 120 and the second p-i-n junction 130.
  • the n-type microcrystalline silicon layer 126 of the first p-i-n junction 120 and the p-type microcrystalline silicon layer 132 has sufficient conductivity to provide a tunnel junction to allow electrons to flow from the first p-i-n junction 120 to the second p-i-n junction 130.
  • FIG. 1 is a schematic diagram of the multi-junction solar cell 100 of Figure 1 further comprising an n-type amorphous silicon buffer layer 125 formed between the intrinsic type amorphous silicon layer 124 and the n-type microcrystalline silicon layer 126.
  • the n-type amorphous silicon buffer layer 125 may be formed to a thickness between about 1OA and about 2O ⁇ A.
  • n-type amorphous silicon buffer layer 125 helps bridge the bandgap offset that is believed to exist between the intrinsic type amorphous silicon layer 124 and the n-type microcrystalline silicon layer 126. Thus it is believed that cell efficiency is improved due to enhanced current collection.
  • FIG 3 is a schematic diagram of the multi-junction solar cell 100 of Figure 1 further comprising a p-type microcrystalline silicon contact layer 121 formed between the first TCO layer 110 and the p-type amorphous silicon layer 122.
  • the p-type microcrystalline silicon contact layer 121 may be formed to a thickness between about 6OA and about 3O ⁇ A. It is believed that the p-type microcrystalline silicon contact layer 121 helps achieve low resistance contact with the TCO layer. Thus, it is believed that cell efficiency is improved since current flow between the intrinsic type amorphous silicon layer 122 and the zinc oxide first TCO layer 110 is improved.
  • the p-type microcrystalline silicon contact layer 121 be used with a TCO layer comprising a material that is resistant to a hydrogen plasma, such as zinc oxide, since a large amount of hydrogen is used to form the contact layer. It has been found that tin oxide is not suitable to be used in conjunction with the p-type microcrystalline silicon contact layer since it is chemically reduced by the hydrogen plasma. It is further understood that the solar cell 100 may further comprise an optional n-type amorphous silicon buffer layer formed between the intrinsic type amorphous silicon layer 124 and the n-type microcrystalline semiconductor layer 126 as described in Figure 2.
  • FIG 4 is a schematic cross-section view of one embodiment of a plasma enhanced chemical vapor deposition (PECVD) chamber 400 in which one or more films of a solar cell, such as the solar cell 100 of Figure 1 , Figure 2, or Figure 3, may be deposited.
  • PECVD plasma enhanced chemical vapor deposition
  • One suitable plasma enhanced chemical vapor deposition chamber is available from Applied Materials, Inc., located in Santa Clara, CA. It is contemplated that other deposition chambers, including those from other manufacturers, may be utilized to practice the present invention.
  • the chamber 400 generally includes walls 402, a bottom 404, and a showerhead 410, and substrate support 430 which define a process volume 406.
  • the process volume is accessed through a valve 408 such that the substrate, such as substrate 100, may be transferred in and out of the chamber 400.
  • the substrate support 430 includes a substrate receiving surface 432 for supporting a substrate and stem 434 coupled to a lift system 436 to raise and lower the substrate support 430. A shadow from 433 may be optionally placed over periphery of the substrate 100.
  • Lift pins 438 are moveably disposed through the substrate support 430 to move a substrate to and from the substrate receiving surface 432.
  • the substrate support 430 may also include heating and/or cooling elements 439 to maintain the substrate support 430 at a desired temperature.
  • the substrate support 430 may also include grounding straps 431 to provide RF grounding at the periphery of the substrate support 430.
  • the showerhead 410 is coupled to a backing plate 412 at its periphery by a suspension 414.
  • the showerhead 410 may also be coupled to the backing plate by one or more center supports 416 to help prevent sag and/or control the straightness/curvature of the showerhead 410.
  • a gas source 420 is coupled to the backing plate 412 to provide gas through the backing plate 412 and through the showerhead 410 to the substrate receiving surface 432.
  • a vacuum pump 409 is coupled to the chamber 400 to control the process volume 406 at a desired pressure.
  • An RF power source 422 is coupled to the backing plate 412 and/or to the showerhead 410 to provide a RF power to the showerhead 410 so that an electric field is created between the showerhead and the substrate support so that a plasma may be generated from the gases between the showerhead 410 and the substrate support 430.
  • Various RF frequencies may be used, such as a frequency between about 0.3 MHz and about 200 MHz. In one embodiment the RF power source is provided at a frequency of 13.56 MHz.
  • showerheads are disclosed in U.S. Patent 6,477,980 issued on November 12, 2002 to White et al., U.S. Publication 20050251990 published on November 17, 2006 to Choi et al., and U.S. Publication 2006/0060138 published on March 23, 2006 to Keller et al, which are all incorporated by reference in their entirety to the extent not inconsistent with the present disclosure.
  • a remote plasma source 424 such as an inductively coupled remote plasma source, may also be coupled between the gas source and the backing plate. Between processing substrates, a cleaning gas may be provided to the remote plasma source 424 so that a remote plasma is generated and provided to clean chamber components. The cleaning gas may be further excited by the RF power source 422 provided to the showerhead. Suitable cleaning gases include but are not limited to NF 3 , F 2 , and SF 6 . Examples of remote plasma sources are disclosed in U.S. Patent 5,788,778 issued August 4, 1998 to Shang et al, which is incorporated by reference to the extent not inconsistent with the present disclosure.
  • the deposition methods for one or more silicon layers may include the following deposition parameters in the process chamber of Figure 4 or other suitable chamber.
  • a substrate having a surface area of 10,000 cm 2 or more, preferably 40,000 cm 2 or more, and more preferably 55,000 cm 2 or more is provided to the chamber. It is understood that after processing the substrate may be cut to form smaller solar cells.
  • the heating and/or cooling elements 439 may be set to provide a substrate support temperature during deposition of about 400 degrees Celsius or less, preferably between about 100 degrees Celsius and about 400 degrees Celsius, more preferably between about 150 degrees Celsius and about 300 degrees Celsius, such as about 200 degrees Celsius.
  • the spacing during deposition between the top surface of a substrate disposed on the substrate receiving surface 432 and the showerhead 410 may be between 400 mil and about 1 ,200 mil, preferably between 400 mil and about 800 mil.
  • a silicon-based gas and a hydrogen- based gas are provided.
  • Suitable silicon based gases include, but are not limited to silane (SiH 4 ), disilane (Si 2 H 6 ), silicon tetrafluoride (SiF 4 ), silicon tetrachloride (SiCI 4 ), dichlorosilane (SiH 2 CI 2 ), and combinations thereof.
  • Suitable hydrogen-based gases include, but are not limited to hydrogen gas (H 2 ).
  • the p-type dopants of the p-type silicon layers may each comprise a group III element, such as boron or aluminum. Preferably, boron is used as the p-type dopant.
  • boron-containing sources include trimethylboron (TMB (or B(CH 3 ) 3 )), diborane (B 2 H 6 ), BF 3 , B(C 2 H 5 ) 3 , and similar compounds.
  • TMB trimethylboron
  • B 2 H 6 diborane
  • BF 3 B(C 2 H 5 ) 3
  • phosphorus-containing sources include phosphine and similar compounds.
  • the dopants are typically provided with a carrier gas, such as hydrogen, argon, helium, and other suitable compounds.
  • a total flow rate of hydrogen gas is provided. Therefore, if a hydrogen gas is provided as the carrier gas, such as for the dopant, the carrier gas flow rate should be subtracted from the total flow rate of hydrogen to determine how much additional hydrogen gas should be provided to the chamber.
  • Certain embodiments of depositing a p-type microcrystalline silicon contact layer may comprise providing a gas mixture of hydrogen gas to silane gas in ratio of about 200:1 or greater.
  • Silane gas may be provided at a flow rate between about 0.1 sccm/L and about 0.8 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 60 sccm/L and about 500 sccm/L.
  • Trimethylboron may be provided at a flow rate between about 0.0002 sccm/L and about 0.0016 sccm/L.
  • the dopant/carrier gas mixture may be provided at a flow rate between about 0.04 sccm/L and about 0.32 sccm/L.
  • the flow rates in the present disclosure are expressed as seem per interior chamber volume.
  • the interior chamber volume is defined as the volume of the interior of the chamber in which a gas can occupy.
  • the interior chamber volume of chamber 400 is the volume defined by the backing plate 412 and by the walls 402 and bottom 404 of the chamber minus the volume occupied therein by the showerhead assembly (i.e., including the showerhead 410, suspension 414, center support 415) and by the substrate support assembly (i.e., substrate support 430, grounding straps 431).
  • An RF power between about 50 milliWatts/cm 2 and about 700 milliWatts/cm 2 may be provided to the showerhead.
  • the RF powers in the present disclosure are expressed as Watts supplied to an electrode per substrate area.
  • the pressure of the chamber may be maintained between about 1 Torr and about 100 Torr, preferably between about 3 Torr and about 20 Torr, more preferably between 4 Torr and about 12 Torr.
  • the deposition rate of the p-type microcrystalline silicon contact layer may be about 10 A/min or more.
  • the p- type microcrystalline silicon contact layer has a crystalline fraction between about 20 percent and about 80 percent, preferably between 50 percent and about 70 percent.
  • Certain embodiments of depositing a p-type amorphous silicon layer may comprise providing a gas mixture of hydrogen gas to silane gas in a ratio of about 20:1 or less.
  • Silane gas may be provided at a flow rate between about 1 sccm/L and about 10 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 5 sccm/L and 60 sccm/L.
  • Trimethylboron may be provided at a flow rate between about 0.005 sccm/L and about 0.05 sccm/L.
  • the dopant/carrier gas mixture may be provided at a flow rate between about 1 sccm/L and about 10 sccm/L.
  • Methane may be provided at a flow rate between about 1 sccm/L and 15 sccm/L.
  • An RF power between about 15 milliWatts/cm 2 and about 200 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber is maintained between about 0.1 Torr and 20 Torr, preferably between about 1 Torr and about 4 Torr.
  • the deposition rate of the p-type amorphous silicon layer may be about 100 A/min or more.
  • Methane or other carbon containing compounds such as C 3 H 8 , C 4 Hi 0 , C 2 H 2 , can be used to improve the window properties (e.g. to lower absorption of solar radiation) of p-type amorphous silicon layer.
  • window properties e.g. to lower absorption of solar radiation
  • an increased amount of solar radiation may be absorbed through the intrinsic layers and thus cell efficiency is improved.
  • Certain embodiments of depositing an intrinsic type amorphous silicon layer comprises providing a gas mixture of hydrogen gas to silane gas in a ratio of about 20:1 or less.
  • Silane gas may be provided at a flow rate between about 0.5 sccm/L and about 7 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 5 sccm/L and 60 sccm/L.
  • An RF power between 15 milliWatts/cm 2 and about 250 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 0.1 Torr and 20 Torr, preferably between about 0.5 Torr and about 5 Torr.
  • the deposition rate of the intrinsic type amorphous silicon layer may be about 100 A/min or more.
  • Certain embodiments of depositing an n-type amorphous silicon buffer layer comprise providing hydrogen gas to silicon gas in a ratio of about 20:1 or less.
  • Silane gas may be provided at a flow rate between about 1 sccm/L and about 10 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 4 sccm/L and about 50 sccm/L.
  • Phosphine may be provided at a flow rate between about 0.0005 sccm/L and about 0.0075 sccm/L.
  • the dopant/carrier gas mixture may be provided at a flow rate between about 0.1 sccm/L and about 1.5 sccm/L.
  • An RF power between about 15 milliWatts/cm 2 and about 250 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 0.1 Torr and 20 Torr, preferably between about 0.5 Torr and about 4 Torr.
  • the deposition rate of the n-type amorphous silicon buffer layer may be about 200 A/min or more.
  • Certain embodiments of depositing a n-type microcrystalline silicon layer may comprise providing a gas mixture of hydrogen gas to silane gas in a ratio of about 100:1 or more.
  • Silane gas may be provided at a flow rate between about 0.1 sccm/L and about 0.8 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 30 sccm/L and about 250 sccm/L.
  • Phosphine may be provided at a flow rate between about 0.0005 sccm/L and about 0.004 sccm/L.
  • the dopant/carrier gas may be provided at a flow rate between about 0.1 sccm/L and about 0.8 sccm/L.
  • An RF power between about 100 milliWatts/cm 2 and about 900 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 1 Torr and about 100 Torr, preferably between about 3 Torr and about 20 Torr, more preferably between 4 Torr and about 12 Torr.
  • the deposition rate of the n-type microcrystalline silicon layer may be about 50 A/min or more.
  • the n-type microcrystalline silicon layer has a crystalline fraction between about 20 percent and about 80 percent, preferably between 50 percent and about 70 percent.
  • Certain embodiments of depositing a p-type microcrystalline silicon layer, such as silicon layer 132 of Figure 1 , Figure 2, or Figure 3, comprises providing a gas mixture of hydrogen gas to silane gas in a ratio of about 200:1 or greater.
  • Silane gas may be provided at a flow rate between about 0.1 sccm/L and about 0.8 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 60 sccm/L and about 500 sccm/L.
  • Trimethylboron may be provided at a flow rate between about 0.0002 sccm/L and about 0.0016 sccm/L. In other words, if trimethylboron is provided in a 0.5% molar or volume concentration in a carrier gas, then the dopant/carrier gas mixture may be provided at a flow rate between about 0.04 sccm/L and about 0.32 sccm/L.
  • An RF power between about 50 milliWatts/cm 2 and about 700 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 1 Torr and about 100 Torr, preferably between about 3 Torr and about 20 Torr, more preferably between 4 Torr and about 12 Torr.
  • the deposition rate of the p-type microcrystalline silicon layer may be about 10 A/min or more.
  • the p-type microcrystalline silicon contact layer has a crystalline fraction between about 20 percent and about 80 percent, preferably between 50 percent and about
  • Certain embodiments of depositing an intrinsic type microcrystalline silicon layer may comprise providing a gas mixture of silane gas to hydrogen gas in a ratio between 1 :20 and 1 :200.
  • Silane gas may be provided at a flow rate between about 0.5 sccm/L and about 5 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 40 sccm/L and about 400 sccm/L.
  • the silane flow rate may be ramped up from a first flow rate to a second flow rate during deposition.
  • the hydrogen flow rate may be ramped down from a first flow rate to a second flow rate during deposition.
  • An RF power between about 300 milliWatts/cm 2 or greater, preferably 600 milliWatts/cm 2 or greater, may be provided to the showerhead.
  • the power density may be ramped down from a first power density to a second power density during deposition.
  • the pressure of the chamber is maintained between about 1 Torr and about 100 Torr, preferably between about 3 Torr and about 20 Torr, more preferably between about 4 Torr and about 12 Torr.
  • the deposition rate of the intrinsic type microcrystalline silicon layer may be about 200 A/min or more, preferably 500 A/min.
  • microcrystalline silicon intrinsic layer has a crystalline fraction between about 20 percent and about 80 percent, preferably between 55 percent and about 75 percent. It was surprising to find that a microcrystalline silicon intrinsic layer having a crystalline fraction of about 70% or below provided an increase in open circuit voltage and leads to higher cell efficiency.
  • Certain embodiments of a method depositing a n-type amorphous silicon layer may comprise depositing an optional first n-type amorphous silicon layer at a first silane flow rate and depositing a second n-type amorphous silicon layer over the first optional n-type amorphous silicon layer at a second silane flow rate lower than the first silane flow rate.
  • the first optional n-type amorphous silicon layer may comprise providing a gas mixture of hydrogen gas to silane gas in a ratio of about 20:1 or less.
  • Silane gas may be provided at a flow rate between about 1 sccm/L and about 10 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 4 sccm/L and about 40 sccm/L.
  • Phosphine may be provided at a flow rate between about 0.0005 sccm/L and about 0.0075 sccm/L.
  • the dopant/carrier gas mixture may be provided at a flow rate between about 0.1 sccm/L and about 1.5 sccm/L.
  • An RF power between 25 milliWatts/cm 2 and about 250 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 0.1 Torr and about 20 Torr, preferably between about 0.5 Torr and about 4 Torr.
  • the deposition rate of the first n-type type amorphous silicon layer may be about 200 A/min or more.
  • the second n-type amorphous silicon layer may comprise providing a gas mixture of hydrogen gas to silane gas in a ratio of about 20:1 or less.
  • Silane gas may be provided at a flow rate between about 0.1 sccm/L and about 1 sccm/L.
  • Hydrogen gas may be provided at a flow rate between about 1 sccm/L and about 10 sccm/L.
  • Phosphine may be provided at a flow rate between 0.01 sccm/L and about 0.075 sccm/L. In other words, if phosphine is provided in a 0.5% molar or volume concentration in a carrier gas, then the dopant/carrier gas mixture may be provided at a flow rate between about 2 sccm/L and about 15 sccm/L. An RF power between 25 milliWatts/cm 2 and about 250 milliWatts/cm 2 may be provided to the showerhead.
  • the pressure of the chamber may be maintained between about 0.1 Torr and about 20 Torr, preferably between about 0.5 Torr and about 4 Torr.
  • the deposition rate of the second n-type type amorphous silicon layer may be about 100 A/min or more.
  • the second n-type amorphous silicon layer is heavily doped and has a resistivity of about 500 Ohm-cm or below. It is believed that the heavily n-type doped amorphous silicon provides improved ohmic contact with a TCO layer, such as layer TCO layer 140. Thus, cell efficiency is improved.
  • the optional first n-type amorphous silicon is used to increase the deposition rate for the entire n-type amorphous silicon layer. It is understood that the n-type amorphous silicon layer may be formed without the optional first n-type amorphous silicon and may be formed primarily of the heavily doped second n-type amorphous layer.
  • FIG. 5 is a top schematic view of one embodiment of a process system 500 having a plurality of process chambers 531-537, such as PECVD chambers chamber 400 of Figure 4 or other suitable chambers capable of depositing silicon films.
  • the process system 500 includes a transfer chamber 520 coupled to a load lock chamber 510 and the process chambers 531-537.
  • the load lock chamber 510 allows substrates to be transferred between the ambient environment outside the system and vacuum environment within the transfer chamber 520 and process chambers 531-537.
  • the load lock chamber 510 includes one or more evacuatable regions holding one or more substrate. The evacuatable regions are pumped down during input of substrates into the system 500 and are vented during output of the substrates from the system 500.
  • the transfer chamber 520 has at least one vacuum robot 522 disposed therein that is adapted to transfer substrates between the load lock chamber 510 and the process chambers 531-537. Seven process chambers are shown in Figure 5; however, the system may have any suitable number of process chambers. [0040] In certain embodiments of the invention, one system 500 is configured to deposit the first p-i-n junction comprising an intrinsic type amorphous silicon layer(s) of a multi-junction solar cell, such as the first p-i-n junction 120 of Figure 1 , Figure 2, or Figure 3.
  • One of the process chambers 531-537 is configured to deposit the p-type silicon layer(s) of the first p-i-n junction while the remaining process chambers 531-537 are each configured to deposit both the intrinsic type amorphous silicon layer(s) and the n-type silicon layer(s).
  • the intrinsic type amorphous silicon layer(s) and the n-type silicon layer(s) of the first p-i-n junction may be deposited in the same chamber without any passivation process in between the deposition steps.
  • a substrate enters the system through the load lock chamber 510, is transferred by the vacuum robot into the dedicated process chamber configured to deposit the p- type silicon layer(s), is transferred by the vacuum robot into one of the remaining process chamber configured to deposited both the intrinsic type silicon layer(s) and the n-type silicon layer(s), and is transferred by the vacuum robot back to the load lock chamber 510.
  • the time to process a substrate with the process chamber to form the p-type silicon layer(s) is approximately 4 or more times faster, preferably 6 or more times faster, than the time to form the intrinsic type amorphous silicon layer(s) and the n-type silicon layer(s) in a single chamber.
  • the ratio of p-chambers to i/n- chambers is 1 :4 or more, preferably 1 :6 or more.
  • the throughput of the system including the time to provide plasma cleaning of the process chambers may be about 10 substrates/hr or more, preferably 20 substrates/hr or more.
  • one system 500 is configured to deposit the second p-i-n junction comprising an intrinsic type microcrystalline silicon layer(s) of a multi-junction solar cell, such as the second p-i-n junction 130 of Figure 1 , Figure 2, or Figure 3.
  • One of the process chambers 531-537 is configured to deposit the p-type silicon layer(s) of the first p-i-n junction while the remaining process chambers 531-537 are each configured to deposit both the intrinsic type microcrystalline silicon layer(s) and the n-type silicon layer(s).
  • the intrinsic type microcrystalline silicon layer(s) and the n-type silicon layer(s) of the second p-i-n junction may be deposited in the same chamber without any passivation process in between the deposition steps.
  • the time to process a substrate with the process chamber to form the p-type silicon layer(s) is approximately 4 or more times faster than the time to form the intrinsic type microcrystalline silicon layer(s) and the n-type silicon layer(s) in a single chamber.
  • the ratio of p- chambers to i/n-chambers is 1 :4 or more, preferably 1:6 or more.
  • the throughput of the system including the time to provide plasma cleaning of the process chambers may be about 3 substrates/hr or more, preferably 5 substrates/hr or more.
  • the throuphput of the system 500 for depositing the first p-i-n junction comprising an intrinsic type amorphous silicon layer is approximately 2 times or more the throughput of the system 500 for depositing the second p-i-n junction comprising an intrinsic type microcrystalline silicon layer since the thickness of the intrinsic type microcrystalline silicon layer(s) is thicker than the intrinsic type amorphous silicon layer(s). Therefore, a single system 500 adapted to deposit a first p-i-n junction comprising intrinsic type amorphous silicon layer(s) can be matched with two or more systems 500 adapted to deposit a second p-i-n junction comprising intrinsic type microcrystalline silicon layer(s).
  • the substrate may be exposed to the ambient environment (i.e., vacuum break) and transferred to the second system.
  • a wet or dry cleaning of the substrate between the first system depositing the first p-i-n junction and the second p-i-n junction is not necessary.
  • Substrates having a surface area of 4,320 cm 2 were processed in an AKT 4300 PECVD System, available from AKT America, Inc., of Santa Clara, California, having an interior chamber volume of 130 liters.
  • Layer 1 was deposited in a first chamber of the PECVD system.
  • Layers 2-4 were deposited in a second chamber of the PECVD system.
  • Layer 5 was deposited in a third chamber of the PECVD system.
  • Layers 6-11 were deposited in a fourth chamber of the PECVD system. The spacing during deposition of layers 1-11 was set to 550 mil and the temperature of the substrate support was set to 200°C.
  • the deposition parameters are set forth in the Figure 6 to form a tandem p-i-n junction solar cell.
  • Phosphine was provided in a 0.5% mixture in a hydrogen carrier gas.
  • Trimethylboron was provided in a 0.5% mixture in a hydrogen carrier gas.
  • the hydrogen gas flow rates in Figure 6 show the hydrogen gas flow rates separate from the dopant carrier gas.
  • the solar cell had the following properties set forth in Figure 7.
  • embodiments of the invention have been described in reference to a first system configured to form a first p-i-n junction and a second p-i-n junction. It is understood that in other embodiments of the invention, the first p-i-n junction and a second p-i-n junction may be formed in a single system.
  • embodiments of the invention have been described in reference to a process chamber adapted to deposit both an intrinsic type layer and an n-type layer. It is understood that in other embodiments of the invention, separate chambers may be adapted to deposit the intrinsic type layer and the n-type layer. It is understood that in other embodiments of the invention, a process chamber may be adapted to deposit both a p-type layer and an intrinsic type layer.

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US20080188033A1 (en) 2008-08-07
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