WO2007084879A3 - Envers à faible résistance et inductance utilisant des vias, et leur procédé de fabrication - Google Patents

Envers à faible résistance et inductance utilisant des vias, et leur procédé de fabrication Download PDF

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Publication number
WO2007084879A3
WO2007084879A3 PCT/US2007/060544 US2007060544W WO2007084879A3 WO 2007084879 A3 WO2007084879 A3 WO 2007084879A3 US 2007060544 W US2007060544 W US 2007060544W WO 2007084879 A3 WO2007084879 A3 WO 2007084879A3
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WO
WIPO (PCT)
Prior art keywords
substrate
backside
trench
vias
inductance
Prior art date
Application number
PCT/US2007/060544
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English (en)
Other versions
WO2007084879A2 (fr
Inventor
Mete Erturk
Robert A Groves
Jeffrey B Johnson
Alvin J Joseph
Qizhi Liu
Edmund J Sprogis
Anthony K Stamper
Original Assignee
Ibm
Mete Erturk
Robert A Groves
Jeffrey B Johnson
Alvin J Joseph
Qizhi Liu
Edmund J Sprogis
Anthony K Stamper
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm, Mete Erturk, Robert A Groves, Jeffrey B Johnson, Alvin J Joseph, Qizhi Liu, Edmund J Sprogis, Anthony K Stamper filed Critical Ibm
Priority to JP2008550554A priority Critical patent/JP2009524220A/ja
Priority to EP07710130A priority patent/EP1979932A4/fr
Priority to CN200780002315.8A priority patent/CN101371332B/zh
Publication of WO2007084879A2 publication Critical patent/WO2007084879A2/fr
Publication of WO2007084879A3 publication Critical patent/WO2007084879A3/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention porte sur une structure de contact d’envers et sur son procédé de fabrication consistant: à former une première isolation diélectrique (250) sur un substrat (100) présentant un endroit et en envers; à former dans la première couche diélectrique (105) une rainure alignée sur le périmètre de l’isolation diélectrique (250) et intérieure à son périmètre et s'étendant vers l’isolation diélectrique (250); à étendre la rainure (265C) formée dans la couche diélectrique (105) dans l’isolation diélectrique (250) et dans le substrat (100) jusqu'à une profondeur (DI) inférieure à l’épaisseur du substrat (100); à remplir la rainure (265C) et en aplanir la surface supérieure avec celle de la première couche diélectrique (105) pour former un via traversant conducteur (270C); et à amincir le substrat (100) depuis son envers pour exposer le via (270C).
PCT/US2007/060544 2006-01-13 2007-01-15 Envers à faible résistance et inductance utilisant des vias, et leur procédé de fabrication WO2007084879A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008550554A JP2009524220A (ja) 2006-01-13 2007-01-15 低抵抗及び低インダクタンスの裏面貫通ビア及びその製造方法
EP07710130A EP1979932A4 (fr) 2006-01-13 2007-01-15 Envers à faible résistance et inductance utilisant des vias, et leur procédé de fabrication
CN200780002315.8A CN101371332B (zh) 2006-01-13 2007-01-15 低电阻和电感的背面通孔及其制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/275,542 2006-01-13
US11/275,542 US7563714B2 (en) 2006-01-13 2006-01-13 Low resistance and inductance backside through vias and methods of fabricating same

Publications (2)

Publication Number Publication Date
WO2007084879A2 WO2007084879A2 (fr) 2007-07-26
WO2007084879A3 true WO2007084879A3 (fr) 2008-02-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/060544 WO2007084879A2 (fr) 2006-01-13 2007-01-15 Envers à faible résistance et inductance utilisant des vias, et leur procédé de fabrication

Country Status (6)

Country Link
US (2) US7563714B2 (fr)
EP (1) EP1979932A4 (fr)
JP (2) JP2009524220A (fr)
CN (1) CN101371332B (fr)
TW (1) TW200741916A (fr)
WO (1) WO2007084879A2 (fr)

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Also Published As

Publication number Publication date
US7563714B2 (en) 2009-07-21
WO2007084879A2 (fr) 2007-07-26
JP2009524220A (ja) 2009-06-25
US7851923B2 (en) 2010-12-14
TW200741916A (en) 2007-11-01
JP5559281B2 (ja) 2014-07-23
CN101371332B (zh) 2011-10-05
JP2013048274A (ja) 2013-03-07
EP1979932A2 (fr) 2008-10-15
US20070190692A1 (en) 2007-08-16
US20090184423A1 (en) 2009-07-23
EP1979932A4 (fr) 2012-03-14
CN101371332A (zh) 2009-02-18

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