WO2006019082A1 - 試験装置、コンフィグレーション方法、及びデバイスインターフェース - Google Patents
試験装置、コンフィグレーション方法、及びデバイスインターフェース Download PDFInfo
- Publication number
- WO2006019082A1 WO2006019082A1 PCT/JP2005/014924 JP2005014924W WO2006019082A1 WO 2006019082 A1 WO2006019082 A1 WO 2006019082A1 JP 2005014924 W JP2005014924 W JP 2005014924W WO 2006019082 A1 WO2006019082 A1 WO 2006019082A1
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- WIPO (PCT)
- Prior art keywords
- test
- signal
- diagnostic
- output
- electronic device
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31907—Modular tester, e.g. controlling and coordinating instruments in a bus based architecture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
Definitions
- the present invention relates to a test apparatus for testing an electronic device, a device interface used for the test apparatus, and a configuration method for the test apparatus.
- the present invention also relates to the following US patent applications. For designated countries where incorporation by reference of documents is permitted, the contents described in the following application are incorporated into this application by reference and made a part of the description of this application.
- test apparatus for testing an electronic device such as a semiconductor circuit, a device interface on which the electronic device is mounted, an input signal input to the electronic device connected to the electronic device via the device interface
- a configuration is known that includes a test module that generates data and a control unit that supplies a signal for controlling the test module.
- the test module is installed in a slot provided between the device interface and the control unit.
- an object of the present invention is to provide a test apparatus, a configuration method, and a device interface that can solve the above-described problems. This object is achieved by a combination of features described in the independent claims.
- the dependent claims define further advantageous specific examples of the present invention.
- a test apparatus for testing an electronic device has a plurality of output ports, A bus switch that can switch the output from one of the output ports and multiple control signals according to the test program for testing the electronic device are input to the bus switch, and each control signal is sent to which output port.
- a control unit that controls whether to output from the device, and a test that is provided corresponding to multiple output ports, generates an input signal to be input to the electronic device based on the control signal, and receives the output signal output from the electronic device It has multiple slots where modules are installed and multiple connectors to be connected to electronic devices, and it can be switched between connecting multiple slots to misaligned connectors.
- the test apparatus further includes a configuration memory for storing in advance a configuration file indicating which connector each output port should be connected to.
- the control unit compares the detection result of which connector each output port is connected to the configuration file and the multiple output ports and multiple connectors are correctly connected. Please judge whether or not.
- the test apparatus may further include a plurality of test modules each having a diagnostic circuit that is provided in each slot and outputs a predetermined signal to the control unit when a diagnostic signal is received.
- the diagnostic circuit sends a predetermined signal via the output port corresponding to the slot.
- the control unit may output to the control unit, and the control unit may detect to which connector each output port is connected based on which output port has received the predetermined signal.
- the configuration memory stores a configuration file further indicating module identification information for identifying a test module to be installed in each slot, and the test module is an identification for storing module identification information of the test module.
- the diagnostic circuit receives the diagnostic signal, the diagnostic circuit further outputs the module identification information stored in the identification memory to the control unit, and the control unit is installed in each slot. Compare the module identification information that also received the test module power with the module identification information of the test module that should be installed in the slot, and further determine whether or not the test module is correctly installed in each slot! Do it!
- the test module further includes a device test circuit for generating an input signal based on the control signal, and each connector includes a device pin for connecting the device test circuit and the electronic device, and A diagnostic pin for connecting the diagnostic circuit and the diagnostic decoder may be provided.
- a configuration method for performing configuration of a test apparatus for testing an electronic device the test apparatus having a plurality of output ports and receiving an input signal.
- a bus switch that can be switched from which output port and multiple control signals according to the test program for testing the electronic device are input to the bus switch, and each control signal is sent to which output port.
- a control unit that controls whether to output from an electronic device and a test that is provided for multiple output ports, generates an input signal to be input to the electronic device based on the control signal, and receives the output signal output from the electronic device It has multiple slots in which modules are installed and multiple connectors to be connected to electronic devices.
- a device interface capable of switching whether to connect to each connector includes a diagnostic signal supply step for sequentially supplying a diagnostic signal to each test module via each connector; Based on the detection result and the detection result to detect which test module the diagnostic signal through each connector is supplied to Thus, there is provided a configuration method including a position detection step of detecting which connector each output port is connected to.
- the diagnostic test module arranged in a predetermined slot may sequentially generate diagnostic signals to be supplied to other test modules!
- the device interface connects the electronic device and the test apparatus main body, and the test apparatus main body includes a plurality of output ports.
- a bus switch unit that can switch which output port the input signal is output from and a plurality of control signals according to a test program for testing an electronic device are input to the bus switch unit.
- a control unit that controls from which output port each control signal is output, and an input signal that is provided corresponding to the plurality of output ports and that is to be input to the electronic device is generated based on the control signal.
- a device interface is provided that includes a diagnostic decoder that sequentially supplies each test module via a connector.
- FIG. 1 is a diagram showing an example of the configuration of a test apparatus 100 according to an embodiment of the present invention.
- FIG. 2 is a diagram showing an example of the configuration of a performance board 34.
- FIG. 3 is a diagram showing an example of the configuration of a diagnostic test module 50-1.
- FIG. 4 is a diagram showing an example of the configuration of another test module 50.
- 5 is a diagram showing an example of the configuration of the connector 36.
- FIG. 6 is a diagram showing an example of the data structure of a configuration file.
- FIG. 7 is a flowchart showing an example of a configuration method of the test apparatus 100.
- FIG. 8 is a flowchart for explaining details of processing in S308, S310, and S312.
- FIG. 1 is a diagram showing an example of the configuration of a test apparatus 100 according to an embodiment of the present invention.
- the test apparatus 100 is an apparatus for testing a plurality of electronic devices (200-1 to 200-8, hereinafter collectively referred to as 200) such as a semiconductor chip, and includes a control unit 60, a bus switch unit 18, and a plurality of slots. (20-1 to 20-64, hereinafter collectively referred to as 20), a plurality of test modules (50-1 to 50-64, hereinafter collectively referred to as 50), and a device interface 30.
- the control unit 60 inputs a plurality of control signals to the bus switch unit 18 according to a predetermined test program for testing the electronic device 200.
- the control unit 60 includes a system controller 10, a configuration memory 12, a hub 14, and a plurality of sites (16-1 to 16-8, hereinafter collectively referred to as 16).
- the system controller 10 controls the operation of the test apparatus 100 according to the test program. That is, a control signal corresponding to the test program is generated. Multiple sites 16 test It controls the test module 50 provided corresponding to the plurality of electronic devices 200 to be connected and connected to the corresponding electronic device 200, and exchanges signals with the test module 50.
- the hub 14 distributes the control signal generated by the system controller 10 to each site 16.
- the configuration memory 12 stores in advance a configuration file indicating the setting of the test apparatus 100.
- the configuration file is a file stored in advance by the user of the test apparatus 100.
- the settings of the test apparatus 100 include, for example, the settings of the bus switch unit 18, the information of the test module 50 to be used, and the device interface. Interface 30 settings, bus switch 18 output port device interface 30 !, information indicating whether to be connected with a misaligned connector, identifying test module 50 to be installed in each slot 20 Module identification information and the like.
- the bus switch unit 18 has a plurality of output ports, and switches from which output port an input signal is output. That is, the bus switch unit 18 sets which output port is assigned to each site 16. As an example, the bus switch unit 18 in this example assigns output ports 1 to 8 to the site 16-1, assigns output ports 9 to 16 to the site 16-2, and so on. Assign a port.
- the control unit 60 controls the bus switch unit 18 to control from which output port each control signal is output.
- the plurality of slots 20 are slots in which the test modules 50 are installed, and are provided corresponding to the plurality of output ports of the nos switch unit 18.
- Each test module 50 is a module that exchanges signals with the corresponding electronic device 200, and is provided for each function for testing the electronic device 200. For example, the test module 50 generates an input signal to be input to the corresponding electronic device 200 based on the control signal, receives an output signal output from the corresponding electronic device 200, and determines whether the electronic device 200 is good or bad However, it may also be a module that supplies power to the electronic device 200.
- the test module 50 may be a module that exchanges analog or digital signals with the electronic device 200, and may be a module that exchanges DC or AC signals with the electronic device 200.
- the device interface 30 is a board on which the electronic device 200 is mounted.
- the device 200 and the test module 50 are electrically connected.
- the device interface 30 includes a performance board 34 provided with a plurality of connectors to which a plurality of electronic devices 200 are connected, and a switch circuit 32 that switches between connecting the plurality of slots 20 to the shifted connectors.
- the performance board 34 is sometimes called a load board.
- the input port of the bus switch unit 18 and the output port and the slot 20 can be arbitrarily connected by switching the bus switch unit 18. Further, by switching the switch circuit 32, the output port and slot 20 of the switch unit 18 and the connector of the device interface 30 can be arbitrarily connected.
- the switch circuit 32 has, for example, a plurality of cables, and the connection between the slot 20 and the connector may be changed by changing the cable wiring.
- the switch circuit 32 may be called a test fixture.
- FIG. 2 is a diagram illustrating an example of the configuration of the performance board 34.
- the performance board 34 has a plurality of connectors (36-1 to 36-64, hereinafter collectively referred to as 36) and a diagnostic decoder 38.
- the plurality of connectors 36 are connected to the test module 50 via the switch circuit 32 and electrically connect the test module 50 and the electronic device 200. As described above, by setting the switch circuit 32, an arbitrary test module 50 and an arbitrary connector 36 can be connected.
- the test apparatus 100 When operating in the diagnostic mode, the test apparatus 100 installs a diagnostic test module 50 in a predetermined slot 20, and the diagnostic test module 50 is connected to each of the connectors 36, the switch circuit 32, and the like.
- the diagnostic signal is transmitted in the order of the test module 50 and the output port of the bus switch unit 18.
- the control unit 60 detects to which of the other test modules 50 the diagnostic signal supplied to each connector 36 is transmitted, and the setting of the switch circuit 32 is stored in the configuration file stored in the configuration memory 12. And order Check if they match. That is, the control unit 60 compares the detection result of which output port each output port is connected to the configuration file with the configuration file, so that a plurality of output ports and a plurality of connectors 36 are connected. Determine whether the power is correctly connected. When the plurality of output ports and the plurality of connectors 36 are not correctly connected, the control unit 60 notifies the user of the test apparatus 100 to that effect.
- the diagnostic decoder 38 sequentially supplies diagnostic signals received from the slots 20 in which the diagnostic test modules 50 are installed to the respective test modules 50 via the respective connectors 36.
- the slot 20 in which the diagnostic test module 50 is installed is determined in advance, and in this example, the diagnostic test module 50 is installed in the slot 20-1.
- the diagnostic decoder 38 supplies the diagnostic signals received from the slot 20-1 via the predetermined connector 36-1 among the plurality of connectors 36 to the respective test modules 50 in order.
- the control unit 60 determines the predetermined one of the slot 20-1 in which the diagnostic test module 50-1 is to be installed and the plurality of connectors 36.
- the switch circuit 32 is controlled so that the connector 36-1 is connected, and a control signal for generating a diagnostic signal is supplied to the diagnostic test module 50-1.
- the diagnostic test module 50-1 generates a diagnostic signal designating each connector 36 in accordance with a given control signal. For example, the diagnostic test module 50-1 generates a multi-bit diagnostic signal designating each connector 36 in binary.
- the diagnostic decoder 80 decodes the binary diagnostic signal into a multiple-bit diagnostic signal in which only the bit indicated by the binary number is 1.
- Each bit of the diagnostic signal output from the diagnostic decoder 80 is associated with one of the plurality of connectors 36, and each bit of the diagnostic signal is connected to the test module 50 via the corresponding connector 36.
- the diagnostic test module 50-1 sequentially generates a binary diagnostic signal that is incremented by 1, and sequentially supplies a diagnostic signal indicating a predetermined logical value to each test module 50.
- FIG. 3 is a diagram showing an example of the configuration of the diagnostic test module 50-1.
- the diagnostic test module 50-1 includes a diagnostic signal generation unit 52, a notch 54, and a voltage shift circuit 56.
- the diagnostic signal generator 52 generates a diagnostic signal in accordance with a control signal supplied from the controller 60 via the bus switch unit 18.
- control unit 60 sequentially supplies a plurality of control signals for sequentially designating the respective connectors 36 to the diagnostic signal generating unit 52, and the diagnostic signal generating unit 52 is designated by the respective control signals.
- Binary diagnostic signals corresponding to the connector 36 are sequentially generated.
- the buffer 54 is provided between the diagnostic signal generator 52 and the voltage shift circuit 56, and the diagnostic signal generated by the diagnostic signal generator 52 is sent to the diagnostic decoder 38 via the connector 36-1. Supply.
- the voltage shift circuit 56 adjusts the voltage level of the diagnostic signal output from the notch 54 to an arbitrary level.
- FIG. 4 is a diagram illustrating an example of the configuration of another test module 50.
- the other test module 50 is a test module 50 installed in the slot 20 which is not the slot 20 in which the diagnostic test module 50-1 is to be installed.
- the diagnostic circuit 70 outputs a predetermined signal to the control unit 60 when it receives a diagnostic signal indicating H logic.
- the diagnostic circuit 70 outputs the predetermined signal to the control unit 60 via the output port and the input port of the bus switch unit 18 corresponding to the slot 20 in which the test module 50 is installed.
- the predetermined signal may be a diagnostic signal.
- the diagnostic circuit 70 may output information on the test module 50 to the control unit 60 together.
- the control unit 60 determines whether the connector 36 specified by the control signal is connected to the bus switch depending on which output port of the bus switch unit 18 has received the signal output from the diagnostic circuit 70. It is possible to detect which output port of the switch unit 18 is connected. The control unit 60 also determines the input port, output port, slot 20, and connector of the bus switch unit 18 depending on which input port of the bus switch unit 18 receives the signal output from the diagnostic circuit 70. It can be determined whether or not it matches 36 connection strength configuration files.
- the diagnostic circuit 70 includes a pull-up resistor 68, a noffer 66, a location sense circuit 62, and an identification memory 64.
- the noffer 66 inputs a diagnostic signal to the location sense circuit 62.
- the location sense circuit 62 has an input terminal (Lo SE NSE1) to which a diagnostic signal is input, and outputs a predetermined signal to the control unit 60 when an H logic is input to the input terminal.
- the identification memory 64 stores module identification information, manufacturer identification information, a manufacturing model number, a manufacturing number, and the like of the test module 50.
- the diagnostic circuit 70 outputs the information of these test modules 50 together with the control unit 60 when receiving the diagnostic signal of H logic.
- the control unit 60 compares the module identification information received from the test module 50 installed in each slot 20 with the module identification information of the test module 50 to be installed in the slot 20 in the configuration file. Then, it can be further determined whether or not each slot 20 is correct! / And a test module 50 is installed!
- the location sense circuit 62 When the test module 50 is connected to the plurality of connectors 36, the location sense circuit 62 has a plurality of input terminals connected to the plurality of connectors 36. In this case, it is preferable that the location sense circuit 62 outputs a predetermined signal for each signal input to each input terminal. For example, if the location sense circuit 62 has two input terminals (Loc_SENSEl, LOC_SENSE2), the location sense circuit 62 will be able to It is preferable to notify the control unit 60 of the information indicating whether or not the signal having the logical value of the signal input to the input terminal (LOC_SENSE2) is H or not.
- LOC_SENSE2 the location sense circuit 62 will be able to It is preferable to notify the control unit 60 of the information indicating whether or not the signal having the logical value of the signal input to the input terminal (LOC_SENSE2) is H or not.
- FIG. 5 is a diagram illustrating an example of the configuration of the connector 36.
- the connector 36 has device pins 72 for connecting the device test circuit 58 and the electronic device 200, and diagnostic pins 74 for connecting the diagnostic circuit 70 and the diagnostic decoder 38. With such a configuration, after setting the test apparatus 100 to test the electronic device 200, it is possible to confirm whether or not the test apparatus 100 is correctly set without changing the setting.
- the device pins 72 and the diagnostic pins 74 are preferably provided in a predetermined pin arrangement. Further, the connector 36 to which the diagnostic test module 50-1 is connected connects the diagnostic decoder 38 and the diagnostic test module 50-1 by the diagnostic pin 74.
- FIG. 6 is a diagram illustrating an example of the data structure of the configuration file.
- the configuration memory 12 includes an identification number (Slot) of slot 20, a test module name (Board Name) to be installed in each slot 20, and a test module 50 in each slot 20.
- Slot identification number
- Board Name test module name
- Existence information indicating whether it is installed (Existence), manufacturer identification information (Vendor ID) of the test module 50, identification information of the test module 50 (Module ID), and physical The physical number (Physical) indicating the correct position, the manufacturing model number (Product ID) of the test module 50, the manufacturing number (Product S / N) of the test module 50, and the bus switch section 18 to be connected to the test module 50 Input port number, identification number (PB1, PB2) of the connector 36 to be connected to the test module 50, and nose to be connected to the test module 50 Previously storing a configuration file which associates the output port number (Bus Port) of the pitch portion 18.
- FIG. 7 is a flowchart showing an example of a configuration method for the test apparatus 100.
- the switch circuit 32 is set, and the setting is fixed.
- it is determined whether or not the setting is fixed (S300). If the setting is not fixed, fail processing (S304) is performed and the configuration is completed. If the setting is fixed, it is determined whether or not a test module 50-1 for diagnosis is installed in a predetermined slot 20! (S302). [0044] If the diagnostic test module 50-1 is not installed in the predetermined slot 20, the fail process (S304) is performed and the configuration is terminated.
- the maximum value (Module_max) of the physical number set in the configuration file is acquired (S306).
- the physical number is changed from 1 to Modulejnax, a diagnosis signal that is H logic is sequentially supplied to the connector 36 corresponding to each physical number, and the diagnosis signal is supplied to each test module 50.
- Supply sequentially (diagnosis signal supply step S308).
- test module 50 is supplied with the diagnostic signal via each connector 36 (signal detection step S310). Then, based on the detection result in signal detection step S310, it is detected which connector 36 each output port is connected to (position detection step S312). The processing of S310 and S312 may be repeated every time the diagnostic signal is supplied to the connector 36 of the displacement force until S308!
- FIG. 8 is a flowchart for explaining details of the processing of S308, S310, and S312.
- the connector 36 whose connection relation is to be diagnosed is designated (S314).
- test module 50-1 When connector identification number 1 is specified, for example, test module 50-1 generates a diagnostic signal indicating 1 in binary.
- a physical number is designated (S318).
- PB_connector PB_l and PB_2
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Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2005800329978A CN101031807B (zh) | 2004-08-20 | 2005-08-15 | 测试装置、配置方法、及设备接口 |
JP2006531797A JP4842823B2 (ja) | 2004-08-20 | 2005-08-15 | 試験装置、コンフィグレーション方法、及びデバイスインターフェース |
EP05780236A EP1790990A4 (en) | 2004-08-20 | 2005-08-15 | TEST DEVICE, CONFIGURATION METHOD, AND DEVICE INTERFACE |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/923,634 US7913002B2 (en) | 2004-08-20 | 2004-08-20 | Test apparatus, configuration method, and device interface |
US10/923,634 | 2004-08-20 |
Publications (1)
Publication Number | Publication Date |
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WO2006019082A1 true WO2006019082A1 (ja) | 2006-02-23 |
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ID=35907469
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Application Number | Title | Priority Date | Filing Date |
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PCT/JP2005/014924 WO2006019082A1 (ja) | 2004-08-20 | 2005-08-15 | 試験装置、コンフィグレーション方法、及びデバイスインターフェース |
Country Status (6)
Country | Link |
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US (1) | US7913002B2 (ja) |
EP (1) | EP1790990A4 (ja) |
JP (1) | JP4842823B2 (ja) |
KR (1) | KR20070053274A (ja) |
CN (1) | CN101031807B (ja) |
WO (1) | WO2006019082A1 (ja) |
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JP2008261853A (ja) * | 2007-04-13 | 2008-10-30 | Advantest Corp | 試験装置及び診断用パフォーマンスボード |
JP2019168427A (ja) * | 2018-03-26 | 2019-10-03 | 三菱電機エンジニアリング株式会社 | 保護継電器試験用切替装置及び保護継電器試験用切替方法 |
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CN102495820A (zh) * | 2011-11-24 | 2012-06-13 | 中国航空工业集团公司第六三一研究所 | 航空专用多接口维护方法及其系统 |
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- 2005-08-15 WO PCT/JP2005/014924 patent/WO2006019082A1/ja active Application Filing
- 2005-08-15 EP EP05780236A patent/EP1790990A4/en not_active Withdrawn
- 2005-08-15 CN CN2005800329978A patent/CN101031807B/zh active Active
- 2005-08-15 JP JP2006531797A patent/JP4842823B2/ja not_active Expired - Fee Related
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JP2019168427A (ja) * | 2018-03-26 | 2019-10-03 | 三菱電機エンジニアリング株式会社 | 保護継電器試験用切替装置及び保護継電器試験用切替方法 |
Also Published As
Publication number | Publication date |
---|---|
US20060041694A1 (en) | 2006-02-23 |
KR20070053274A (ko) | 2007-05-23 |
CN101031807B (zh) | 2010-09-29 |
EP1790990A4 (en) | 2010-08-11 |
EP1790990A1 (en) | 2007-05-30 |
JP4842823B2 (ja) | 2011-12-21 |
CN101031807A (zh) | 2007-09-05 |
US7913002B2 (en) | 2011-03-22 |
JPWO2006019082A1 (ja) | 2008-05-08 |
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