WO2000052738A2 - Verfahren zur herstellung hochdotierter halbleiterbauelemente - Google Patents
Verfahren zur herstellung hochdotierter halbleiterbauelemente Download PDFInfo
- Publication number
- WO2000052738A2 WO2000052738A2 PCT/DE2000/000546 DE0000546W WO0052738A2 WO 2000052738 A2 WO2000052738 A2 WO 2000052738A2 DE 0000546 W DE0000546 W DE 0000546W WO 0052738 A2 WO0052738 A2 WO 0052738A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- glass layer
- wafer
- dopant
- approximately
- neutral
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 239000011521 glass Substances 0.000 claims abstract description 41
- 238000000034 method Methods 0.000 claims abstract description 25
- 239000002019 doping agent Substances 0.000 claims abstract description 16
- 239000007787 solid Substances 0.000 claims abstract 2
- 235000012431 wafers Nutrition 0.000 claims description 42
- 230000007935 neutral effect Effects 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 239000007789 gas Substances 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 11
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 7
- 229910000077 silane Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000006193 liquid solution Substances 0.000 description 1
- HBVFXTAPOLSOPB-UHFFFAOYSA-N nickel vanadium Chemical compound [V].[Ni] HBVFXTAPOLSOPB-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- WRECIMRULFAWHA-UHFFFAOYSA-N trimethyl borate Chemical compound COB(OC)OC WRECIMRULFAWHA-UHFFFAOYSA-N 0.000 description 1
- WVLBCYQITXONBZ-UHFFFAOYSA-N trimethyl phosphate Chemical compound COP(=O)(OC)OC WVLBCYQITXONBZ-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005019 vapor deposition process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
Definitions
- the invention is based on a method for producing semiconductor components according to the preamble of the independent claim. It is known in the manufacture of
- the method according to the invention with the features of the independent claim has the advantage that doped regions can be produced with very good homogeneity.
- a further advantage is that it is possible to have such homogeneous regions of different doping types in only one, both on the front and on the back of the semiconductor wafer Introduce diffusion step. It is also possible to provide different levels of dopant concentrations on the front and back. The heating of the wafer and thus the driving of the doping atoms into the interior of the wafer to produce doped areas at high temperatures in the
- a range of approximately 1200 to 1280 degrees Celsius advantageously ensures a deep and concentrated penetration of the doping atoms into the wafer.
- a chemical vapor deposition process in particular a chemical vapor deposition process at atmospheric pressure (APCVD, “Atmospheric Pressure Chemical Vapor Deposition”), to coat the wafer surfaces with doping atoms.
- APCVD atmospheric pressure Chemical Vapor Deposition
- the glass layer provided with dopant with a neutral glass layer before the diffusion process. This will make one mutual influencing of the doping of the front and back or of different wafers set up at the same time in the diffusion open is reliably prevented.
- FIG. 1 shows a wafer with an applied glass layer
- FIG. 2 shows a wafer after a diffusion process
- FIG. 3 shows a wafer after removal of the glass layer.
- FIG. 1 shows a side view of a wire-sawed raw wafer 1 with high surface roughness, on the front of which a p-doped glass layer 2 and on the back of which an n-doped glass layer 4 is applied.
- the doped glass layers 2 and 4 are covered with a neutral glass layer 3 and 5, respectively.
- Glass layers 2 and 4 serve to cover the wafer with dopants.
- Vapor deposition process under atmospheric pressure there for example, the front of the wafer is first exposed to a silane gas in that the gas injectors to be passed on the conveyor belt flow onto the surface of the wafer with the gas.
- B2H6 is mixed with the silane gas.
- the silane disintegrates on the wafer surface at 380 degrees Celsius and reacts with oxygen to form silicon dioxide. Due to the B2H6 admixture, this glass is mixed with a p-type dopant.
- the glass layer 2 is grown up to a layer thickness of approximately 2 micrometers. The admixture of the
- B2H6 gas has been chosen so that the glass layer has a boron content of approximately 6 percent by weight.
- the glass layer is then exposed to the same silane gas, but without the addition of B2H6.
- the neutral glass layer 3 grows on the glass layer 2.
- the process is ended when the neutral glass layer 3 has a thickness of approximately 0.5 micrometers.
- the wafer is turned over and correspondingly coated with an n-doped glass layer 4 (thickness 2 micrometers, phosphorus content of approximately 6 percent by weight) on the back.
- the n-doping is achieved by adding the silane gas instead of B2H6 PH3.
- a neutral glass layer 5 with a thickness of 0.5 micrometers is then applied analogously to the front.
- TEOS "tetra-ethyl-orthosilicate”
- Si (OC 2 H 5 ) 4 gas is used instead of silane gas used, which is on the
- the doping is carried out by admixing gas with trimethyl phosphate or trimethyl borate.
- FIG. 2 shows the wafer after a diffusion process, with a heavily p-doped region 10 and a heavily n-doped region 11.
- a plurality of wafers to be processed simultaneously are arranged upright in an arrangement made of silicon carbide or polysilicon. This heating is maintained for approximately 20 to 30 hours, preferably 21 hours, and is carried out in particular in an oxidizing atmosphere. With a diffusion time of 21 hours to drive the dopants deposited on the surface in the form of glass layers into the interior of the wafer
- Phosphorus or Bordosen of about 1-2 x 10 to 17 centimeters high -2 in areas 10 and 11 reached. This is an order of magnitude higher dose than in otherwise typical semiconductor applications.
- the applied glass layers 2, 3, 4 and 5 are removed again, for example by means of 50 percent hydrofluoric acid, and the result is the wafer 1 shown in FIG Area 11 on the back.
- This wafer can now be used, for example, to produce high-blocking pn diodes (two-layer diodes) by applying metal contacts on both sides in further steps.
- metal contacts for example, metal layers are sputtered on both sides of the wafer simultaneously, first a 70 nanometer thick chrome layer, followed by a 160 nanometer thick nickel vanadium layer and a 100 nanometer thick silver layer. Then the wafer is along
- Dicing lines divided into individual diode chips the dicing lines possibly having been introduced into the wafer by sawing before the metal contacts have been applied.
- the method according to the invention is not only suitable for two-layer diodes, but can also be used in a correspondingly modified form for the production of multilayer diodes, in particular thyristor diodes (four-layer diodes) and three-layer diodes (transistor diodes).
- power semiconductors for example power diodes
- Thyristors and bipolar transistors can also be produced using the method.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
- Recrystallisation Techniques (AREA)
- Thyristors (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00912386A EP1157413A2 (de) | 1999-02-26 | 2000-02-25 | Verfahren zur herstellung hochdotierter halbleiterbauelemente |
JP2000603076A JP2002538619A (ja) | 1999-02-26 | 2000-02-25 | 高度にドーピングされた半導体構造部品の製造方法 |
US09/914,404 US6806173B1 (en) | 1999-02-26 | 2000-02-25 | Method for producing highly doped semiconductor components |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19908400A DE19908400A1 (de) | 1999-02-26 | 1999-02-26 | Verfahren zur Herstellung hochdotierter Halbleiterbauelemente |
DE19908400.9 | 1999-02-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2000052738A2 true WO2000052738A2 (de) | 2000-09-08 |
WO2000052738A3 WO2000052738A3 (de) | 2000-12-21 |
Family
ID=7898991
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2000/000546 WO2000052738A2 (de) | 1999-02-26 | 2000-02-25 | Verfahren zur herstellung hochdotierter halbleiterbauelemente |
Country Status (5)
Country | Link |
---|---|
US (1) | US6806173B1 (de) |
EP (1) | EP1157413A2 (de) |
JP (1) | JP2002538619A (de) |
DE (1) | DE19908400A1 (de) |
WO (1) | WO2000052738A2 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10058031B4 (de) * | 2000-11-23 | 2007-11-22 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Bildung leicht dotierter Halogebiete und Erweiterungsgebiete in einem Halbleiterbauelement |
US7208396B2 (en) * | 2002-01-16 | 2007-04-24 | Tegal Corporation | Permanent adherence of the back end of a wafer to an electrical component or sub-assembly |
US20080083611A1 (en) * | 2006-10-06 | 2008-04-10 | Tegal Corporation | High-adhesive backside metallization |
US7560355B2 (en) * | 2006-10-24 | 2009-07-14 | Vishay General Semiconductor Llc | Semiconductor wafer suitable for forming a semiconductor junction diode device and method of forming same |
US7999268B2 (en) * | 2007-07-27 | 2011-08-16 | Auburn University | Low temperature impurity doping of silicon carbide |
US20090246385A1 (en) * | 2008-03-25 | 2009-10-01 | Tegal Corporation | Control of crystal orientation and stress in sputter deposited thin films |
US8691057B2 (en) * | 2008-03-25 | 2014-04-08 | Oem Group | Stress adjustment in reactive sputtering |
US8058159B2 (en) * | 2008-08-27 | 2011-11-15 | General Electric Company | Method of making low work function component |
DE102008055515A1 (de) * | 2008-12-12 | 2010-07-15 | Schott Solar Ag | Verfahren zum Ausbilden eines Dotierstoffprofils |
US8482375B2 (en) * | 2009-05-24 | 2013-07-09 | Oem Group, Inc. | Sputter deposition of cermet resistor films with low temperature coefficient of resistance |
DE102011000973A1 (de) * | 2011-02-28 | 2012-08-30 | Schott Solar Ag | Verfahren zur flächigen Gasphasenbehandlng von Halbleiterbauelementen |
DE102012204346A1 (de) * | 2012-03-19 | 2013-09-19 | Gebr. Schmid Gmbh | Verfahren zur Herstellung eines beidseitig unterschiedlich dotierten Halbleiterwafers |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2145772A5 (en) * | 1971-07-09 | 1973-02-23 | Radiotechnique Compelec | Semiconductor component prodn - by doping silicon with antimony for prodn of various regions |
US3914138A (en) * | 1974-08-16 | 1975-10-21 | Westinghouse Electric Corp | Method of making semiconductor devices by single step diffusion |
US4092185A (en) * | 1975-07-26 | 1978-05-30 | International Computers Limited | Method of manufacturing silicon integrated circuits utilizing selectively doped oxides |
DE3815615A1 (de) * | 1988-05-07 | 1989-11-16 | Bosch Gmbh Robert | Verfahren zur herstellung einer hochsperrenden leistungsdiode |
Family Cites Families (19)
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US3907615A (en) * | 1968-06-28 | 1975-09-23 | Philips Corp | Production of a three-layer diac with five-layer edge regions having middle region thinner at center than edge |
FR2246066B1 (de) * | 1973-09-17 | 1976-12-31 | Ibm | |
US4099997A (en) * | 1976-06-21 | 1978-07-11 | Rca Corporation | Method of fabricating a semiconductor device |
US4104091A (en) * | 1977-05-20 | 1978-08-01 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Application of semiconductor diffusants to solar cells by screen printing |
DE3037316C2 (de) * | 1979-10-03 | 1982-12-23 | Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa | Verfahren zur Herstellung von Leistungsthyristoren |
JPS5980928A (ja) * | 1982-11-01 | 1984-05-10 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
DE3340874A1 (de) * | 1983-11-11 | 1985-05-23 | Telefunken electronic GmbH, 7100 Heilbronn | Verfahren zum herstellen einer solarzelle |
JPS6164125A (ja) * | 1984-09-05 | 1986-04-02 | Matsushita Electric Ind Co Ltd | 不純物拡散方法 |
JPS6293956A (ja) * | 1985-10-21 | 1987-04-30 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US4889492A (en) * | 1986-05-07 | 1989-12-26 | Motorola, Inc. | High capacitance trench capacitor and well extension process |
JPH05121345A (ja) * | 1991-10-28 | 1993-05-18 | Toshiba Corp | 半導体装置の製造方法 |
DE59405680D1 (de) * | 1993-06-23 | 1998-05-20 | Siemens Ag | Verfahren zur Herstellung eines Isolationsgrabens in einem Substrat für Smart-Power-Technologien |
JPH095791A (ja) * | 1995-06-16 | 1997-01-10 | Sony Corp | 表示用半導体装置の製造方法 |
US5770490A (en) * | 1996-08-29 | 1998-06-23 | International Business Machines Corporation | Method for producing dual work function CMOS device |
JP3036456B2 (ja) * | 1997-02-07 | 2000-04-24 | 日本電気株式会社 | 半導体記憶装置及びその製造方法 |
KR19990030660A (ko) * | 1997-10-02 | 1999-05-06 | 윤종용 | 전자빔을 이용한 반도체장치의 층간 절연막 형성방법 |
US5834346A (en) * | 1997-10-14 | 1998-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Procedure for eliminating bubbles formed during reflow of a dielectric layer over an LDD structure |
US6057216A (en) * | 1997-12-09 | 2000-05-02 | International Business Machines Corporation | Low temperature diffusion process for dopant concentration enhancement |
US6360685B1 (en) * | 1998-05-05 | 2002-03-26 | Applied Materials, Inc. | Sub-atmospheric chemical vapor deposition system with dopant bypass |
-
1999
- 1999-02-26 DE DE19908400A patent/DE19908400A1/de not_active Ceased
-
2000
- 2000-02-25 US US09/914,404 patent/US6806173B1/en not_active Expired - Fee Related
- 2000-02-25 WO PCT/DE2000/000546 patent/WO2000052738A2/de active Application Filing
- 2000-02-25 JP JP2000603076A patent/JP2002538619A/ja active Pending
- 2000-02-25 EP EP00912386A patent/EP1157413A2/de not_active Ceased
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2145772A5 (en) * | 1971-07-09 | 1973-02-23 | Radiotechnique Compelec | Semiconductor component prodn - by doping silicon with antimony for prodn of various regions |
US3914138A (en) * | 1974-08-16 | 1975-10-21 | Westinghouse Electric Corp | Method of making semiconductor devices by single step diffusion |
US4092185A (en) * | 1975-07-26 | 1978-05-30 | International Computers Limited | Method of manufacturing silicon integrated circuits utilizing selectively doped oxides |
DE3815615A1 (de) * | 1988-05-07 | 1989-11-16 | Bosch Gmbh Robert | Verfahren zur herstellung einer hochsperrenden leistungsdiode |
Non-Patent Citations (3)
Title |
---|
F. PINTCHOVSKI ET AL: "The effect of ambient and time on the difusion of Antimony in silicon from a doped glass source" EXTENDED ABSTRACTS., Bd. 81-2, Oktober 1981 (1981-10), Seiten 949-950, XP002149109 ELECTROCHEMICAL SOCIETY. PRINCETON, NEW JERSEY., US ISSN: 0160-4619 * |
KERN W ET AL: "Chemically vapor-deposited borophosphosilicate glasses for silicon device applications" RCA REVIEW, SEPT. 1982, USA, Bd. 43, Nr. 3, Seiten 423-457, XP002149110 ISSN: 0033-6831 * |
SUNDERSINGH V P ET AL: "Concentration profiling for high voltage p/sup +/-n-n/sup +/ diodes" INTERNATIONAL JOURNAL OF ELECTRONICS, JAN. 1983, UK, Bd. 54, Nr. 1, Seiten 127-137, XP002149111 ISSN: 0020-7217 * |
Also Published As
Publication number | Publication date |
---|---|
EP1157413A2 (de) | 2001-11-28 |
DE19908400A1 (de) | 2000-09-07 |
WO2000052738A3 (de) | 2000-12-21 |
US6806173B1 (en) | 2004-10-19 |
JP2002538619A (ja) | 2002-11-12 |
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