US8107314B2 - Semiconductor storage device and method for producing semiconductor storage device - Google Patents

Semiconductor storage device and method for producing semiconductor storage device Download PDF

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Publication number
US8107314B2
US8107314B2 US12/360,621 US36062109A US8107314B2 US 8107314 B2 US8107314 B2 US 8107314B2 US 36062109 A US36062109 A US 36062109A US 8107314 B2 US8107314 B2 US 8107314B2
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United States
Prior art keywords
signal
test
control
storage device
semiconductor storage
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Expired - Fee Related, expires
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US12/360,621
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English (en)
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US20090190416A1 (en
Inventor
Kota Hara
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Socionext Inc
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Fujitsu Semiconductor Ltd
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Assigned to FUJITSU MICROELECTRONICS LIMITED reassignment FUJITSU MICROELECTRONICS LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HARA, KOTA
Publication of US20090190416A1 publication Critical patent/US20090190416A1/en
Priority to US13/330,456 priority Critical patent/US8274854B2/en
Assigned to FUJITSU SEMICONDUCTOR LIMITED reassignment FUJITSU SEMICONDUCTOR LIMITED CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: FUJITSU MICROELECTRONICS LIMITED
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/1201Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising I/O circuitry
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/105Aspects related to pads, pins or terminals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Definitions

  • test control signals TEST 1 , TEST 2 , TEST 3 , and TEST 4 are set to a high level, a low level, a low level, and a high level, respectively.
  • the signal WEint is set to a high level and the signal CLKint is set to a signal that corresponds to the address signal A 09 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Tests Of Electronic Circuits (AREA)
US12/360,621 2008-01-30 2009-01-27 Semiconductor storage device and method for producing semiconductor storage device Expired - Fee Related US8107314B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/330,456 US8274854B2 (en) 2008-01-30 2011-12-19 Semiconductor storage device and method for producing semiconductor storage device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008019316A JP5629962B2 (ja) 2008-01-30 2008-01-30 半導体記憶装置
JP2008-019316 2008-01-30

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US13/330,456 Division US8274854B2 (en) 2008-01-30 2011-12-19 Semiconductor storage device and method for producing semiconductor storage device

Publications (2)

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US20090190416A1 US20090190416A1 (en) 2009-07-30
US8107314B2 true US8107314B2 (en) 2012-01-31

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US12/360,621 Expired - Fee Related US8107314B2 (en) 2008-01-30 2009-01-27 Semiconductor storage device and method for producing semiconductor storage device
US13/330,456 Expired - Fee Related US8274854B2 (en) 2008-01-30 2011-12-19 Semiconductor storage device and method for producing semiconductor storage device

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Country Status (3)

Country Link
US (2) US8107314B2 (ko)
JP (1) JP5629962B2 (ko)
KR (1) KR20090083858A (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150036438A1 (en) * 2013-08-01 2015-02-05 SK Hynix Inc. Semiconductor apparatus
US9245651B2 (en) 2013-07-15 2016-01-26 Samsung Electronics Co., Ltd. Memory device for masking read data and a method of testing the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012142562A (ja) * 2010-12-17 2012-07-26 Semiconductor Energy Lab Co Ltd 半導体記憶装置
US20140164323A1 (en) * 2012-12-10 2014-06-12 Transparent Io, Inc. Synchronous/Asynchronous Storage System

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11306796A (ja) 1998-04-20 1999-11-05 Hitachi Ltd 半導体記憶装置
JP2000163997A (ja) 1998-11-30 2000-06-16 Matsushita Electric Ind Co Ltd 半導体装置
JP2003151299A (ja) 2001-11-14 2003-05-23 Seiko Epson Corp 半導体装置およびその検査方法ならびに電子機器
US6778451B2 (en) * 2000-02-24 2004-08-17 Fujitsu Limited Semiconductor memory device for masking all bits in a test write operation
US7023748B2 (en) * 2003-04-01 2006-04-04 Sony Corporation Semiconductor storage device
US7190627B2 (en) * 2003-11-07 2007-03-13 Fujitsu Limited Semiconductor device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3169749B2 (ja) * 1993-07-21 2001-05-28 株式会社メガチップス 半導体記憶装置
JP3255132B2 (ja) * 1998-12-25 2002-02-12 日本電気株式会社 半導体装置
JP4315552B2 (ja) * 1999-12-24 2009-08-19 株式会社ルネサステクノロジ 半導体集積回路装置
JP2002033363A (ja) * 2000-07-19 2002-01-31 Hitachi Ltd 半導体ウエハ、半導体チップ、および半導体装置の製造方法
KR100459727B1 (ko) * 2002-10-21 2004-12-03 삼성전자주식회사 이종의 신호를 하나의 핀을 통하여 내부 회로로 인가할 수있는 집적 회로 장치 및 방법
JP2004281001A (ja) * 2003-03-18 2004-10-07 Fujitsu Ltd 半導体記憶装置
JP4381750B2 (ja) * 2003-08-28 2009-12-09 株式会社ルネサステクノロジ 半導体集積回路
JP4261515B2 (ja) * 2005-06-27 2009-04-30 富士通マイクロエレクトロニクス株式会社 半導体メモリのバーンイン試験方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11306796A (ja) 1998-04-20 1999-11-05 Hitachi Ltd 半導体記憶装置
JP2000163997A (ja) 1998-11-30 2000-06-16 Matsushita Electric Ind Co Ltd 半導体装置
US6295243B1 (en) 1998-11-30 2001-09-25 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US6654299B2 (en) 1998-11-30 2003-11-25 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US6778451B2 (en) * 2000-02-24 2004-08-17 Fujitsu Limited Semiconductor memory device for masking all bits in a test write operation
JP2003151299A (ja) 2001-11-14 2003-05-23 Seiko Epson Corp 半導体装置およびその検査方法ならびに電子機器
US7023748B2 (en) * 2003-04-01 2006-04-04 Sony Corporation Semiconductor storage device
US7190627B2 (en) * 2003-11-07 2007-03-13 Fujitsu Limited Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9245651B2 (en) 2013-07-15 2016-01-26 Samsung Electronics Co., Ltd. Memory device for masking read data and a method of testing the same
US20150036438A1 (en) * 2013-08-01 2015-02-05 SK Hynix Inc. Semiconductor apparatus
US8953391B1 (en) * 2013-08-01 2015-02-10 SK Hynix Inc. Semiconductor apparatus

Also Published As

Publication number Publication date
JP2009181627A (ja) 2009-08-13
KR20090083858A (ko) 2009-08-04
US8274854B2 (en) 2012-09-25
US20090190416A1 (en) 2009-07-30
JP5629962B2 (ja) 2014-11-26
US20120087195A1 (en) 2012-04-12

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