US20100060758A1 - Solid-state imaging device and method of producing solid-state imaging device - Google Patents

Solid-state imaging device and method of producing solid-state imaging device Download PDF

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US20100060758A1
US20100060758A1 US12/544,914 US54491409A US2010060758A1 US 20100060758 A1 US20100060758 A1 US 20100060758A1 US 54491409 A US54491409 A US 54491409A US 2010060758 A1 US2010060758 A1 US 2010060758A1
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insulating film
oxide insulating
imaging device
state imaging
solid
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Itaru Oshiyama
Yuki Miyanami
Susumu Hiyama
Kazuki Tanaka
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Sony Corp
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Sony Corp
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Publication of US20100060758A1 publication Critical patent/US20100060758A1/en
Priority to US15/835,791 priority Critical patent/US10361242B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures

Definitions

  • the present invention relates to a solid-state imaging device and a method of producing a solid-state imaging device.
  • the present invention relates to a solid-state imaging device in which an interface state of a surface of a semiconductor substrate having a sensor that performs photoelectric conversion can be compensated for.
  • a hole accumulated diode (HAD) structure is known as a technology for suppressing the generation of dark current due to the interface state, which is one of the above causes.
  • FIG. 8A shows a structure to which the HAD structure is not applied.
  • the upper portion of a sensor 203 formed on a surface side of a semiconductor substrate 201 is directly covered with an insulating film 205 . Consequently, electrons generated due to an interface state formed at an interface between the sensor 203 and the insulating film 205 flow in the sensor 203 in the form of dark current.
  • FIG. 8B shows a structure to which the HAD structure is applied. In the structure shown in FIG.
  • a hole accumulation layer 207 composed of a P-type diffusion layer is provided on a sensor 203 to cover a surface of a semiconductor substrate 201 , and an insulating film 205 is provided on the hole accumulation layer 207 . Consequently, electrons generated due to an interface state between the hole accumulation layer 207 constituting the surface of the semiconductor substrate and the insulating film 205 disappear in the hole accumulation layer 207 , thus preventing generation of dark current.
  • Such an HAD structure described above can be used in either a CCD image sensor or a CMOS image sensor. Furthermore, the HAD structure can be applied not only to a surface irradiation-type image sensor in the related art but also to a rear-surface irradiation-type image sensor (refer to, for example, Japanese Unexamined Patent Application Publication No. 2003-338615).
  • an annealing treatment at a high temperature of 700° C. or higher is necessary in order to activate an impurity introduced in a surface layer of the semiconductor substrate 201 . Accordingly, it is difficult to form the hole accumulation layer 207 by performing only a process at a low temperature of 400° C. or lower. In addition, in the annealing treatment at a high temperature of 700° C. or higher, diffusion of an impurity occurs in another impurity layer that has already been formed.
  • the sensor 203 be formed at a position within the semiconductor substrate 201 that is as shallow as possible. Accordingly, it is desirable that the hole accumulation layer 207 formed in the upper portion of the sensor 203 have a small thickness so as to satisfy this desire.
  • a solid-state imaging device includes a sensor including an impurity diffusion layer provided in a surface layer of a semiconductor substrate; and an oxide insulating film containing carbon, the oxide insulating film being provided on the sensor.
  • This oxide insulating film is provided as a negative-charge accumulation layer having a negative fixed charge and is composed of a metal oxide or a silicon-based material.
  • the carbon concentration is preferably 6 ⁇ 10 19 atoms/cm 3 or more.
  • a sensor including an impurity diffusion layer is formed in a surface layer of a semiconductor substrate, and an oxide insulating film containing carbon is then deposited on the sensor.
  • the carbon concentration in the oxide insulating film is controlled by changing a flow rate ratio of a material gas containing carbon and the deposition temperature.
  • the oxide insulating film containing carbon is provided on the sensor.
  • the oxide insulating film containing carbon functions as a negative-charge accumulation layer having a negative fixed charge. Consequently, by providing the oxide insulating film on the sensor, positive charges can be efficiently attracted to the surface side of the semiconductor substrate by a negative band-bending effect in the oxide insulating film. Consequently, a hole accumulation layer is formed in this portion, thus compensate for the interface state. Furthermore, the amount of negative fixed charge in the oxide insulating film is controlled by the carbon concentration. Accordingly, the hole accumulation layer can be reliably formed on the surface side of the semiconductor substrate by a sufficient band-bending effect.
  • the solid-state imaging device by providing an oxide insulating film having a sufficient negative band-bending effect obtained by controlling the carbon concentration, a hole accumulation layer can be reliably formed in a surface layer of a semiconductor substrate having a sensor, and thus an interface state can be compensated for. Accordingly, generation of dark current and white spots can be prevented by constituting an HAD structure without providing on a surface of a sensor a hole accumulation layer being composed of an impurity diffusion layer which is formed by performing a heat treatment at a high temperature.
  • the senor can be provided at a shallow position in a surface of a semiconductor substrate, thereby increasing a transfer efficiency of charges to a floating diffusion portion which is disposed on a side of the sensor with a gate electrode provided between the sensor and the floating diffusion portion.
  • FIGS. 1A and 1B are cross-sectional views of relevant parts illustrating the structure of a solid-state imaging device of a first embodiment and a second embodiment;
  • FIG. 2 is a graph showing the relationship between the carbon concentration in an oxide insulating film and the flat-band voltage (Vfb);
  • FIGS. 3A to 3C are cross-sectional process views (part 1 ) showing a method of producing the solid-state imaging device of the first embodiment and the second embodiment;
  • FIGS. 4A and 4B are cross-sectional process views (part 2 ) showing the method of producing the solid-state imaging device of the first embodiment and the second embodiment;
  • FIG. 5 is a graph showing the flat-band voltage (Vfb) in various silicon-based oxide insulating films
  • FIG. 6 is a graph showing the relationship between conditions for deposition of a silicon-based oxide insulating film and the flat-band voltage (Vfb);
  • FIGS. 7A and 7B are cross-sectional views of relevant parts illustrating a modification of the first embodiment and the second embodiment.
  • FIGS. 8A and 8B are cross-sectional views of relevant parts illustrating the structures of solid-state imaging devices in the related art.
  • FIG. 1A is a cross-sectional view of a relevant part of one pixel in the case where a solid-state imaging device according to an embodiment of the present invention is applied to a CMOS sensor.
  • FIG. 1B is an enlarged view of portion IB of FIG. 1A .
  • a solid-state imaging device 1 A of a first embodiment shown in FIGS. 1A and 1B has the following structure.
  • trench element isolations 101 a shallow trench isolations: STI
  • a P-well diffusion layer 102 is provided on the surface side of the semiconductor substrate 101 in each pixel region isolated by the element isolation regions 101 a .
  • a transfer gate 5 is pattern-formed on the semiconductor substrate 101 with a gate insulating film 3 therebetween, so as to intersect the P-well diffusion layer 102 .
  • the gate insulating film 3 may be composed of, for example, a silicon oxide film or a film having a high dielectric constant such as a hafnium oxide film.
  • the transfer gate (gate electrode) 5 may be composed of a polysilicon film or a metal material.
  • an insulating sidewall 7 is provided on each sidewall of the transfer gate 5 having the above structure.
  • a reset gate, an amplifying gate, and the like are also provided on the P-well diffusion layer 102 in each pixel region.
  • An N-type diffusion layer 103 is disposed on a surface side of the P-well diffusion layer 102 in the light-receiving region.
  • the P-well diffusion layer 102 and the N-type diffusion layer 103 constitute a diode (sensor) D.
  • this diode D charges obtained by photoelectric conversion are accumulated in the N-type diffusion layer 103 . Accordingly, the N-type diffusion layer 103 functions as a charge accumulation layer.
  • a floating diffusion portion 105 composed of an N-type diffusion layer is provided on another side of the transfer gate 5 and on the surface side of the P-well diffusion layer 102 .
  • a peripheral region (not shown) where a drive circuit is provided is disposed around an imaging area where the pixel regions having the above-described structure are arranged. Transistors etc. constituting the drive circuit are arranged in the peripheral region.
  • the semiconductor substrate 101 including the element isolations 101 a , the transfer gate 5 , the diode D, the floating diffusion portion 105 , and the transistors constituting the drive circuit is covered with an oxide insulating film 9 A.
  • This oxide insulating film 9 A contains carbon, and accordingly, the oxide insulating film 9 A is provided as a negative-charge accumulation layer having a negative fixed charge.
  • the oxide insulating film 9 A is composed of a metal oxide.
  • metal oxides a material having a negative fixed charge in itself is preferable.
  • hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), or tantalum oxide (Ta 2 O 5 ) is preferably used.
  • An oxide insulating film composed of any of the above materials has been practically used as, for example, a gate insulating film of an insulated-gate field-effect transistor, and thus a deposition method thereof has been established. Accordingly, the oxide insulating film 9 A composed of the above material can be easily formed.
  • the concentration of carbon contained in the oxide insulating film 9 A is preferably 6 ⁇ 10 19 atoms/cm 3 or more. Accordingly, a sufficient amount of negative fixed charge is accumulated in the oxide insulating film 9 A.
  • the upper limit of the concentration of carbon contained in the oxide insulating film 9 A is a range in which the amount of negative charge accumulation can be controlled by the carbon concentration, for example, 5 ⁇ 10 21 atoms/cm 3 or less.
  • FIG. 2 shows, as an example, the relationship between the carbon concentration (C concentration) in an oxide insulating film 9 A composed of hafnium oxide (HfO 2 ) and the flat-band voltage (Vfb).
  • the flat-band voltage (Vfb) can be controlled in a range of 0.3 V or more. Accordingly, a negative fixed charge can be more reliably accumulated.
  • the carbon concentration in the oxide insulating film 9 A is 5 ⁇ 10 21 atoms/cm 3 or less
  • the flat-band voltage (Vfb) that is, the amount of negative charge accumulation can be controlled by the carbon concentration.
  • such an oxide insulating film 9 A contains carbon at least on the side that contacts the semiconductor substrate 101 (i.e., in the lower layer), and the upper layer may not contain carbon. That is, in the oxide insulating film 9 A, the carbon concentration may have a gradient, and it is sufficient that the carbon concentration is controlled on the side that contacts the semiconductor substrate 101 (i.e., in the lower layer).
  • the semiconductor substrate 101 is in a state in which a hole accumulation layer 107 to which positive charges are attracted is formed in a surface layer of the diode D.
  • a light-shielding film 13 is provided on the oxide insulating film 9 A with, for example, an insulating film 11 having a flat surface therebetween.
  • the light-shielding film 13 is composed of a material having a good light-absorbing property, such as tungsten (W).
  • the light-shielding film 13 has an opening 13 a above the diode D and covers an area other than the opening 13 a , thereby preventing variations in characteristics due to incidence of light on the area other than the diode D.
  • diodes D of some of pixels are covered with the light-shielding film 13 . Accordingly, the black level in an image is determined by the output from the diodes D covered with the light-shielding film 13 .
  • a color filter layer 17 is provided on the light-shielding film 13 with a planarizing insulating film 15 therebetween, and an on-chip lens 19 for light focusing is provided on the color filter layer 17 .
  • the color filter layer 17 and the on-chip lens 19 are pattern-formed for every pixel.
  • trench element isolations 101 a are formed on a surface side of a semiconductor substrate 101 composed of N-type single-crystal silicon to isolate each pixel region.
  • a P-well diffusion layer 102 is formed on the surface side of the semiconductor substrate 101 in each isolated pixel region by ion implantation and subsequent heat treatment.
  • a transfer gate 5 is pattern-formed, with a gate insulating film 3 therebetween, so as to intersect each pixel region (P-well diffusion layer 102 ) on the semiconductor substrate 101 .
  • a reset gate, an amplifying gate, and the like which are not shown in the figure, are also formed by the same process.
  • a diffusion layer such as an extension region is optionally formed, and an insulating sidewall 7 is then formed on each sidewall of the transfer gate (gate electrode) 5 .
  • an N-type diffusion layer 103 is formed in a surface layer of one side of the P-well diffusion layer 102 separated by the transfer gate 5 by ion implantation and subsequent heat treatment.
  • a diode D including the P-well diffusion layer 102 and the N-type diffusion layer 103 is formed on the surface side of the semiconductor substrate 101 .
  • a floating diffusion portion 105 composed of an N-type diffusion layer is formed in the surface layer of the other side of the P-well diffusion layer 102 separated by the transfer gate 5 by ion implantation and subsequent heat treatment.
  • driving transistors constituting a drive circuit are formed in a peripheral region disposed around an imaging area where the pixel regions are arranged.
  • an oxide insulating film 9 A is deposited on the semiconductor substrate 101 on which the transfer gate 5 , the diode D, the floating diffusion portion 105 , and the driving transistors are provided.
  • a deposition method using an organometallic gas as a material gas is preferably employed.
  • a deposition method include a metal-organic chemical vapor deposition (MOCVD) method and an atomic layer deposition (ALD) method.
  • MOCVD metal-organic chemical vapor deposition
  • ALD atomic layer deposition
  • deposition by the MOCVD method or the ALD method mentioned above is performed first, and deposition by a physical vapor deposition (PVD) method such as a sputtering method may then be performed.
  • PVD physical vapor deposition
  • deposition conditions for the ALD method are as follows:
  • Temperature of substrate for deposition 200° C. to 500° C.
  • Organometallic gas flow rate 10 to 500 sccm
  • Exposure time of organometallic gas 1 to 15 sec.
  • Ozone gas flow rate 10 to 500 sccm
  • Exposure time of ozone gas 1 to 15 sec.
  • deposition conditions for the MOCVD method are as follows:
  • Temperature of substrate for deposition 200° C. to 600° C.
  • deposition is performed so that the concentration of carbon contained in the oxide insulating film 9 A is in the range of 6 ⁇ 10 19 to 5 ⁇ 10 21 atoms/cm 3 by controlling the flow rate ratio of the material gas (organometallic gas) containing carbon and the deposition temperature.
  • Deposition conditions for the PVD method that is subsequently performed are as follows.
  • Argon (Ar) flow rate 5 to 50 sccm
  • Oxygen (O 2 ) flow rate 5 to 50 sccm
  • an insulating film 11 composed of silicon oxide (SiO 2 ) or the like is formed on the oxide insulating film 9 A.
  • This insulating film 11 is formed, for example, so as to have a flat surface.
  • a light-shielding film 13 composed of a material having a good light-absorbing property, such as tungsten (W), is then formed on the insulating film 11 .
  • W tungsten
  • an opening 13 a for opening a position corresponding to the diode D is formed in the light-shielding film 13 .
  • the light-shielding film 13 is pattern-etched using, for example, a resist pattern (not shown) as a mask to form the opening 13 a above the diode D.
  • the insulating film 11 functions as an etching stopper, thereby preventing the oxide insulating film 9 A from being exposed to etching.
  • planarizing insulating film 15 for decreasing the difference in level due to the presence of the light-shielding film 13 is formed.
  • This planarizing insulating film 15 is composed of, for example, silicon oxide, and is formed by application so as to have a flat surface.
  • a color filter layer 17 is pattern-formed so as to correspond to each pixel on the planarizing insulating film 15 , and an on-chip lens 19 is further formed on the color filter layer 17 .
  • the oxide insulating film 9 A containing carbon is provided on the diode D.
  • the oxide insulating film 9 A containing carbon functions as a negative-charge accumulation layer having a negative fixed charge. Consequently, by providing the oxide insulating film 9 A on the sensor (diode D), positive charges are efficiently attracted to the surface side of the semiconductor substrate 101 by a negative band-bending effect in the oxide insulating film 9 A. Consequently, a hole accumulation layer 107 is formed in this portion, and thus an interface state can be compensated for.
  • the amount of negative fixed charge in the oxide insulating film 9 A is controlled by the carbon concentration as described with reference to FIG. 2 . Accordingly, the hole accumulation layer 107 can be reliably formed on the surface side of the semiconductor substrate 101 by a sufficient band-bending effect.
  • the diode D can be provided at a shallow position in the surface of the semiconductor substrate 101 , thereby increasing a transfer efficiency of charges to the floating diffusion portion 105 which is disposed at a side of the diode D with the transfer gate 5 provided between the diode D and the floating diffusion portion 105 .
  • a solid-state imaging device of a second embodiment differs from the solid-state imaging device 1 A of the first embodiment described with reference to FIGS. 1A and 1B in the structure of the oxide insulating film, and the other structures of these solid-state imaging devices are the same as each other.
  • the structure of a solid-state imaging device 1 B of the second embodiment will now be described with reference to FIGS. 1A and 1B .
  • a semiconductor substrate 101 including element isolations 101 a , a transfer gate 5 , a diode D, a floating diffusion portion 105 , and transistors constituting a drive circuit is covered with an oxide insulating film 9 B composed of a silicon-based material.
  • This oxide insulating film 9 B contains carbon, and accordingly, as in the first embodiment, the oxide insulating film 9 B is provided as a negative-charge accumulation layer having a negative fixed charge.
  • the oxide insulating film 9 B is composed of a silicon-based material such as silicon oxide (SiO 2 ).
  • silicon-based materials a material having a negative fixed charge in itself is preferable.
  • a silicon oxide film containing an impurity selected from boron and phosphorus is preferably used. Specific examples thereof include silicon oxide containing boron (borosilicate glass (BSG)), silicon oxide containing phosphorus (phosphosilicate glass (PSG)), and silicon oxide containing boron and phosphorus (borophosphosilicate glass (BPSG)).
  • FIG. 5 shows the flat-band voltage (Vfb) in a silicon oxide film not containing an impurity (non-doped silicate glass (NSG) film), a BSG film, a PSG film, and a BPSG film.
  • NSG non-doped silicate glass
  • SA-CVD semi-atmosphere CVD
  • the concentration of carbon contained in the oxide insulating film 9 B is preferably 6 ⁇ 10 19 atoms/cm 3 or more. Accordingly, a sufficient amount of negative fixed charge is accumulated in the oxide insulating film 9 B.
  • the upper limit of the concentration of carbon contained in the oxide insulating film 9 B is a range in which the amount of negative charge accumulation can be controlled by the carbon concentration, for example, 5 ⁇ 10 21 atoms/cm 3 or less.
  • such an oxide insulating film 9 B contains carbon at least on the side that contacts the semiconductor substrate 101 (i.e., in the lower layer), and the upper layer may not contain carbon. That is, as in the first embodiment, in the oxide insulating film 9 B, the carbon concentration may have a gradient, and it is sufficient that the carbon concentration is controlled on the side that contacts the semiconductor substrate 101 (i.e., in the lower layer).
  • the semiconductor substrate 101 is in a state in which a hole accumulation layer 107 to which positive charges are attracted is formed in a surface layer of the diode D.
  • a light-shielding film 13 is provided on the oxide insulating film 9 B with, for example, an insulating film 11 having a flat surface therebetween. Furthermore, a planarizing insulating film 15 , a color filter layer 17 , and an on-chip lens 19 are provided thereon in that order.
  • a method of producing the solid-state imaging device 1 B of the second embodiment having the above structure may be the same as the method of producing the solid-state imaging device of the first embodiment described with reference to the cross-sectional process views of FIGS. 3A to 4B except for the step of forming the oxide insulating film 9 B.
  • trench element isolations 101 a are formed on a surface side of a semiconductor substrate 101 composed of N-type single-crystal silicon to isolate each pixel region.
  • a P-well diffusion layer 102 is then formed.
  • a transfer gate 5 is pattern-formed, with a gate insulating film 3 therebetween, so as to intersect the P-well diffusion layer 102 .
  • An insulating sidewall 7 is then formed on each sidewall of the transfer gate 5 .
  • an N-type diffusion layer 103 is formed in a surface layer of one side of the P-well diffusion layer 102 separated by the transfer gate 5 to form a diode D including the P-well diffusion layer 102 and the N-type diffusion layer 103 .
  • a floating diffusion portion 105 composed of an N-type diffusion layer is formed in a surface layer of the other side of the P-well diffusion layer 102 separated by the transfer gate 5 . Furthermore, by the same step as that described above, for example, driving transistors constituting a drive circuit are formed in a peripheral region disposed around an imaging area where the pixel regions are arranged.
  • an oxide insulating film 9 B is deposited on the semiconductor substrate 101 on which the transfer gate 5 , the diode D, the floating diffusion portion 105 , and the driving transistors are provided.
  • oxide insulating film 9 B containing carbon and composed of a silicon-based material
  • a CVD method using tetraethoxysilane (TEOS) gas which is a carbon-containing gas
  • TEOS tetraethoxysilane
  • SA-CVD method using ozone (O 3 ) gas together with TEOS gas is preferably employed.
  • deposition by the above-mentioned CVD method using TEOS gas is performed first, and deposition by a physical vapor deposition (PVD) method such as a sputtering method may then be performed.
  • PVD physical vapor deposition
  • deposition is performed so that the concentration of carbon contained in the oxide insulating film 9 B is in the range of 6 ⁇ 10 19 to 5 ⁇ 10 21 atoms/cm 3 by controlling the flow rate ratio of TEOS gas containing carbon and the deposition temperature.
  • FIG. 6 is a graph showing the relationship between deposition conditions and the flat-band voltage (Vfb) when NSG is deposited by a CVD method using TEOS gas.
  • deposition was performed using a semi-atmosphere CVD (SA-CVD) method by changing the deposition temperature or a flow rate ratio O 3 /TEOS and maintaining the other conditions to be the same.
  • SA-CVD semi-atmosphere CVD
  • Vfb flat-band voltage
  • the flat-band voltage (Vfb) is shifted to the positive side with a decrease in the deposition temperature and an increase in the flow rate ratio of TEOS.
  • Vfb flat-band voltage
  • the carbon concentration in the oxide insulating film 9 B is controlled by controlling the flow rate ratio of TEOS gas, which contains carbon, and the deposition temperature.
  • Deposition conditions for the silicon-based oxide insulating film 9 B by such a CVD method using TEOS gas are set to the following ranges:
  • Temperature of substrate for deposition 250° C. to 350° C.
  • TEOS flow rate 50 to 250 mg/min.
  • TEB triethyl borate
  • TEPO triethyl phosphate
  • the pressure in a deposition atmosphere, the type of carrier gas, and the carrier gas flow rate are appropriately selected.
  • an insulating film 11 is formed on the oxide insulating film 9 B so as to have a flat surface.
  • a light-shielding film 13 composed of a material having a good light-absorbing property is further formed on the insulating film 11 .
  • an opening 13 a for opening a position corresponding to the diode D is then formed in the light-shielding film 13 .
  • a planarizing insulating film 15 for decreasing the difference in level due to the presence of the light-shielding film 13 is formed.
  • a color filter layer 17 is pattern-formed so as to correspond to each pixel on the planarizing insulating film 15 , and an on-chip lens 19 is further formed on the color filter layer 17 .
  • the silicon-based oxide insulating film 9 B containing carbon is provided on the diode D.
  • the silicon-based oxide insulating film 9 B containing carbon functions as a negative-charge accumulation layer having a negative fixed charge. Consequently, by providing the oxide insulating film 9 B on the sensor (diode D), positive charges are efficiently attracted to the surface side of the semiconductor substrate 101 by a negative band-bending effect in the oxide insulating film 9 B. Consequently, a hole accumulation layer 107 is formed in this portion, and thus an interface state can be compensated for.
  • the amount of negative fixed charge in the oxide insulating film 9 B is controlled by the carbon concentration.
  • the hole accumulation layer 107 can be reliably formed on the surface side of the semiconductor substrate 101 by a sufficient band-bending effect.
  • an impurity such as boron or phosphorus
  • the amount of negative fixed charge in the oxide insulating film 9 B can be increased, and the hole accumulation layer 107 can be formed more reliably.
  • generation of dark current can be prevented by constituting the HAD structure without providing on a surface of the diode D a hole accumulation layer composed of an impurity diffusion layer which is formed by performing a heat treatment at a high temperature.
  • the diode D can be provided at a shallow position in the surface of the semiconductor substrate 101 , thereby increasing a transfer efficiency of charges to the floating diffusion portion 105 which is disposed at a side of the diode D with the transfer gate 5 provided between the diode D and the floating diffusion portion 105 .
  • FIGS. 7A and 7B show a modification of a solid-state imaging device of the first embodiment and the second embodiment. More specifically, FIGS. 7A and 7B show an example in which a positive-charge accumulation layer 109 composed of an impurity diffusion layer is provided on a surface of a diode D. Other structures are the same as those of the solid-state imaging device of the first embodiment and the second embodiment.
  • the positive-charge accumulation layer 109 provided in a solid-state imaging device 1 A′ or 1 B′ is a layer formed by diffusing a p-type impurity in a top surface of a semiconductor substrate 101 , i.e., a top surface of an N-type diffusion layer 103 constituting the diode D.
  • the diode D is formed as described with reference to FIG. 3A in the first embodiment and the second embodiment, and a step of forming the hole accumulation layer 109 is then performed by introducing a P-type diffusion layer in a surface of the diode D.
  • the subsequent steps can be performed as in the first embodiment and the second embodiment.
  • the amount of positive fixed charge in the hole accumulation layer 109 composed of the impurity diffusion layer can be increased by a negative band-bending effect in the oxide insulating film 9 A or 9 B. Accordingly, even when the hole accumulation layer 109 composed of the impurity diffusion layer has a low impurity concentration and the depth of the hole accumulation layer 109 is shallow, because of an assist of a negative band-bending effect in the oxide insulating film 9 A or 9 B, generation of dark current can be prevented by a sufficient amount of fixed charge.

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US20180175099A1 (en) 2018-06-21
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KR101644187B1 (ko) 2016-07-29
US10361242B2 (en) 2019-07-23

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