US20050211385A1 - Method and apparatus for controlling spatial temperature distribution - Google Patents

Method and apparatus for controlling spatial temperature distribution Download PDF

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Publication number
US20050211385A1
US20050211385A1 US11/004,179 US417904A US2005211385A1 US 20050211385 A1 US20050211385 A1 US 20050211385A1 US 417904 A US417904 A US 417904A US 2005211385 A1 US2005211385 A1 US 2005211385A1
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United States
Prior art keywords
temperature
flat support
chuck
base
workpiece
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/004,179
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English (en)
Inventor
Neil Benjamin
Robert Steger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/062,395 external-priority patent/US6847014B1/en
Application filed by Lam Research Corp filed Critical Lam Research Corp
Priority to US11/004,179 priority Critical patent/US20050211385A1/en
Assigned to LAM RESEARCH CORPORATION reassignment LAM RESEARCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BENJAMIN, NEIL, STEGER, ROBERT
Publication of US20050211385A1 publication Critical patent/US20050211385A1/en
Priority to SG10201609601XA priority patent/SG10201609601XA/en
Priority to CN2010106228155A priority patent/CN102122607B/zh
Priority to JP2007544574A priority patent/JP2008522446A/ja
Priority to CNA2005800472891A priority patent/CN101111934A/zh
Priority to SG10201408008QA priority patent/SG10201408008QA/en
Priority to PCT/US2005/043801 priority patent/WO2006068805A1/en
Priority to KR1020077014977A priority patent/KR101109440B1/ko
Priority to SG200907998-9A priority patent/SG158101A1/en
Priority to TW094142661A priority patent/TWI481297B/zh
Priority to US12/436,443 priority patent/US8963052B2/en
Priority to JP2011176261A priority patent/JP2011244011A/ja
Priority to JP2014055288A priority patent/JP2014146822A/ja
Priority to US14/594,648 priority patent/US9824904B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder
    • H01J37/32724—Temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/20—Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated
    • H01J2237/2001—Maintaining constant desired temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

Definitions

  • the present invention relates to substrate support. More particularly, the present invention relates to a method and apparatus for achieving uniform temperature distribution within a substrate during plasma processing.
  • a typical plasma etching apparatus comprises a reactor in which there is a chamber through which reactive gas or gases flow. Within the chamber, the gases are ionized into a plasma, typically by radio frequency energy. The highly reactive ions of the plasma gas are able to react with material, such as a polymer mask on a surface of a semiconductor wafer being processed into integrated circuits (IC's). Prior to etching, the wafer is placed in the chamber and held in proper position by a chuck or holder which exposes a top surface of the wafer to the plasma.
  • chucks also sometimes called susceptors
  • the chuck provides an isothermal surface and serves as a heat sink for the wafer removing heat imparted to the wafer by the plasma.
  • the reactive ions of the plasma gas chemically react with portions of material on a face of the semiconductor wafer.
  • Some processes cause some degree of heating of the wafer, but most of the heating is caused by the plasma.
  • the reaction between the plasma (ions and radicals) and wafer material is accelerated to some degree by the temperature rise of the wafer.
  • Local wafer temperature and rate of reaction at each microscopic point on the wafer are related to an extent that harmful unevenness in etching of material over a face of the wafer can easily result if the temperature of the wafer across its area varies too much.
  • FIG. 1 illustrates one way to control wafer temperature during RIE.
  • a coolant gas such as helium
  • a coolant gas is admitted at a single pressure within a single thin space 102 between the bottom of the wafer 104 and the top of the chuck 106 which holds the wafer 104 .
  • FIG. 2 illustrates a typical temperature distribution on the wafer 104 .
  • the pressure loss at the peripheral portions of the wafer 104 causes the wafer 104 to be much hotter at the peripheral portions.
  • One way of dealing with the need for zone cooling is to vary the surface roughness or to cut a relief pattern to effectively change the local contact area. Such a scheme can be used without backside coolant gas at all, in which case the contact area, surface roughness, and clamp force determine the heat transfer. However the local contact area can only be adjusted by re-machining the chuck.
  • Another way of dealing with the need for zone cooling is to use coolant gas whose pressure is varied to increase and fine tune thermal transport.
  • the relief pattern is still substantially fixed.
  • the gas supply to each zone may have different composition or be set to a different pressure, thus varying the thermal conduction.
  • Each zone's operating conditions may be set under recipe control, or even dynamically stabilized during each process step.
  • Such schemes depend on redistributing the incoming heat flux from the plasma and extracting it into different regions. This is relatively effective at high power flux but will only give small temperature differentials at lower power flux. For instance, with about 1 W per cm 2 of uniform flux and about 3 mm sealing land, it is possible to get center to edge thermal gradients that lead to a 10° C. to 30° C. temperature increase near the wafer periphery. Thermal gradients of this magnitude can be very effective as a process control parameter.
  • a primary purpose of the present invention is to solve these needs and provide further, related advantages.
  • a chuck for a plasma processor comprises a temperature-controlled base, a thermal insulator, a flat support, and a heater.
  • the temperature-controlled base is controlled in operation a temperature below the desired temperature of a workpiece.
  • the thermal insulator is disposed over at least a portion of the temperature-controlled base.
  • the flat support holds a workpiece and is disposed over the thermal insulator.
  • a heater is embedded within the flat support and/or mounted to an underside of the flat support.
  • the heater includes a plurality of heating elements that heat a plurality of corresponding heating zones. The power supplied and/or temperature of each heating element is controlled independently.
  • the heater and flat support have a combined temperature rate change of at least 1° C. per second.
  • FIG. 1 is a schematic elevational diagram of a support holding a wafer under process in accordance with the prior art
  • FIG. 2 is a plot illustrating the temperature of a wafer and the pressure of a coolant in the apparatus of FIG. 1 in accordance with the prior art
  • FIG. 3 is a schematic elevational diagram illustrating an apparatus for controlling the temperature of a workpiece in accordance with one embodiment of the present invention
  • FIG. 4 illustrates a simplified schematic of thermal flow dynamic in the apparatus of FIG. 3 ;
  • FIG. 5 is a schematic elevational diagram illustrating an apparatus for controlling the temperature of a workpiece in accordance with another embodiment of the present invention.
  • FIG. 6 is a flow diagram illustrating a method for controlling the temperature of a chuck during etching in accordance with one embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a system for controlling the temperature of a chuck in accordance with one embodiment of the present invention.
  • FIG. 8 is a schematic diagram illustrating an example of a wafer support have two spatial regional zones in accordance with one embodiment of the present invention.
  • FIG. 3 is a schematic elevational diagram illustrating an apparatus for controlling the temperature of a workpiece in accordance with one embodiment of the present invention.
  • a temperature-controlled base 302 or a heat exchanger has a constant temperature below the desired temperature of a wafer 310 .
  • the base 302 supports a thermal insulator 304 .
  • a support 306 preferably flat, is mounted on top of the thermal insulator 304 .
  • a heater 308 is embedded in the support 306 .
  • a wafer 310 is disposed on top of the support 306 .
  • a thermal conductor 312 provides an intimate thermal contact between the support 306 and the wafer 310 .
  • the thermal conductor 312 may be preferably a gas, such as helium.
  • the pressure of the helium controls the thermal conduction between the wafer 310 and the support 306 .
  • the thermal conductivity of the thermal conductor 312 may be less pressure sensitive at higher pressure such as 20 or 30 Torr.
  • the base 302 comprises a metallic material, preferably an aluminum base cold plate, that is maintained at a relatively constant temperature and is held in operation at a laterally uniform temperature through a conventional heat exchange system such as a cooling/heating fluid loop.
  • the base 302 may also comprise a non-metallic material, such as aluminum nitrate.
  • the base 302 must be chilled to a greater extent than in standard operation without the heater 308 .
  • the temperature of the base 302 may be 10° C. to 50° C. below the desired temperature of the wafer 310 .
  • the base 302 also provides a thermal sink for plasma heating.
  • An external coolant chiller (not shown) may be used to maintain the temperature of the base 302 .
  • the amount of heat removed by the external coolant chiller and the temperature of the coolant may be limited to less than 2000 W and ⁇ 20° C., respectively.
  • the greater capacity of the chiller side helps with the thermal response—it may be more economically practical to limit one to two kW operation.
  • the base 302 further have several holes or cavities (not shown) through which heater power lines 314 or other service lines are disposed.
  • Such service lines 314 may comprise power lines for the heater, sensors, high voltage electrostatic clamping, gas feed, and wafer lifting.
  • the thermal insulator 304 acts as a significant thermal impedance break between the support 306 and the base 302 .
  • the thermal insulator 304 may comprise a thick RTV bonding adhesive layer, or be made of polymer, plastic, or ceramic.
  • the thermal impedance break of the thermal insulator 304 cannot be too excessive otherwise the wafer 310 will be insufficiently cooled.
  • the thermal insulator may for example have a thermal conductivity of a range of about 0.05 W/mK to about 0.20 W/mK.
  • the thermal insulator 304 in this case both acts as a thermal resistive element and a bond between the support 306 and the base 302 .
  • thermal insulator 304 must be such that adequate RF coupling between the plasma and the base 302 is maintained. Also, the thermal insulator 304 must tolerate significant thermal-mechanical shear due to different materials and temperatures located above and below the layer. Thermal insulator 304 may further incorporate several cavities or vias (not shown) contiguous to the cavities of the base 302 for housing parts of the heater power lines 314 and other service lines.
  • the support 306 comprises a ceramic material.
  • the ceramic may be a non-electrically conductive material, such as, for example, the ceramic alumina.
  • the shape of the support 306 may preferably include a conventional disk commonly used in plasma etching systems.
  • the support 306 may be a conventional electrostatic chuck or may be a ceramic having a mechanical clamp for holding down the wafer 310 .
  • the support 306 construction is of a “thin disk bonded to a base” type, otherwise the lateral conduction may be so high that the heater input will be spread laterally resulting in an ineffective zone separation. The support 306 should allow the heat to dissipate locally.
  • the heater 308 comprises at least one resistive heating element.
  • the heater 308 may be embedded in the support 306 below the clamp electrode plane and be shaped in any desirable pattern, for example, symmetrical or arbitrary.
  • the heater 308 may also include one or more planar heating elements. Each heating element defines a heating zone or region that may be controlled independently.
  • the multi-zone pattern has one or more planar heating elements acting in opposition to the conduction cooling to the support 306 .
  • the temperature rate change caused by the heater 308 to the support 306 may be at least 1° C. per second.
  • At least one sensor 309 associated with each heating zone may measure the temperature of each heating zone and send a signal to a controller or computer system (see FIG. 7 ) to monitor and control each individual planar heating element.
  • the sensor may be an infrared emission sensor or thermo-couple sensor that can be mounted either through ports to read directly from the wafer 310 .
  • the sensors 309 can also be mounted within or to the back of the support 306 .
  • the heater 308 may be powered by power lines 312 disposed through openings 314 in the thermal insulator 304 and the base 302 .
  • heater 308 comprises an inductive heater.
  • heater 308 comprises a heating lamp, such as a krypton or quartz lamp.
  • heater 308 comprises thermoelectric modules that can cool or heat. With thermoelectric modules, a base and a thermal break may be optional.
  • FIG. 4 illustrates a simplified schematic of thermal flow dynamic in the apparatus of FIG. 3 .
  • the incoming plasma heat flux Q 1 contributes to the temperature T 1 on the surface of the wafer 310 .
  • Heater 308 provides additional heat flux Q 3 to the wafer support 306 and thereby to the wafer 310 .
  • the flux Q 2 exiting the system through the support 306 and thermal insulator 304 to the cooled base 302 is approximately equal to both incoming flux Q 1 and Q 3 . Therefore: Q 1 + Q 3 ⁇ Q 2
  • T 2 T 1 + ⁇ T
  • ⁇ T is defined by the thermal conductivity of the thermal insulator 304 .
  • the additional heat flux Q 3 which is produced by heater 308 , thus controls ⁇ T. Therefore, the power supplied to the heater 308 can be adjusted so as to produce a desired temperature T 1 on the surface of the wafer for a range of Q 1 .
  • the temperature of the base 302 is set to produce an exiting flux Q 2 of approximately half of the maximum incoming flux of Q 3 when there are no incoming flux Q 1 and the maximum flux of Q 3 is approximately equal to the maximum flux of Q 1 : Q 2 ⁇ 1 ⁇ 2Q 3 max
  • FIG. 5 illustrates another embodiment of the chuck.
  • a chuck for a plasma processor has a temperature-controlled base 502 having a temperature below the desired temperature of a wafer 504 .
  • a layer of thermal insulation material 506 is disposed over the base 502 .
  • a flat support 508 used for holding the wafer 504 is disposed on top of the layer of thermal insulation material 506 .
  • a heater 510 is mounted to an underside of the flat support 508 .
  • the base 502 and layer 506 of thermal insulation material may further include holes or cavities (not shown) through which heater power lines 514 or other service lines are disposed.
  • Such service lines 514 may comprise power lines for the heater, sensors, high voltage electrostatic clamping. Those of ordinary skills in the art will recognize that the service lines are not limited to the ones previously cited.
  • the heater 510 may be powered by power lines 312 disposed through openings 514 in the thermal insulator 506 and the base 502 .
  • the heater 510 includes at least one resistive heating element.
  • the heater 510 may be mounted to an underside of the support 508 and be shaped in any desirable pattern, for example, symmetrical or arbitrary. (See FIG. 8 for example).
  • the heater 510 may include one or more planar heating elements. Each heating element may define a heating zone or region that may be controlled independently.
  • the multi-zone pattern has one or more planar heating elements acting in opposition to the conduction cooling to the support 508 .
  • At least one sensor 516 associated with each heating zone may measure the temperature of each heating zone and send a signal to a controller or computer system (see FIG. 7 ) to monitor and control each individual planar heating element.
  • the sensor may be an infrared emission sensor or thermo-couple sensor that can be mounted either through ports to read directly from the wafer 504 .
  • the sensors 516 may be embedded within the support 508 .
  • FIG. 8 illustrates an example of a support 508 having dual heating region: inner region 802 and outer region 804 .
  • Each region may be independently heated by its own set of heaters (not shown).
  • the support may includes regions geometrically defined in many other ways.
  • etching processes are used, for example, where a photoresist mask is used to etch a nitrite layer which is in turn used as an etching mask for sub-sequent layers.
  • etching of particular layers is enhanced with processing conditions which change during the execution of the etch. In particular, it is often desirable to execute one portion of the etching process at an initial temperature and subsequently change the temperature in later steps within this recipe so as to provide optimum etching conditions for the particular layer being etched.
  • etching process conditions are far more temperature sensitive than other process conditions and as such, it is desirable to be able to alter the wafer temperature step-by-step within an etch recipe, either to compensate for or to utilize, this temperature sensitivity of the etching process.
  • the relative etch rates vertically and laterally differ with temperature under some processing conditions, and this effect can be used to alter that tapered angle of the etch by altering the wafer temperature as the etching process progresses.
  • the local concentration of reactance varies across the wafer such that the lateral etch rate varies across the wafer as well. This leads to variations in the etched feature dimensions across the wafer, which is generally undesirable. It has been observed that by using the temperature sensitivity of the lateral etch rate it is possible to induce a radial temperature gradient by altering the wafer support zone temperatures so as to induce a radial temperature gradient and thereby compensate for this variation in the local reactant concentration, producing conditions that result in constant feature dimensions across the entire wafer.
  • the duration of typical etching recipes is from approximately 20 seconds to approximately two minutes, and a typical recipe will have several steps within the recipe. As such, it is necessary to be able to alter a wafer support zone temperature within a few seconds for multistep temperature control. In most cases of interest, these temperature changes within a recipe are less than approximately 10° C. It is therefore desirable to be able to change zone temperatures at a rate of approximately 0.3° C. per second, and preferably to be able to change zone temperatures at a rate of 1° C./sec or faster.
  • the basic design criteria for a fast ESC is that the thermal mass of the ceramic ESC be small and that the heater power density be large. It is also desirable that the thermal resistance of the thermal layer 304 below the ESC have relatively low thermal conductivity. Thus, the thickness of the ESC, the heater power density, and the thermal resistance are selected so as to permit temperature changes faster than about 1° C./sec.
  • FIG. 6 illustrates a flow diagram implementing the above solution by spatially but also temporally controlling the temperature of each region of a flat support during an etching process.
  • FIG. 6 also illustrates a method for processing a wafer during an etching process.
  • a base is provided.
  • the base is maintained at a constant temperature that is below the temperature of the wafer to be processed.
  • a layer of thermal insulation material is mounted on top of the base.
  • the wafer is held against a top face of a flat support which includes distinct spatial regions.
  • the flat support is mounted on top of the layer of thermal insulation material.
  • each spatial region of said flat support is independently heated to an initial temperature with at least one heater mounted to an underside of the flat support or embedded within the flat support.
  • the initial temperature for each region may differ from one another.
  • the temperature of at least one spatial region of the flat support during the etching process is altered to another temperature at a rate of at least 1° C. per second.
  • the final temperature for each region may differ from one another.
  • the temperature of each spatial region may be further monitored with a sensor placed inside each spatial region.
  • the signal generated by the sensors may be used to adjust the temperature of each spatial region by changing the power supplied to the heaters.
  • FIG. 7 is a schematic diagram of a system for controlling the temperature of a chuck in accordance with one embodiment of the present invention.
  • a user 702 may define a set of parameters to a computer 704 .
  • Such set of parameters may be, for example, the desired temperature of a first zone on the chuck, the desired temperature of a second zone on the chuck.
  • the computer 704 communicates with a storage component 706 storing the algorithm of FIG. 6 , inputs and outputs of computer 704 .
  • a first set of sensors 708 measures the first zone on the chuck.
  • a second set of sensors 710 measures the second zone on the chuck.
  • computer 704 Based on the temperature measurement of the first set of sensors 708 , computer 704 sends controls to the first set of heating elements 712 to adjust the temperature of the first zone on the chuck. Based on the temperature measurement of the second set of sensors 710 , computer 704 sends controls to the second set of heating elements 714 to adjust the temperature of the second zone on the chuck.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
US11/004,179 2001-04-30 2004-12-02 Method and apparatus for controlling spatial temperature distribution Abandoned US20050211385A1 (en)

Priority Applications (14)

Application Number Priority Date Filing Date Title
US11/004,179 US20050211385A1 (en) 2001-04-30 2004-12-02 Method and apparatus for controlling spatial temperature distribution
PCT/US2005/043801 WO2006068805A1 (en) 2004-12-02 2005-12-01 Method and apparatus for controlling spatial temperature distribution
KR1020077014977A KR101109440B1 (ko) 2004-12-02 2005-12-01 공간 온도 분포를 제어하기 위한 방법 및 장치
CN2010106228155A CN102122607B (zh) 2004-12-02 2005-12-01 控制空间温度分布的方法和装置
CNA2005800472891A CN101111934A (zh) 2004-12-02 2005-12-01 控制空间温度分布的方法和装置
SG200907998-9A SG158101A1 (en) 2004-12-02 2005-12-01 Method and apparatus for controlling spatial temperature distribution
JP2007544574A JP2008522446A (ja) 2004-12-02 2005-12-01 空間温度分布の制御方法及び装置
SG10201609601XA SG10201609601XA (en) 2004-12-02 2005-12-01 Method and apparatus for controlling spatial temperature distribution
SG10201408008QA SG10201408008QA (en) 2004-12-02 2005-12-01 Method and apparatus for controlling spatial temperature distribution
TW094142661A TWI481297B (zh) 2004-12-02 2005-12-02 控制空間溫度分布之方法及裝置
US12/436,443 US8963052B2 (en) 2001-04-30 2009-05-06 Method for controlling spatial temperature distribution across a semiconductor wafer
JP2011176261A JP2011244011A (ja) 2004-12-02 2011-08-11 空間温度分布の制御方法及び装置
JP2014055288A JP2014146822A (ja) 2004-12-02 2014-03-18 空間温度分布の制御方法及び装置
US14/594,648 US9824904B2 (en) 2001-04-30 2015-01-12 Method and apparatus for controlling spatial temperature distribution

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US84643201A 2001-04-30 2001-04-30
US10/062,395 US6847014B1 (en) 2001-04-30 2002-02-01 Method and apparatus for controlling the spatial temperature distribution across the surface of a workpiece support
US11/004,179 US20050211385A1 (en) 2001-04-30 2004-12-02 Method and apparatus for controlling spatial temperature distribution

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10/062,395 Continuation-In-Part US6847014B1 (en) 2001-04-30 2002-02-01 Method and apparatus for controlling the spatial temperature distribution across the surface of a workpiece support

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/436,443 Division US8963052B2 (en) 2001-04-30 2009-05-06 Method for controlling spatial temperature distribution across a semiconductor wafer

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US20050211385A1 true US20050211385A1 (en) 2005-09-29

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WO2006068805A9 (en) 2006-08-24
US8963052B2 (en) 2015-02-24
US20090215201A1 (en) 2009-08-27
KR101109440B1 (ko) 2012-01-31
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TWI481297B (zh) 2015-04-11
CN102122607B (zh) 2013-03-20
CN102122607A (zh) 2011-07-13
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US9824904B2 (en) 2017-11-21

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