UA75379C2 - Integrated circuit protected against unauthorized access and a method for producing the integral circuit - Google Patents
Integrated circuit protected against unauthorized access and a method for producing the integral circuit Download PDFInfo
- Publication number
- UA75379C2 UA75379C2 UA2003054669A UA2003054669A UA75379C2 UA 75379 C2 UA75379 C2 UA 75379C2 UA 2003054669 A UA2003054669 A UA 2003054669A UA 2003054669 A UA2003054669 A UA 2003054669A UA 75379 C2 UA75379 C2 UA 75379C2
- Authority
- UA
- Ukraine
- Prior art keywords
- tracks
- level
- integrated
- circuit
- microcircuit
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000000034 method Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 10
- 238000013461 design Methods 0.000 claims description 9
- 238000011156 evaluation Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000003786 synthesis reaction Methods 0.000 claims description 3
- 238000001308 synthesis method Methods 0.000 abstract description 10
- 239000004020 conductor Substances 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 238000001465 metallisation Methods 0.000 description 18
- 239000010410 layer Substances 0.000 description 14
- 230000006870 function Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10058078A DE10058078C1 (de) | 2000-11-23 | 2000-11-23 | Integrierte Schaltungsanordnung mit Analysierschutz und Verfahren zur Herstellung der Anordnung |
| PCT/DE2001/004198 WO2002043147A1 (de) | 2000-11-23 | 2001-11-08 | Integrierte schaltungsanordnung mit analysierschutz und verfahren zur herstellung der anordnung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| UA75379C2 true UA75379C2 (en) | 2006-04-17 |
Family
ID=7664330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| UA2003054669A UA75379C2 (en) | 2000-11-23 | 2001-08-11 | Integrated circuit protected against unauthorized access and a method for producing the integral circuit |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US7288786B2 (pt) |
| EP (1) | EP1336201B1 (pt) |
| JP (1) | JP2004514299A (pt) |
| KR (1) | KR100515555B1 (pt) |
| CN (1) | CN100359684C (pt) |
| BR (1) | BR0115535A (pt) |
| DE (1) | DE10058078C1 (pt) |
| MX (1) | MXPA03004572A (pt) |
| RU (1) | RU2263372C2 (pt) |
| UA (1) | UA75379C2 (pt) |
| WO (1) | WO2002043147A1 (pt) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10218096A1 (de) * | 2002-04-23 | 2003-11-13 | Infineon Technologies Ag | Integrierte Schaltung |
| DE10223176B3 (de) * | 2002-05-24 | 2004-01-22 | Infineon Technologies Ag | Integrierte Schaltung mit sicherheitskritischen Schaltungskomponenten |
| US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
| US6924552B2 (en) | 2002-10-21 | 2005-08-02 | Hrl Laboratories, Llc | Multilayered integrated circuit with extraneous conductive traces |
| DE10337256A1 (de) * | 2002-11-21 | 2004-06-09 | Giesecke & Devrient Gmbh | Integrierte Schaltkreisanordnung und Verfahren zur Herstellung derselben |
| JP4846239B2 (ja) * | 2002-12-13 | 2011-12-28 | エイチアールエル ラボラトリーズ，エルエルシー | ウェル注入を用いた集積回路の改変 |
| EP1654762A1 (en) | 2003-07-11 | 2006-05-10 | Philips Intellectual Property & Standards GmbH | Security-sensitive semiconductor product, particularly a smart-card chip |
| DE102004023462B4 (de) * | 2004-05-12 | 2006-06-08 | Infineon Technologies Ag | Verfahren zur Ausbildung von Leiterbahnstrukturen auf Halbleiterbauelementen |
| WO2005117115A1 (en) * | 2004-05-28 | 2005-12-08 | Koninklijke Philips Electronics N.V. | Chips with useful lines and dummy lines |
| US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
| JP2006228910A (ja) * | 2005-02-16 | 2006-08-31 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| DE102005042790B4 (de) | 2005-09-08 | 2010-11-18 | Infineon Technologies Ag | Integrierte Schaltungsanordnung und Verfahren zum Betrieb einer solchen |
| US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
| CN101617319B (zh) * | 2007-02-20 | 2012-09-26 | Nxp股份有限公司 | 具有背面破坏防护的半导体装置 |
| US8195995B2 (en) | 2008-07-02 | 2012-06-05 | Infineon Technologies Ag | Integrated circuit and method of protecting a circuit part of an integrated circuit |
| CN102184270A (zh) * | 2010-11-24 | 2011-09-14 | 天津蓝海微科技有限公司 | 安全芯片的版图保护电路自动生成方法 |
| FR2986632B1 (fr) | 2012-02-06 | 2016-02-12 | Altis Semiconductor Snc | Protection d'un circuit integre contre des attaques invasives |
| US9627310B2 (en) * | 2012-04-11 | 2017-04-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device with self-aligned interconnects |
| US8907497B2 (en) * | 2012-04-27 | 2014-12-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device with self-aligned interconnects and blocking portions |
| US8779592B2 (en) | 2012-05-01 | 2014-07-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Via-free interconnect structure with self-aligned metal line interconnections |
| GB201311834D0 (en) | 2013-07-02 | 2013-08-14 | Qinetiq Ltd | Electronic hardware assembly |
| KR20150037167A (ko) * | 2013-09-30 | 2015-04-08 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이의 형성 방법 |
| US11211342B1 (en) * | 2020-07-21 | 2021-12-28 | Taiwan Semiconductor Manufacturing Company Ltd. | Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell |
| WO2022161590A1 (en) | 2021-01-26 | 2022-08-04 | Tallinn University Of Technology | Physical obfuscation of hardware through capacitive coupling |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2471051A1 (fr) * | 1979-11-30 | 1981-06-12 | Dassault Electronique | Circuit integre a transistors mos protege contre l'analyse et carte comprenant un tel circuit |
| SU1251138A1 (ru) | 1984-12-27 | 1986-08-15 | Рижское Ордена Ленина Производственное Объединение "Вэф" Им.В.И.Ленина | Идентификационна карта |
| US4933898A (en) * | 1989-01-12 | 1990-06-12 | General Instrument Corporation | Secure integrated circuit chip with conductive shield |
| US5262353A (en) * | 1992-02-03 | 1993-11-16 | Motorola, Inc. | Process for forming a structure which electrically shields conductors |
| US5883000A (en) * | 1995-05-03 | 1999-03-16 | Lsi Logic Corporation | Circuit device interconnection by direct writing of patterns therein |
| EP0839344A1 (en) * | 1995-07-20 | 1998-05-06 | Dallas Semiconductor Corporation | Microcircuit with memory that is protected by both hardware and software |
| US5783846A (en) | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
| US5861652A (en) * | 1996-03-28 | 1999-01-19 | Symbios, Inc. | Method and apparatus for protecting functions imbedded within an integrated circuit from reverse engineering |
| JP3960645B2 (ja) | 1996-12-27 | 2007-08-15 | ローム株式会社 | 回路チップ搭載カードおよび回路チップモジュール |
| JPH10270562A (ja) * | 1997-03-27 | 1998-10-09 | Nippon Telegr & Teleph Corp <Ntt> | 半導体集積回路 |
| JP3638778B2 (ja) | 1997-03-31 | 2005-04-13 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
| JP3682151B2 (ja) * | 1997-06-27 | 2005-08-10 | 株式会社東芝 | 配線評価方法および配線評価装置 |
| EP1016140B1 (de) * | 1997-09-19 | 2003-11-19 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verdrahtungsverfahren für halbleiter-bauelemente zur verhinderung von produktpiraterie und produktmanipulation, durch das verfahren hergestelltes halbleiter-bauelement und verwendung des halbleiter-bauelements in einer chipkarte |
| US6014052A (en) * | 1997-09-29 | 2000-01-11 | Lsi Logic Corporation | Implementation of serial fusible links |
| US6137318A (en) * | 1997-12-09 | 2000-10-24 | Oki Electric Industry Co., Ltd. | Logic circuit having dummy MOS transistor |
| DE19810730A1 (de) | 1998-03-12 | 1999-09-16 | Philips Patentverwaltung | Microcontrollerschaltung |
| RU2151422C1 (ru) | 1998-06-15 | 2000-06-20 | Саратовский государственный университет им. Н.Г. Чернышевского | Микроэлектронное устройство |
| BR9913054A (pt) * | 1998-08-18 | 2001-05-08 | Infineon Technologies Ag | Chip semicondutor co cobertura de superfìcie |
| JP2000076140A (ja) | 1998-09-02 | 2000-03-14 | Nippon Telegr & Teleph Corp <Ntt> | 半導体集積回路 |
| WO2000019490A2 (en) * | 1998-09-29 | 2000-04-06 | Conexant Systems, Inc. | Dummy fill cell for reducing layer-to-layer interaction |
| US6496119B1 (en) | 1998-11-05 | 2002-12-17 | Infineon Technologies Ag | Protection circuit for an integrated circuit |
| CN1188911C (zh) | 1999-05-03 | 2005-02-09 | 因芬尼昂技术股份公司 | 保护多维结构的芯片堆的方法和装置 |
| JP2001196372A (ja) * | 2000-01-13 | 2001-07-19 | Mitsubishi Electric Corp | 半導体装置 |
| JP2001284357A (ja) | 2000-03-30 | 2001-10-12 | Sony Corp | 半導体装置 |
| JP2002118235A (ja) * | 2000-10-10 | 2002-04-19 | Mitsubishi Electric Corp | 半導体装置、半導体製造方法、および半導体製造用マスク |
-
2000
- 2000-11-23 DE DE10058078A patent/DE10058078C1/de not_active Expired - Fee Related
-
2001
- 2001-08-11 UA UA2003054669A patent/UA75379C2/uk unknown
- 2001-11-08 WO PCT/DE2001/004198 patent/WO2002043147A1/de active IP Right Grant
- 2001-11-08 RU RU2003118434/28A patent/RU2263372C2/ru not_active IP Right Cessation
- 2001-11-08 CN CNB018194265A patent/CN100359684C/zh not_active Expired - Fee Related
- 2001-11-08 MX MXPA03004572A patent/MXPA03004572A/es active IP Right Grant
- 2001-11-08 EP EP01997847.7A patent/EP1336201B1/de not_active Expired - Lifetime
- 2001-11-08 BR BR0115535-0A patent/BR0115535A/pt not_active IP Right Cessation
- 2001-11-08 KR KR10-2003-7006920A patent/KR100515555B1/ko active IP Right Grant
- 2001-11-08 JP JP2002544783A patent/JP2004514299A/ja active Pending
-
2003
- 2003-05-23 US US10/444,552 patent/US7288786B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN100359684C (zh) | 2008-01-02 |
| KR100515555B1 (ko) | 2005-09-16 |
| EP1336201B1 (de) | 2015-02-11 |
| DE10058078C1 (de) | 2002-04-11 |
| US7288786B2 (en) | 2007-10-30 |
| JP2004514299A (ja) | 2004-05-13 |
| BR0115535A (pt) | 2004-02-03 |
| EP1336201A1 (de) | 2003-08-20 |
| MXPA03004572A (es) | 2004-05-05 |
| KR20040010564A (ko) | 2004-01-31 |
| WO2002043147A1 (de) | 2002-05-30 |
| CN1476635A (zh) | 2004-02-18 |
| RU2263372C2 (ru) | 2005-10-27 |
| US20030205816A1 (en) | 2003-11-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| UA75379C2 (en) | Integrated circuit protected against unauthorized access and a method for producing the integral circuit | |
| JPH0787237B2 (ja) | 集積回路チップ | |
| KR100508891B1 (ko) | 집적 회로에 대한 어택을 검출하기 위한 회로 장치 및 방법 | |
| TW507307B (en) | Device to protect an integrated circuit formed in a substrate | |
| US20060180939A1 (en) | Tamper-resistant semiconductor device | |
| CN102404002B (zh) | 半导体集成电路装置 | |
| JP6635276B2 (ja) | 攻撃検知機能を備える電子装置、その設計方法及びその製造方法 | |
| US6359338B1 (en) | Semiconductor apparatus with self-security function | |
| EP3523746B1 (en) | An active shield for detecting an intrusion on an integrated circuit | |
| JPS62185398A (ja) | セラミツク基板を有する厚膜回路装置 | |
| US6919618B2 (en) | Shielding device for integrated circuits | |
| Trippel et al. | T-TER: Defeating A2 Trojans with Targeted Tamper-Evident Routing | |
| JP2001244414A (ja) | 半導体集積回路 | |
| US20100193958A1 (en) | Semiconductor Device and a Method of Manufacturing the Same | |
| Petryk et al. | Metal fillers as potential low cost countermeasure against optical fault injection attacks | |
| JP2520857B2 (ja) | 集積半導体回路 | |
| US6445018B1 (en) | Semiconductor device having signal line above main ground or main VDD line, and manufacturing method thereof | |
| JP2007035729A (ja) | 半導体集積回路装置 | |
| WO2005117115A1 (en) | Chips with useful lines and dummy lines | |
| US7015821B2 (en) | EEPROM memory matrix and method for safeguarding an EEPROM memory matrix | |
| KR100719694B1 (ko) | 플래쉬 메모리 소자 | |
| US20060168702A1 (en) | Security-sensitive semiconductor product, particularly a smart-card chip | |
| US6151245A (en) | Screened EEPROM cell | |
| Skorobogatov | Is Hardware Security prepared for unexpected discoveries? | |
| US7939946B2 (en) | Chip with a vertical contact structure |