TWI559483B - 可撓式微電子總成及方法 - Google Patents

可撓式微電子總成及方法 Download PDF

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Publication number
TWI559483B
TWI559483B TW103140786A TW103140786A TWI559483B TW I559483 B TWI559483 B TW I559483B TW 103140786 A TW103140786 A TW 103140786A TW 103140786 A TW103140786 A TW 103140786A TW I559483 B TWI559483 B TW I559483B
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TW
Taiwan
Prior art keywords
interconnect
circuit board
microelectronic assembly
electronic component
substrate
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Application number
TW103140786A
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English (en)
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TW201537714A (zh
Inventor
拉維Ｖ 馬哈吉
尼亭 戴斯潘迪
約翰Ｓ 古札克
阿黛爾 艾爾夏比尼
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英特爾公司
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Publication of TW201537714A publication Critical patent/TW201537714A/zh
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Publication of TWI559483B publication Critical patent/TWI559483B/zh

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    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structure Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

可撓式微電子總成及方法 發明領域
本揭示內容大體有關於可撓式微電子總成及相關方法。
發明背景
諸如電子晶片封裝體，晶片封裝體可能會或已經電氣及/或機械式固接至印刷電路板(PCB)或其他電路板、離散電子組件之類的微電子總成長期以來利用互連件以使總成的電子組件耦接至在總成內或者外部的其他組件。互連件可形成為永久或半永久性互連件，例如通過焊球與對面焊墊的耦接，或利用插座(socket)及其類似者可暫時或輕易去耦接。PCB或微電子總成內的跡線(trace)可耦接至焊墊或凸塊及/或插座以及可路由到中間或最終起點及/或目的地以便傳送或接收微電子總成及與其耦接之各種組件的電氣訊號。
依據本發明之一實施例，係特地提出一種微電子總成，其係包含：一基板，其係包括：包括一孔洞之一電 路板；一佈線層；及至少部份位於該孔洞內之一第一互連部；以及一電子組件，其係包括：耦接至該第一互連部的一第二互連部，於該電子組件與該佈線層之間形成一互連件。
100‧‧‧微電子總成
102‧‧‧晶片封裝體
104‧‧‧互連件焊墊
106‧‧‧基板
108‧‧‧PCB
110‧‧‧佈線層
112‧‧‧互連焊錫凸塊
114‧‧‧孔洞
116‧‧‧互連件
118‧‧‧囊封電介質
200‧‧‧箭頭
202‧‧‧焊墊及/或柱體
204‧‧‧支撐板
206‧‧‧箭頭
300‧‧‧改性區
302‧‧‧未改性區
400‧‧‧微電子總成
402‧‧‧導電黏著劑
404‧‧‧第一部份
406‧‧‧第二部份
408‧‧‧互連件
410‧‧‧矽晶粒
412‧‧‧基板
600‧‧‧流程圖
602至606‧‧‧步驟
700‧‧‧電子裝置
702‧‧‧系統匯流排
710‧‧‧電子總成
712‧‧‧處理器
714‧‧‧通訊電路
716‧‧‧顯示裝置
718‧‧‧揚聲器
720‧‧‧外部記憶體
722‧‧‧主記憶體
724‧‧‧硬碟
726‧‧‧可移除式媒體
730‧‧‧鍵盤及/或控制器
圖1根據一示範具體實施例圖示微電子總成的概括橫斷面圖。
圖2A至圖2C根據一示範具體實施例圖示微電子總成通過加熱的形成及分離。
圖3根據一示範具體實施例圖示微電子總成的窄視線圖。
圖4根據一示範具體實施例圖示微電子總成的概括橫斷面圖。
圖5的概括橫斷面圖根據一示範具體實施例圖示處於撓曲狀態的微電子總成。
圖6根據一示範具體實施例圖示用於製作微電子總成的流程圖。
圖7的區塊圖根據一示範具體實施例圖示加入至少一微電子總成的電子裝置。
較佳實施例之詳細說明
以下描述及附圖充分圖解說明數個特定具體實施例以使熟諳此藝者能夠實施它們。其他具體實施例可加入結構、邏輯、電子、方法及其他變更。有些具體實施例 的部份及特徵可加入或取代其他具體實施例的。提出於請求項的具體實施例涵蓋請求項的所有可行等效陳述。
微電子總成常常呈實質剛性，因為至少部份由構成總成的組件造成。儘管有些微電子總成因板體可撓或含有可撓基板而局部可撓，然而此類總成常常在總成組件附近實質不可撓。例如，電子晶片可包括以實質不可撓介電材料包裹的實質不可撓矽晶粒。不論微電子總成之部份的可撓程度如何，微電子總成中包含電子晶片的部份照例跟電子晶片一樣實質不可撓。如果附接電子晶片之PCB或基板可撓，則撓曲PCB或基板可能導致在電子晶片與PCB或基板之間的互連件斷裂。
已開發出微電子總成及相關製造方法可增加微電子總成的可撓性，甚至在相對不可撓個別組件的鄰域。可建立有孔洞形成於其中的可撓PCB或基板(以下一併稱為基板但不限於)(然而揭示於本文的總成及方法可完全應用於剛性或實質剛性基板)。互連件的基板部份可位於孔洞內。組件與板體的配對可藉由使互連件的組件部份與互連件的基板部份接觸以及使兩者連結在一起以形成互連件。如本文將予以揭示的，互連件因此可留在原地而不會不當地拉伸基板。
圖1根據一示範具體實施例圖示微電子總成100的概括橫斷面圖。如圖示，該微電子總成包括含有互連件焊墊(interconnect pad)104的晶片封裝體102以及基板106含有PCB 108、佈線層(routing layer)110以及在形成於PCB 108之孔洞114內的互連焊錫凸塊112。焊墊104及焊錫凸塊112形成至少部份提供晶片封裝體102與佈線層110之導電性的互連件116。
晶片封裝體102可包括在囊封電介質(encapsulating dielectric)118內的矽晶粒(被遮蔽)。焊墊104可由銅或其他適當導電材料形成。焊墊104可電氣耦接至晶粒通過電介質118。焊墊104及凸塊112和互連件116通常可為或全部或部份換成不導電的連接物。因此，微電子總成100的機械固定至少部份可用各種適當扣件，其組態方式可與如本文所揭示的互連件116組態相同或類似。
如圖示，焊錫凸塊112或第一互連部電氣耦接至佈線層110以及座落於PCB 108的孔洞114內。佈線層110可包含或由個別耦接至相關焊錫凸塊112的銅跡線形成。佈線層110可呈實質可撓。PCB 108以各種方式呈現實質剛性。不過，由於焊錫凸塊112座落於PCB 108的孔洞114內，佈線層110的撓曲允許焊錫凸塊112有一或更多自由度，至少部份與PCB 108無關。因此，焊錫凸塊112可在孔洞114移動以及與PCB 108半無關，藉此提供更多相對彈性抵抗互連件116如果在焊錫凸塊112對於PCB 108呈固定之情形下的斷裂。
佈線層110可包括充分柔軟的聚醯亞胺薄膜(polyimide film)以允許互連件116在有各種程度的撓曲期間仍得到保障。應瞭解，可撓性的極限可能取決於使用於微電子總成的材料及其相對尺寸。在各種實施例中，PCB 108可撓係由於所使用的材料及厚度或薄度。如本文所述，在各種實施例中，PCB 108呈實質剛性。
儘管以晶片封裝體102來描述微電子總成100，然而微電子總成100可用替代組件實作。例如，根據應用於晶片封裝體102的原理，可併入取代晶片封裝體102的矽晶粒，一或更多離散電子組件及其類似者。再者，該等原理可擴充，使得多個晶片封裝體102或晶片封裝體102、晶粒及離散組件的組合及混合物可實作成為微電子總成100的部件。
儘管基板106圖示成含有PCB 108與獨立的佈線層110，然而預料有其他的組態。例如，佈線層110可嵌入PCB 108。作為另一實施例，PCB 108可換成，例如，撓性電路或基板。不過，在此類實施例中，不論它的組態為何，基板106可包括在大體形成於基板106而不是特別在PCB 108之孔洞114內的焊錫凸塊112。
儘管互連件116圖示成其係由焊墊104及焊錫凸塊112形成，然而應瞭解，互連件116可由任何各種材料及用於形成互連件及/或大體電氣互連的組態形成。例如，焊墊104與焊錫凸塊112可反過來，其中包括作為晶片封裝體102之一部份的焊錫凸塊112以及包括作為基板106之一部份的焊墊104。插座技術的實作，例如可藉由使焊錫凸塊112耦接至用以插進晶片封裝體102的插座。
互連件116的形成係藉由連結焊墊104與焊錫凸塊112，而建立晶片封裝體102與基板106的電氣路徑。如 下文所詳述的，互連件116的形成可藉由使焊墊104及焊錫凸塊112相互接觸，然後造成焊墊104與凸塊112彼此電氣及機械耦接。互連件116的形成可通過施加熱，施加導電聚合物黏著劑，施加壓力，彼等之組合，或其他適當模式。
圖2A至圖2C圖示通過施加熱來形成及分離微電子總成100。圖2A與圖2B大體有關於微電子總成100的形成。已形成的微電子總成100可分離成獨立的晶片封裝體102及基板106，如圖2C所示。
在圖2A中，晶片封裝體102與基板106對齊及接觸。箭頭200圖示晶片封裝體102與基板106的相對運動。晶片封裝體102與基板106的適當安置使對面焊墊104與凸塊112對齊。
在圖2B中，施加局部熱至焊墊104及凸塊112，例如可點焊凸塊112至焊墊104。在圖示實施例中，通過使用加熱衝頭(heated punch)施加局部熱至焊墊及/或柱體202。加熱衝頭202對於佈線層110是在凸塊112對面，其中熱能係通過佈線層110傳導至凸塊112，在到達相關材料的熔點時，它可熔化，流動及最終建立與焊墊104的電氣及機械連接。在替代實施例中，可從微電子總成100的各種任何適當方向及方位來施加局部熱，例如從微電子總成的側面。
應瞭解，加熱不一定要局部。在一實施例中，微電子總成100或部份微電子總成100大體在例如烤爐中用 紅外線能量及其他適當技術加熱。
如圖示，視需要，在晶片封裝體102與基板106連結期間，支撐板204可提供附加剛性。如果微電子總成實質可撓，支撐板204可能特別有用。在晶片封裝體102與基板106彼此黏接時，可移除支撐板204。
在一替代實施例中，微電子總成100的形成係藉由施加機械壓力以形成互連件116。在各種實施例中，如本文所揭示的，互連件116可經形成有焊球及焊墊，或可利用通過沿著例如箭頭200施加機械壓力可形成彈性接點的替代材料來形成。
在圖2C中，視需要，微電子總成100分成晶片封裝體102與基板106。來自加熱衝頭202的局部熱可用來造成凸塊112回焊，於是根據如箭頭206所示的相對運動，可分離晶片封裝體102與基板106。視需要，在凸塊112正在回焊時，可施加吸力和局部熱以移除焊錫凸塊112。
圖3為微電子總成100比圖1狹窄的視圖。特別是，圖3圖示局部熱對於PCB 108的衝擊。如圖示，局部熱已施加至微電子總成100而且焊墊104與凸塊112連結以形成互連件116。佈線層110因而電氣耦接至嵌入電介質118的晶粒。
PCB 108圖示成含有化學及/或機械改性區300，其係由加熱所致，以及不被加熱影響而改性的未改性區302。儘管圖3圖示區300、302之間有清楚的界線，然而應明白及瞭解，在實際實作中，區300、302可能有梯度， PCB 108中可能有程度大於或小於其他部份的熱改性。
改性區300與未改性區302可由局部熱施加至微電子總成造成。特別是，由於局部熱實質施加至焊墊104及凸塊112，PCB 108有數個部份可接受足夠的熱以造成PCB 108熔化或以其他方式使它的化學或機械狀態改變，亦即，改性區300。PCB 108的其他部份，亦即，未改性區302，沒有接受足夠的熱以造成PCB材料之化學或機械性質有容易偵測的變化。這與全體加熱成對比，其中PCB 108可藉由全體加熱使它均勻或實質均勻地化學或機械改性。與全體加熱的衝擊相比，藉由局部加熱，可減少PCB之化學及/或機械本質變化。
應瞭解，加熱愈是局部，改性區300將會傾向愈小。因此，在特別狹窄地施加局部熱的各種實施例中，PCB 108可能完全不包括改性區300，亦即，PCB 108沒有來自加熱所致的可辨別化學或機械變化。在各種實施例中，改性區300可大些或小些，這取決於局部熱的本質，例如，單位時間的熱傳遞量以及熱的聚焦程度。
圖4根據示範具體實施例圖示微電子總成400的概括橫斷面圖。微電子總成400包含微電子總成100的許多元件。不過，該微電子總成包括在互連件408之第一部份404、第二部份406之間的導電黏著劑402，而不是藉由施加熱或壓力來形成。在各種實施例中，導電黏著劑402為導電聚合物。形成該微電子總成可藉由在其間有黏著劑402下，壓迫互連件408的部份404、406直到互連件408 中形成彈性接點。
如圖示，矽晶粒410未囊封於電介質中，如圖示。不過，視需要，可添加囊封晶粒410的電介質，以及視需要，互連件408及基板412中之一些或所有。基板412可包括與基板106相同或實質相同的組件，包括PCB 108及佈線層110。
圖5的概括橫斷面圖圖示處於撓曲狀態的微電子總成100。應瞭解，微電子總成100處於撓曲狀態的圖解說明同樣應用於微電子總成400及其他微電子總成。
在如圖1所示的微電子總成100處於有約90度角的撓曲狀態時，處於該撓曲狀態的微電子總成100顯示互連件116對於PCB 108沒有90度角。如圖示，互連件116大體可在PCB 108的孔洞114內撓曲同時保持電子組件102與佈線層110的電氣及機械連接。
圖6為用於製作微電子總成的流程圖。該流程圖可用來製作微電子總成100或任何其他適當微電子總成。
在步驟600，相對於一基板地，安置一電子組件，該基板包括包括形成孔洞、佈線層及至少部份位於該孔洞內之第一互連部的電路板。在一實施例中，安置該電子組件導致在該第一互連部與該電路板之間有一間隙。在一實施例中，相對於該基板地安置該電子組件的該步驟包括：相對於該第一互連部及該第二互連部地安置一黏著劑。在一實施例中，該黏著劑為一導電黏著劑。在一實施例中，該電子組件為一電子晶片、一矽晶粒及一離散電子 組件中之至少一者。在一實施例中，該第一互連部為一焊錫凸塊，以及該第二互連部為一焊墊。
在步驟602，該第一互連部耦接至電子組件的第二互連部以形成互連件於電子組件、基板之間。在一實施例中，該第一互連部的耦接包括：建立該電路板的一改性區與該電路板的一未改性區。在一實施例中，該第一互連部與該第二互連部的耦接包括：施加熱至該第一互連部及該第二互連部以及少於該電路板的全部，其中該改性區表示對該電路板加熱，以及該未改性區表示不對該電路板加熱。在一實施例中，該第一互連部與該第二互連部的耦接包括：用該黏著劑使該第一互連部至少部份固接至該第二互連部。在一實施例中，該第一互連部與該第二互連部的耦接包括：施加壓力於該第一互連部與該第二互連部之間。
在步驟604，使該互連件對於該電路板撓曲。
在步驟606，撓曲該佈線層。
包括使用如本揭示內容所述之電子總成的電子裝置實施例以顯示用於揭示專利標的的高級裝置應用實施例。圖7的區塊圖圖示包含至少一微電子總成的電子裝置700，例如描述於本文實施例的微電子總成100、400或其他微電子總成。電子裝置700只是一個可使用本發明具體實施例的電子系統實施例。電子裝置700的實施例包括但不限於個人電腦、平板電腦、行動電話、個人資料助理、MP3或其他數位音樂播放器、穿戴裝置、物聯網(IOTS)裝置等等。在此實施例中，電子裝置700包括資料處理系統， 含有系統匯流排702以耦接系統的各種組件。系統匯流排702提供電子裝置700之各種組件的通訊鏈而且可實作成為單一匯流排，匯流排組合，或用任何其他適當方式實作。
電子總成710耦接至系統匯流排702。電子總成710可包括任何電路或電路組合。在一具體實施例中，電子總成710包括可為任何類型的處理器712。用於本文的“處理器”意指任何一種計算電路，例如但不限於微處理器、微控制器，複雜指令集計算(CISC)微處理器，精簡指令集計算(RISC)微處理器，極長指令字(VLIW)微處理器，圖形處理器，數位訊號處理器(DSP)，多核心處理器，或任何其他類型的處理器或處理電路。
可加入電子總成710的其他類型電路有客製電路，特定應用積體電路(ASIC)，或其類似者，例如，一或更多電路(例如，通訊電路714)供使用於無線裝置，例如行動電話、呼叫器、個人資料助理、可攜式電腦、雙向無線電、以及類似電子系統。該IC可執行任何其他類型的功能。
電子裝置700也可包括外部記憶體720，接著它可包括一或更多記憶元件適用於特定應用系統，例如形式為隨機存取記憶體(RAM)的主記憶體722，一或更多硬碟724，及/或一或更多驅動器處理可移除式媒體726，例如光碟(CD)，數位影音光碟(DVD)及其類似者。
電子裝置700也可包括顯示裝置716，一或更多揚聲器718，和鍵盤及/或控制器730，它可包括滑鼠、軌跡球、觸控螢幕、語音辨識裝置，或任何其他裝置允許系 統使用者輸入資訊及接收來自電子裝置700的資訊。
其他實施例
實施例1可包括可含有基板的專利標的(例如，執行動作的設備、方法、構件)，該基板包含包含孔洞、佈線層及至少部份位於該孔洞內之第一互連部的電路板，以及一電子組件，其係包含耦接至該第二互連部的第一互連部而形成互連件於該電子組件與該佈線層之間。
實施例2可包括實施例1的專利標的，更包括在兩者之間有間隙的第一互連部與電路板。
實施例3可包括實施例1及2中之任一或更多的專利標的，更包括經組配成對於電路板可撓曲的互連件。
實施例4可包括實施例1-3中之任一或更多的專利標的，更包括該佈線層實質可撓。
實施例5可包括實施例1-4中之任一或更多的專利標的，更包括該電路板包含改性區與未改性區。
實施例6可包括實施例1-5中之任一或更多的專利標的，更包括該改性區表示對該電路板加熱以形成該互連件，以及該未改性區表示不對該電路板加熱。
實施例7可包括實施例1-6中之任一或更多的專利標的，更包括相對於該第一及該第二互連部地安置的黏著劑，該黏著劑至少部份固接該第一互連部與該第二互連部。
實施例8可包括實施例1-7中之任一或更多的專利標的，更包括該黏著劑為一導電黏著劑。
實施例9可包括實施例1-8中之任一或更多的專利標的，更包括在該第一及該第二互連部之間的接點為壓力接點(pressure junction)。
實施例10可包括實施例1-9中之任一或更多的專利標的，更包括該電子組件為一電子晶片、一矽晶粒及一離散電子組件中之至少一者。
實施例11可包括實施例1-10中之任一或更多的專利標的，更包括該第一互連部為一焊錫凸塊，以及該第二互連部為一焊墊。
實施例12可包括專利標的(例如，執行動作的設備、方法、構件)，它可包括相對於一基板地安置一電子組件，該基板包含電路板形成孔洞、佈線層及第一互連部至少部份位於該孔洞內以及使第一互連部與電子組件的第二互連部電氣及機械地耦接以形成互連件於電子組件、基板之間。
實施例13可包括實施例12的專利標的，更包括該電子組件導致在該第一互連部與該電路板之間有一間隙。
實施例14可包括實施例12及13中之任一或更多的專利標的，更包括相對於該電路板地撓曲該互連件。
實施例15可包括實施例12-14中之任一或更多的專利標的，更包括撓曲該佈線層。
實施例16可包括實施例12-15中之任一或更多的專利標的，更包括耦接該第一互連部的該步驟包括：建 立該電路板的一改性區與該電路板的一未改性區。
實施例17可包括實施例12-16中之任一或更多的專利標的，更包括該第一互連部與該第二互連部的耦接包括：施加熱至該第一互連部及該第二互連部以及少於該電路板的全部，其中該改性區表示對該電路板加熱，以及該未改性區表示不對該電路板加熱。
實施例18可包括實施例12-17中之任一或更多的專利標的，更包括相對於該基板地安置該電子組件的該步驟包括：相對於該第一互連部及該第二互連部地安置一黏著劑，以及其中該第一互連部與該第二互連部的耦接包括：用該黏著劑使該第一互連部至少部份固接至該第二互連部。
實施例19可包括實施例12-18中之任一或更多的專利標的，更包括該黏著劑為一導電黏著劑。
實施例20可包括實施例12-19中之任一或更多的專利標的，更包括固接該第一互連部與該第二互連部的該步驟包括：施加壓力於該第一互連部與該第二互連部之間。
實施例21可包括實施例12-20中之任一或更多的專利標的，更包括該電子組件為一電子晶片、一矽晶粒及一離散電子組件中之至少一者。
實施例22可包括實施例12-21中之任一或更多的專利標的，更包括該第一互連部為一焊錫凸塊，以及該第二互連部為一焊墊。
這些非限定實施例中之每一者可保持獨立，或可與其他實施例中之一或更多以任何排列或組合的方式組合。
以上詳細說明包括形成詳細說明之一部份的附圖之參考資料。該等附圖以圖解說明來顯示可實施本發明的特定具體實施例。該等具體實施例在此也被稱為“實施例”。此類實施例可包括除了經圖示及描述之外的元件。不過，本案發明人也考慮到只提供經圖示或描述之元件的實施例。此外，本案發明人也考慮到使用圖示或描述於特定實施例(或彼等之一或更多方面)之元件或者是圖示或描述於其他實施例(或彼等之一或更多方面)之元件(或彼等之一或更多方面)的任何組合或排列。
在此文件中，常見於專利文件的用語“一(a)”或“一(an)”用來包括一或一個以上，而與“至少一”或“一或更多”的任何其他實例或用法無關。在此文件中，用語“或”用來指稱不排它的或，使得“A或B”包括“A但無B”、“B但無A”以及“A與B”，除非另有說明。在此文件中，用語“包含(including)”和“其中(in which)”各自用來作為用語“包括(comprising)”及“其中(wherein)”的白話同義詞。再者，在下列請求項中，用語“包含(including)及包括(comprising)”是開放的，亦即，請求項中包含除列於此一用語後面者外之元件的系統、裝置、物品、成分、配方或方法，仍視為落在該請求項的範疇內。此外，在下列請求項中，詞彙“第一”、“第二”及“第三”等僅僅用來作為 標籤，而非旨在強加數字要求於其對象上。
以上描述旨在圖解說明而非限制。例如，上述實施例(或彼等之一或更多方面)可用來相互組合。例如本技藝一般技術人員在閱讀以上說明後可使用其他具體實施例。發明摘要係遵照37 C.F.R.條款1.72(b)要求提供讓讀者可迅速瞭解技術揭示的本質。應瞭解這不是用來解譯或限制申請專利範圍的範疇或意思。再者，在實施方式中，可能將各種特徵組合在一起以使揭示內容順暢。這不應被解譯成旨在未主張的揭示特徵對於任何請求項是不可或缺的。反而，本發明專利標的可能少於特定揭示實施例的全部特徵。因此，下列請求項併入實施方式，各個請求項本身為個別具體實施例，以及可設想到，此類具體實施例可相互組合成各種組合或排列。本發明的範疇應取決於隨附申請專利範圍及其等效陳述的全部範疇。
100‧‧‧微電子總成
102‧‧‧晶片封裝體
104‧‧‧互連件焊墊
106‧‧‧基板
108‧‧‧PCB
110‧‧‧佈線層
112‧‧‧互連焊錫凸塊
114‧‧‧孔洞
116‧‧‧互連件
118‧‧‧囊封電介質

Claims (22)

  1. 一種微電子總成，其包含：一基板，其包括：一電路板，其具有一通孔於其中，該通孔自該電路板之一第一主要表面延伸至一第二主要表面；一佈線層，其與該電路板直接接觸；及一第一互連部，其耦接至該佈線層且至少部份位於該通孔內；以及一電子組件，其包括一第二互連部，該第二互連部耦接至該第一互連部且至少部份位於該通孔外，以形成於該電子組件與該佈線層之間的一互連件。
  2. 如請求項1所述之微電子總成，該第一互連部與該電路板之間具有一間隙。
  3. 如請求項2所述之微電子總成，其中該互連件經組配以對於該電路板撓曲。
  4. 如請求項1所述之微電子總成，其中該佈線層實質可撓。
  5. 如請求項1所述之微電子總成，其中該電路板包括一改性區與一未改性區。
  6. 如請求項5所述之微電子總成，其中該改性區表示在該互連件之形成中對該電路板加熱，以及該未改性區表示不對該電路板加熱。
  7. 如請求項1所述之微電子總成，其更包括：相對於該第一及該第二互連部安置的一黏著劑，該黏著劑至少部份 固接該第一互連部相對於該第二互連部。
  8. 如請求項7所述之微電子總成，其中該黏著劑為一導電黏著劑。
  9. 如請求項1所述之微電子總成，其中該第一及該第二互連部之間的一接點為一壓力接點。
  10. 如請求項1所述之微電子總成，其中該電子組件為一電子晶片、一矽晶粒及一離散電子組件中之至少一者。
  11. 如請求項1所述之微電子總成，其中該第一互連部為一焊錫凸塊以及該第二互連部為一焊墊。
  12. 一種用以製作一微電子總成之方法，其係包括下列步驟：相對於一基板而安置一電子組件，該基板包括具有一通孔於其中的一電路板、與該電路板直接接觸的一佈線層、及耦接至該佈線層且至少部份位於該通孔內的一第一互連部，該通孔自該電路板之一第一主要表面延伸至一第二主要表面；以及相對於該電子組件之一第二互連部而電氣地及機械地耦接該第一互連部，以形成於該電子組件與該基板之間的一互連件，該第二互連部至少部份位於該通孔外。
  13. 如請求項12所述之方法，其中安置該電子組件的步驟導致在該第一互連部與該電路板之間有一間隙。
  14. 如請求項13所述之方法，其更包含：相對於該電路板撓曲該互連件。
  15. 如請求項12所述之方法，其更包含：撓曲該佈線層。
  16. 如請求項12所述之方法，其中耦接該第一互連部的步驟包括建立該電路板的一改性區與該電路板的一未改性區。
  17. 如請求項16所述之方法，其中耦接該第一互連部至該第二互連部的步驟包括施加熱至該第一互連部及該第二互連部並少於該電路板的全部，其中該改性區表示對該電路板加熱，以及該未改性區表示不對該電路板加熱。
  18. 如請求項12所述之方法，其中相對於該基板安置該電子組件的步驟包括相對於該第一互連部及該第二互連部安置一黏著劑，以及其中耦接該第一互連部至該第二互連部的步驟包括用該黏著劑至少部份固接該第一互連部相對於該第二互連部。
  19. 如請求項18所述之方法，其中該黏著劑為一導電黏著劑。
  20. 如請求項12所述之方法，其中耦接該第一互連部相對於該第二互連部的步驟包括施加壓力於該第一互連部與該第二互連部之間。
  21. 如請求項12所述之方法，其中該電子組件為一電子晶片、一矽晶粒及一離散電子組件中之至少一者。
  22. 如請求項12所述之方法，其中該第一互連部為一焊錫凸塊，以及該第二互連部為一焊墊。
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