JP5184740B2 - 半導体チップパッケージ - Google Patents
半導体チップパッケージ Download PDFInfo
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- JP5184740B2 JP5184740B2 JP2005121336A JP2005121336A JP5184740B2 JP 5184740 B2 JP5184740 B2 JP 5184740B2 JP 2005121336 A JP2005121336 A JP 2005121336A JP 2005121336 A JP2005121336 A JP 2005121336A JP 5184740 B2 JP5184740 B2 JP 5184740B2
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- 239000004065 semiconductor Substances 0.000 title claims description 102
- 239000000758 substrate Substances 0.000 claims description 133
- 239000002184 metal Substances 0.000 claims description 28
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 229910000679 solder Inorganic materials 0.000 claims description 26
- 230000001070 adhesive effect Effects 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 21
- 230000008878 coupling Effects 0.000 claims description 16
- 238000010168 coupling process Methods 0.000 claims description 16
- 238000005859 coupling reaction Methods 0.000 claims description 16
- 239000003989 dielectric material Substances 0.000 claims description 13
- 230000008054 signal transmission Effects 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 claims description 6
- 238000007789 sealing Methods 0.000 claims 2
- 239000000853 adhesive Substances 0.000 description 21
- 239000003990 capacitor Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229920006336 epoxy molding compound Polymers 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- -1 tape Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
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- H—ELECTRICITY
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10439—Position of a single component
- H05K2201/10492—Electrically connected to another device
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/1053—Mounted components directly electrically connected to each other, i.e. not via the PCB
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
Description
115 回路配線
120 半導体チップ
121 チップパッド
160 ボード
161 メタル配線
Claims (14)
- 複数のボンディングパッドが形成されている基板と、
前記基板上に実装され、複数のチップパッドが形成された半導体チップと、
前記半導体チップのチップパッドと前記基板のボンディングパッドを電気的に連結する接続手段と、
前記基板の一部分に結合されたボードと、
を含み、
前記半導体チップと前記電気的接続手段は、封止手段により封じられており、前記ボードが結合されている前記基板の一部分は封じられておらず、
前記ボード上に形成されたメタル配線と前記基板上に形成された回路配線がキャパシティブカップリング構造で電気的に連結され、
前記ボードと前記基板との間に、キャパシティブカップリング構造で連結されて信号伝送が成されることができる程高い誘電定数を有する誘電性物質をさらに備え、
前記誘電性物質は、前記基板の上部に覆われている感光膜物質を含むことを特徴とする半導体チップパッケージ。 - 前記誘電性物質は、前記ボードと前記基板がボンディング可能なように接着特性を有することを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記電気的接続手段は、ボンディングワイヤーであることを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記電気的接続手段は、ソルダバンプで、前記半導体チップは、前記基板にフリップチップボンディングされたことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記回路配線は、少なくとも一つの前記基板の封じられた部分と前記基板の封じられない部分に形成されることを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記ボードは、外部電子装置の入出力信号と前記半導体チップの入出力信号とを伝送するための伝送チャネルを含むことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記基板は、多数のビアホールを有することを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記基板は、多層構造で形成されたことを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記ボードは、メタル配線がパターニングされていることを特徴とする請求項1に記載の半導体チップパッケージ。
- 前記メタル配線は、差動信号伝送用配線ペアであることを特徴とする請求項9に記載の半導体チップパッケージ。
- 少なくとも二つの半導体チップパッケージを含み、
少なくとも一つの前記半導体チップパッケージは、
複数の基板ボンディングパッドが形成されている基板と、
前記基板上に実装され、複数のチップパッドが形成された半導体チップと、
前記半導体チップのチップパッドと前記基板ボンディングパッドとを電気的に連結する接続手段と、
前記基板表面の一部に結合されたボードと、
を含み、
前記半導体チップと前記電気的接続手段は、封止手段により封じられており、
前記ボードが結合されている部分は、封じられていなく、
前記ボードは少なくとも二つのパッケージを連結するものであり、
前記ボード上に形成されたメタル配線と前記基板上に形成された回路配線とがキャパシティブカップリング構造で連結され、
前記ボードと前記基板との間に、キャパシティブカップリング構造で連結されて信号伝送が成されることができる程高い誘電定数を有する誘電性物質をさらに備え、
前記誘電性物質は、前記基板の上部に覆われている感光膜物質を含むことを特徴とする半導体チップパッケージ。 - 前記ボード上に形成されたメタル配線は、封じられない部分に沿って前記二つのパッケージのうち少なくとも一つの前記基板上に形成された回路配線と連結されることを特徴とする請求項11に記載の半導体チップパッケージ。
- 前記誘電性物質は、前記ボードと前記基板がボンディング可能なように接着特性を有することを特徴とする請求項11に記載の半導体チップパッケージ。
- 少なくとも二つの半導体チップパッケージを含み、少なくとも二つの前記半導体チップパッケージは、請求項1に記載の半導体チップパッケージであることを特徴とする半導体チップパッケージ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20040027190A KR100632469B1 (ko) | 2004-04-20 | 2004-04-20 | 반도체 칩 패키지 |
KR2004-027190 | 2004-04-20 |
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Publication Number | Publication Date |
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JP2005311371A JP2005311371A (ja) | 2005-11-04 |
JP5184740B2 true JP5184740B2 (ja) | 2013-04-17 |
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Application Number | Title | Priority Date | Filing Date |
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JP2005121336A Active JP5184740B2 (ja) | 2004-04-20 | 2005-04-19 | 半導体チップパッケージ |
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US (1) | US7372139B2 (ja) |
JP (1) | JP5184740B2 (ja) |
KR (1) | KR100632469B1 (ja) |
CN (1) | CN100501983C (ja) |
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CN101212864B (zh) * | 2006-12-29 | 2010-12-15 | 巨擘科技股份有限公司 | 多层基板间交互连结的结构及其制造方法 |
US8803339B1 (en) * | 2010-10-20 | 2014-08-12 | Marvell Israel (M.I.S.L.) Ltd. | Bump out for differential signals |
DE102013106305A1 (de) * | 2012-06-20 | 2013-12-24 | Samsung Electro-Mechanics Co., Ltd. | Tragbares Endgerät |
KR102497583B1 (ko) * | 2015-10-27 | 2023-02-10 | 삼성전자주식회사 | 유연한 연결부를 갖는 반도체 장치 및 그 제조방법 |
FR3070573A1 (fr) * | 2017-08-25 | 2019-03-01 | Stmicroelectronics (Grenoble 2) Sas | Dispositif electronique incluant au moins une puce electronique et ensemble electronique |
CN211236956U (zh) * | 2018-07-13 | 2020-08-11 | 株式会社村田制作所 | 无线通信器件 |
US20190387634A1 (en) * | 2019-08-29 | 2019-12-19 | Intel Corporation | System, apparatus and method for providing a symmetric multi-processor high-speed link |
WO2023108538A1 (en) * | 2021-12-16 | 2023-06-22 | Intel Corporation | Enhanced i/o semiconductor chip package and cooling assembly having side i/os |
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JPH0730224A (ja) * | 1991-12-02 | 1995-01-31 | Nippon Telegr & Teleph Corp <Ntt> | 電子装置の実装構造 |
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US7372139B2 (en) | 2008-05-13 |
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US20050230852A1 (en) | 2005-10-20 |
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CN1700459A (zh) | 2005-11-23 |
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