TWI523166B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TWI523166B
TWI523166B TW101138060A TW101138060A TWI523166B TW I523166 B TWI523166 B TW I523166B TW 101138060 A TW101138060 A TW 101138060A TW 101138060 A TW101138060 A TW 101138060A TW I523166 B TWI523166 B TW I523166B
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Taiwan
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semiconductor device
semiconductor wafer
structures
layer
circuit board
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TW101138060A
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English (en)
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TW201334129A (zh
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Hisashi Tanie
Hiroshi Shintani
Naotaka Tanaka
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Hitachi Ltd
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Publication of TWI523166B publication Critical patent/TWI523166B/zh

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Description

半導體裝置及其製造方法
本發明係有關適用於具備電路基板，和安裝於此電路基板之半導體晶片的半導體裝置之熱應力的降低以及散熱性的提升而為有效之技術。
作為本技術領域的背景技術，有著專利文獻1(日本特開2006-287091號公報)，專利文獻2(日本特開2003-188209號公報)，專利文獻3(日本特開2003-298012號公報)，及非專利文獻1。
對於專利文獻1係作為稱之「從負荷高溫高荷重之熱壓著工程，採用以低溫低荷重使其連接之接合處理工法，防止經由高溫之半導體元件之熱的破壞或經由高荷重之電路特性或層間膜斷裂之發生」之課題的解決手段，記載有「具備形成金屬突起電極3於複數之墊片電極部2之半導體元件1，和具有配線電極部5之電路安裝基板4的半導體裝置，其中，於電路安裝基板4之配線電極部5上，形成導電性，且具有彈性之導電彈性體6，在金屬突起電極3扎入導電彈性體6之狀態，將半導體元件1安裝於電路安裝基板4，經由具有絕緣性之接著層10而電性連接固定金屬突起電極3與配線電極部5之技術(參照摘要)。
對於專利文獻2係作為稱之「提供抑制經由因半導體晶片與電路基板的熱膨脹率差引起之熱應力的連接信賴性 之下降，更且對於實現高密度安裝適合之半導體裝置與其製造方法」之課題的解決手段，技術記載有「經由施以細微加工之加工基板與圖案化技術，形成控制形狀之微小的導電性連接部，使用此而連接半導體晶片與電路基板。半導體裝置係成為半導體晶片之電極墊則藉由至少具有2個以上之屈曲部，彎曲部之導電性連接部而連接於電路基板之電極墊，且封入有絕緣性封閉部於兩者之間的構造。在此半導體裝置中，可經由於加上熱應力時導電性連接部分，及絕緣性封閉部分產生變形而緩和熱應力，使連接信賴性提升者」。
對於專利文獻3係作為「提供未有加以連接之元件材料之耐熱性上的限制，而未有經由應力之裝置機能之劣化或元件之損傷之虞，未有鄰接之連接部產生接觸而產生鄰接電極間之短路之虞之半導體裝置及其製造方法」之課題的解決手段，技術記載有「固體攝影元件10係具有掃描電路部12，光電變換部14，微彈片16及連接層18。微彈片16係經由金屬等而固定一端於畫素電極30上之同時，形成為彎曲於上方之舌片狀，在以容許範圍內加以壓縮的狀態，與光電變換部側電極42接觸，電性連接畫素電極30及光電變換部側電極42。連接層18係構造性地連接掃描電路部12及光電變換部14」。
對於非專利文獻1係對於在本發明所使用之奈米構造層之製造方法以及力學特性加以記載。
先前技術文獻 〔專利文獻〕
〔專利文獻1〕日本特開2006-287091號公報
〔專利文獻2〕日本特開2003-188209號公報
〔專利文獻3〕日本特開2003-298012號公報
〔非專利文獻〕
〔非專利文獻1〕Sumigawa T. et. al., Disappearance of stress singularity at interface edge due to anostructured thin film, Engineering Fracture Mechanics 75 (2008) 3073-3083.
安裝半導體晶片於電路基板之構造係因組合使用不同的材料之故，產生有經由溫度變化而因各構件之熱變形的不同引起之熱應力。經由半導體製品之使用環境的多樣化，而所使用之溫度區域擴大時，產生的熱應力變大之故，防止經由此熱應力之半導體製品之信賴性下降情況則成為課題。
另外，對於半導體製品之動作時，半導體晶片則產生發熱。經由安裝密度之增加而發熱溫度變高時，半導體晶片之溫度上升則變為顯著，憂慮有經由此溫度上升之半導體晶片之效率降低或經由熱應力之構件的破損。隨之，半導體安裝構造係溫度上升的抑制，即散熱性之提昇則成為課題。
本發明之目的係提供可實現熱應力之降低與散熱性之提升的半導體安裝構造及其製造方法。
本發明之前述及其他目的與新的特徵，係可從本說明書的記述及附加圖面了解。
如將在本申請所揭示之發明之中所代表之構成，簡單地進行說明時，如以下。
經由本發明之半導體裝置之一形態係具備電路基板，安裝於前述電路基板之半導體晶片，對於前述半導體晶片與前述電路基板之間，係設置有具有直徑或一邊的長度為不足1μm之剖面形狀之複數構造體加以設置為平面狀而成之構造層者。
將經由在本申請所揭示之發明之中所代表之構成所得之效果，如簡單地進行說明時，如以下。
經由將構成半導體裝置之各構件的熱變形差，經由構造體之變形而吸收之時，可降低半導體裝置之熱應力者。
另外，經由使用將複數之構造體配置成平面狀的構造層之時，半導體裝置之熱阻抗變小，可使散熱性提升者。
以下，將本發明之實施形態，依據圖面加以詳細說 明。然而，在為了說明實施形態之全圖中，對於具有同一的機能之構件係有附上同一符號，其反覆的說明係省略之。另外，在實施形態中，除了特別必要時以外，原則上不會反覆說明同一或同樣的部分。更且，在說明實施形態之圖面中，為了容易了解構成，在平面圖亦附有影線之情況，或在剖面圖亦省略影線之情況。
(實施形態1)
圖1(a)係本發明之實施形態1的半導體裝置之剖面圖，圖1(b)係顯示同圖(a)之一部分的擴大剖面圖。
本實施形態之半導體裝置係具有將形成有二極體元件之半導體晶片1的上面，藉由變形吸收層2a及接合層3a而電性連接於導電構件4，將下面藉由變形吸收層2b及接合層3b而電性連接於導電構件5之安裝構造。此半導體裝置係成為呈從一對之導電構件4，5之一方流入之電流則經由半導體晶片1內之二極體元件而加以整流，再經由從導電構件4，5之另一方流出之時，具有作為二極體之機能。
上述半導體晶片1係在半導體製造處理(前工程)中，由具有二極體機能之單結晶矽所成，其尺寸係1邊約6mm，厚度約0.2mm。
夾持半導體晶片1之各變形吸收層2a，2b係由沿著厚度方向(圖的上下方向)所層積之3種類之不同層所加以構成。即各變形吸收層2a，2b係如圖1(b)所示，由 配置於厚度方向之中央的奈米構造層7，和夾持奈米構造層7之2層之板層6，8加以構成。
上述奈米構造層7係具有以約170nm間隔而配置具備擁有具有約25nm直徑之略圓形之剖面形狀外徑約150nm，內徑約100nm，間距約50nm之彈簧形狀之奈米構造體9為平面狀之構造。奈米構造體9之高度係10μm，其主材料為銅(Cu)。
如此，經由構成奈米構造層7之複數之各奈米構造體9擁有奈米等級，即1μm以下尺寸之彈簧形狀之時，奈米構造層7之剛性則變小之故，可經由奈米構造層7之變形而吸收因構成半導體裝置之各構件的熱變形差引起之熱應力者。
另外，經由將熱傳導率高的銅作為主材料之奈米構造體9緊密地配置成平面狀之時，降低奈米構造層7之厚度方向的熱阻抗。由此，動作時之半導體晶片1的熱則通過變形吸收層2a，2b而良好地擴散於外部之故，可抑制半導體晶片1之溫度上升者。
上述變形吸收層2a與導電構件4之間的接合層3a，及變形吸收層2b與導電構件5之間的接合層3b係均由厚度50μm之焊料材所成。另外，導電構件4，5係由銅所成，具有作為流動電流之電極的機能，和作為將在半導體晶片1產生的熱釋放於外部之散熱板之機能。
構成上述奈米構造層7之彈簧形狀之奈米構造體9係各一端則固定於板層6，而另一端則固定於板層8。各板 層6，8係由厚度約5μm之平坦的金屬薄膜所成，其主材料係鎳(Ni)。
經由以板層6，8固定各奈米構造體9之時，奈米構造層7與接合層3a，3b之接合處成為平坦的面。由此，奈米構造層7與接合層3a，3b之接合變為容易之同時，可防止在接合時，於奈米構造層7之間隙流入有接合層3a(或3b)之不良情況。
另外，經由將鎳作為主材料而構成板層6，8之時，可防止在半導體裝置之製造過程的板層6，8之表面氧化之故，可防止因其表面氧化層引起之接觸阻抗增加等之不良情況。
在本實施形態中，使用鎳於板層6，8，但例如從板層8的生成至設置接合層3a，3b之時間為短的情況，或在真空環境製造半導體裝置之情況等，對於在製造過程不易產生有板層6，8之表面氧化之情況係對於板層6，8亦可使用銅者。銅係因較鎳熱傳導率為高之故，此情況係較使用鎳之情況更可降低熱阻抗者。
如此，於半導體晶片1與導電構件4，5之間設置具有奈米構造層7之變形吸收層2a，2b之情況則為本發明大的特徵。
圖2(a)係本發明之比較例的半導體裝置之剖面圖，圖2(b)係顯示同圖(a)之一部分的擴大剖面圖。
圖2所示之半導體裝置(比較例)係成為從圖1所示之本實施形態之半導體裝置去除變形吸收層2a，2b之構 造，而半導體晶片1與導電構件4，5則僅藉由接合層3a，3b而加以連接。
銅製之導電構件4，5與矽製之半導體晶片1係因線膨脹係數有大的差異之故，導電構件4，5與半導體晶片1之熱變形差為大。因此，在圖2所示之構造中，有必要將半導體晶片1與導電構件4，5的熱變形差，經由配置於此等之間的接合層3a，3b而吸收，對於接合層3a，3b係要求厚且剛性小的材料者。隨之，在圖2所示之構造中，不僅限制作為接合層3a，3b而可使用之材料，還經由接合層3a，3b之厚度的增加而熱阻抗變大。
另外，如上述比較例，對於無法由接合層3a，3b完全吸收半導體晶片1與導電構件4，5之熱變形差之情況，憂慮有產生半導體晶片1之破裂或動作不良，接合層3a，3b之破壞等之不良情況者。因此，以往係提案有經由將接合層3a，3b作為多層構造而使其變形吸收機能提升，以及經由樹脂封閉全體而降低半導體晶片1與導電構件4，5的熱變形差等種種構造。
另一方面，在圖1所示之本實施形態之半導體裝置中，具備奈米構造層7之變形吸收層2a，2b則吸收半導體晶片1與導電構件4，5的熱變形差。由此，可提供未實施接合層3a，3b之多層化或樹脂封閉等之對策，而可防止半導體晶片1之破裂或動作不良，接合層3a，3b之破壞等之不良情況之高信賴的安裝構造者。
另外，在圖1所示之本實施形態之半導體裝置中，因 變形吸收層2a，2b吸收各構件之熱變形之故，無須對於接合層3a，3b賦予變形吸收機能。由此，因可在可接合之範圍薄化接合層3a，3b之厚度之故，亦兼具與加厚接合層3a，3b而具有變形吸收機能之圖2的構造作比較而可減低熱阻抗之特徵。
接著，參照圖3，圖4同時，對於本實施形態之半導體裝置之製造方法加以說明。
首先，準備圖3(a)所示之半導體晶片1。對於此半導體晶片1係在半導體製造處理(前工程)形成有二極體元件。
接著，如圖3(b)所示，使用蒸鍍法而於半導體晶片1的表面形成鎳膜所成之板層8。板層8係取代蒸鍍法而以電鍍法等而形成亦可。另外，對於在半導體製造處理而於半導體晶圓表面設置金屬層之情況，係亦可將其金屬層作為板層8而利用者。
接著，如圖3(c)所示，在略真空的環境下，將半導體晶片1對於垂直於板層8的軸而言進行旋轉之同時，經由從對於此軸而言斜方向照射銅原子33而使其蒸鍍之時，於板層8表面形成由具有奈米等級之彈簧形狀之多數之奈米構造體9所成之奈米構造層7。
接著，在停止半導體晶片1之旋轉後，如圖3(d)所示，經由從奈米構造層7的上方蒸鍍鎳原子34之時，於奈米構造層7之上部形成板層6。經由至此之工程，於半導體晶片1之表面形成板層8與奈米構造層7與板層6所 成之變形吸收層2a。
接著，在使半導體晶片1之表背面反轉之後，經由實施與上述同樣步驟之時，於半導體晶片1之背面形成板層8與奈米構造層7與板層6所成之變形吸收層2b(圖3(e))。
然而，在上述之製造方法中，切割半導體晶圓而準備半導體晶片1之後，於半導體晶片1之兩面形成變形吸收層2a，2b，但於半導體晶圓之兩面，以上述步驟形成變形吸收層2a，2b之後，切割此半導體晶圓而將半導體晶片1作為個片化亦可。此情況係有著對於從半導體晶圓所得到之多數的半導體晶片1可總括形成變形吸收層2a，2b之優點。但在半導體晶圓之切割時因必須注意不要將變形吸收層2a，2b造成破損之故，對應於切割的方法而選擇適當的方法為佳。
接著，如圖4(a)所示，將於導電構件5之上部依接合層3b，形成有變形吸收層2a，2b之半導體晶片1，接合層3a及導電構件4順序重疊之後，將此層積體，暴露於構成接合層3a，3b之焊料材之熔融溫度以上之環境下。
由此，半導體晶片1之表面的變形吸收層2a與導電構件4則藉由接合層3a而加以接合，而半導體晶片1之背面的變形吸收層2b與導電構件5則藉由接合層3b而加以接合。
此時，在本實施形態中，經由以碳製之接合用治具 41a，41b固定上述層積體之時，防止構成層積體之各構件相互間之位置偏移。另外，對於上述接合時，將以接合用治具41a，41b所固定之層積體收容於迴焊設備爐，經由以略真空環境下加熱之時，降低產生於接合層3a，3b內部之未接合部或孔隙。
之後，冷卻迴焊設備爐內，經由從接合用治具41a，41b取出層積體之時，完成本實施形態之半導體裝置(圖4(b))。
如根據上述之製造方法，因成為可製作將具有奈米等級，即不足1μm尺寸之彈簧形狀之多數奈米構造體9緊密配置之奈米構造層7之故，可實現具有與以往技術顯著不同之半導體安裝構造者。
接著，對於本發明之半導體安裝構造之特徵加以說明。圖5(a)係顯示具有以往技術之微米尺寸之彈簧10，圖5(b)係顯示單純尺寸降低同圖(a)所示之彈簧之奈米等級之彈簧11，圖5(c)係各顯示將具有奈米等級之彈簧形狀之奈米構造體9緊密配置之本實施形態之奈米構造層7。
變形吸收層所吸收的變形係從主要為剪切變形之情況，將各彈簧認為剪切變形所作用之1支針，將微米的彈簧10模式化為線徑10μm的針1支，將奈米等級之彈簧11模式化為線徑10nm的針1支，將奈米構造層7模式化為線徑10nm的針1000000(=1000×1000)支。針的高度(奈米構造層7之厚度)係均作為相同的值L。
此時，產生於針的最大應力(σ max)係以下式所表示。
(式中，E係縱彈性率，d係線徑，u係所作用之剪切位移)
從此式，產生於奈米構造層7與奈米等級之彈簧11的應力係為相同，但在d為1000倍之微米的彈簧10中，產生有1000倍的應力，其破壞防止則成為課題。
另一方面，熱阻抗(R)係以下式所示。
(式中，λ係材料之熱傳導率，n係支數)
從此式，奈米構造層7與微米的彈簧10之熱阻抗係為相同，在奈米等級之彈簧11中，係熱阻抗成為1000000倍之故，半導體晶片的溫度上升則變為顯著。然而，對於為了將產生於微米之彈簧10的應力作為與奈米構造層7相同，有必要將高度L作為32倍，對於此情況係熱阻抗成為32倍。
從此等情況，並存對於半導體安裝構造所要求之變形吸收與低熱阻抗之機能係在以往技術之微米之彈簧10或單純地將此尺度降低之奈米等級之彈簧11中係為無法實現，而經由本發明而首次了解到可實現之機能者。
圖6(a)係顯示本實施形態之奈米構造體9之應力解析用模式。奈米構造體9之實際高度係10μm，在此，將其中的1500nm部分之高度作為模式化。另外，圖6(b)係顯示實施應力分析而得到之奈米構造體9之變形圖與應力分布的一例。
圖6(b)之顏色濃處所為應力大的處所。了解到由彈簧全體之變形吸收剪切位移者，及與中央部作比較，上下兩端部的應力為大者。
圖7係顯示從應力解析所得到之剪切位移量(單位：μm)與最大應力(單位：MPa)之關係圖表。另外，圖8係顯示在從圖7的結果求得之高度10μm的奈米構造體9之剪切位移量(單位：μm)與最大應力(單位：MPa)之關係的圖表。
在本實施形態之半導體裝置中，剪切位移量最大部分為半導體晶片1之端部附近。在此位置之剪切位移量係從半導體晶片1之中心的距離3mm，半導體晶片1之線膨脹係數3ppm/℃，導電構件之線膨張係數17ppm/℃，溫度變化為200℃之情況為8.4μm。
從圖8，高度10μm之奈米構造體9之情況，在剪切位移量8.4μm產生之最大應力係約100Mpa，可從銅材的 疲勞強度，確認滿足對於半導體裝置要求之次數之疲勞壽命者。然而，對於在此之銅的疲勞強度係記載於“The society of materials science,Databook on fatigue strength of metallic materials,(1996),Elsevier Science.”。
接著，關於熱傳導率而作確認。奈米構造層7之厚度方向的熱傳導率係經由於奈米構造層7的內部具有空間(銅的體積佔有率為小)者，及從奈米構造體9，為了作為螺旋形狀而熱傳導路徑變長者，變較主體材之銅的熱傳導率為小。
本實施形態之奈米構造體9則佔奈米構造層7之體積比例係約13%。當假定經由傳導路徑之增加而熱傳導性1位數下降時，奈米構造層7之厚度方向之熱傳導率係成為銅的熱傳導率之1/100程度。此係作為接合層3a，3b而使用之焊料材的約1/10之熱傳導率。隨之，厚度10μm之奈米構造層7之熱阻抗係與厚度100μm之焊料層之熱阻抗同等，而奈米構造層7之熱阻抗則未成為顯著之課題者。更且，如在圖1與圖2之比較所示，在本實施形態之半導體安裝構造中，因減小接合層3a，3b之厚度之故，如可將接合層3a，3b之厚度薄化為100μm以上時，亦可降低全體之熱阻抗者。
如以上，本實施形態之半導體裝置係可確認到具備充分之疲勞強度與低熱阻抗者。
(實施形態2)
圖9(a)係本發明之實施形態2的半導體裝置之平面圖，圖9(b)係顯示同圖(a)之A-A線剖面圖，圖9(c)係擴大同圖(b)之一部分的剖面圖。
本實施形態之半導體裝置係具有將形成有IGBT(Insulated Gate Bipolar Transistor)之半導體晶片1安裝於陶瓷基板91上之構造。對於此陶瓷基板91上面係形成有複數之電路圖案92a，92b，92c，對於下面係形成有金屬圖案93。陶瓷基板91係藉由配置於金屬圖案93下面之接合材94而接合於基底構件95上面。
如圖9(c)所示，對於半導體晶片1下面係形成有變形吸收層2b。半導體晶片1係藉由配置於變形吸收層2b下面之接合層3b而電性連接於電路圖案92a。另一方面，對於半導體晶片1上面係形成有IGBT之閘極端子99a與射極端子99b。另外，對於閘極端子99a之上部係形成有變形吸收層2a，對於射極端子99b上部係形成有變形吸收層2c。並且，閘極端子99a係藉由配置於其上部之接合層3a而電性連接於閘極端子接合構件97之一端，射極端子99b係藉由配置於其上部之接合層3b而電性連接於射極端子接合構件96之一端。更且，如圖9(b)所示，閘極端子接合構件97之另一端係藉由接合材98a而電性連接於電路圖案92a，射極端子接合構件96之另一端係藉由接合材98b而電性連接於電路圖案92c。
對於圖9係雖無圖示，但各上述變形吸收層2a，2b，2c係以與前述實施形態1之變形吸收層2a，2b同一構造 加以構成。即，各變形吸收層2a，2b，2c係由奈米構造層7，和夾持奈米構造層7之2層的板層6，8加以構成，奈米構造層7係具有將具備螺旋形狀之多數的奈米構造體9緊密地配置之構造。另外，經由對於電路圖案92a，92b，92c，射極端子接合構件96，及閘極端子接合構件97係使用熱傳導率高的銅之時，降低半導體晶片1與外部之間的熱阻抗。
然而，實際之半導體裝置係對於圖9所示之構件以外，亦具備為了取得電路圖案92a，92b，92c與外部之電性導通的端子，保護半導體裝置之殼體或蓋，封閉半導體裝置之封閉凝膠等，但此等構件係因對於本發明之機能未有影響之故，省略圖示及說明。
與前述實施形態1之大的不同點係半導體晶片1為了具有作為IGBT之機能而設置複數的端子(閘極端子99a，射極端子99b)於半導體晶片1上面的點。因此，與實施形態1不同，於半導體晶片1上面配置複數之變形吸收層2a，2c。並且，經由對於變形吸收層2a，2c上部連接具有與端子(閘極端子99a，射極端子99b)之平面尺寸略同一之底面尺寸的端子接合構件(閘極端子接合構件97，射極端子接合構件96)之時，成為不僅從半導體晶片1下面側，而亦可從上面側有效地釋放動作時之半導體晶片1的發熱之構造。
上述端子接合構件(閘極端子接合構件97，射極端子接合構件96)係不僅長度大而剛性亦為大。因此，未設置 變形吸收層2a，2c之情況，經由半導體晶片1與端子接合構件(閘極端子接合構件97，射極端子接合構件96)之熱變形差的接合層3a之信賴性下降則成為課題。隨之，此情況，對於端子(閘極端子99a，射極端子99b)與電路圖案92a，92b，92c之電性連接係使用如導線般的細且剛性小的構件則為一般。
但如根據本實施形態，半導體晶片1與端子接合構件(閘極端子接合構件97，射極端子接合構件96)之熱變形差則經由變形吸收層2b，2c所吸收之故，可確保高信賴性之同時，可降低半導體晶片1與端子接合構件(閘極端子接合構件97，射極端子接合構件96)之間的熱阻抗者。
然而，當於端子接合構件(閘極端子接合構件97，射極端子接合構件96)之一部分有剖面積之小處所時，其位置則成為散熱路徑之障礙。因此，在本實施形態中，將端子接合構件(閘極端子接合構件97，射極端子接合構件96)之形狀，訂定呈較面積小部分之端子(在此係閘極端子99a)為大。另外，在本實施形態中，為了防止半導體晶片1之外周部與端子接合構件(閘極端子接合構件97，射極端子接合構件96)之接觸，如圖9(c)所示，在半導體晶片1之外周部中，於端子接合構件(閘極端子接合構件97，射極端子接合構件96)之間設置一定的間隙L3。
從此等之情況，在半導體晶片1之上部的端子接合構 件(閘極端子接合構件97，射極端子接合構件96)之高度L2係成為較閘極端子接合構件97與閘極端子99a之連接寬度L1為大者為特徵。
(實施形態3)
圖10(a)係本發明之實施形態3的半導體裝置之平面圖，圖10(b)係同圖(a)之B-B線剖面圖。
本實施形態之半導體裝置係與前述實施形態2之半導體裝置相同，具有將形成有IGBT之半導體晶片1安裝於陶瓷基板91上之構造，但與實施形態2之不同點係將在半導體晶片1之上部之端子接合構件(閘極端子接合構件97，射極端子接合構件96)之高度作為較其他處所為大者。
如此作為之情況係因在半導體晶片1附近之端子接合構件(閘極端子接合構件97，射極端子接合構件96)之體積變大之故，在半導體晶片1之附近之端子接合構件的熱容量變大。隨之，可減少半導體晶片1反覆進行動作與停止情況之半導體晶片1之溫度變化，可更確保安定之動作同時，更可提昇熱疲勞壽命者。
接著，使用圖11及圖12而對於實施形態2，3之效果加以說明。圖11(a)係顯示未具有變形吸收層2b，2c及端子接合構件(閘極端子接合構件97，射極端子接合構件96)之比較例之構造的部分剖面圖，圖11(b)係顯示實施形態2之構造的部分剖面圖，圖11(c)係顯示實施 形態3之構造的部分剖面圖。
在此等構造中，以熱傳導解析計算半導體晶片1反覆進行發熱與停止情況之半導體晶片1之溫度變化。然而，作為流動70℃的冷卻水於基底構件95之下面，使半導體晶片1的熱從基底構件95之下面側釋放的條件。將計算結果示於圖12。
在任何構造中，發熱時從半導體晶片1產生的熱量係為相同，但半導體晶片1之溫度係根據構造而有大的差異。即，發熱結束時之半導體晶片1之溫度係依比較例之構造，實施形態2之構造，實施形態3之構造順序為高。
於圖13顯示各構造之溫度變化量。對於比較例之構造的溫度變化量為36℃而言，實施形態2，3之構造的溫度變化量各為27℃，24℃，對於比較例之構造而言各降低為75%，67%。如此，由使用實施形態2或實施形態3之構造者，可確認到可降低半導體晶片1之溫度變化。
接著，使用圖14~圖16，說明實施形態2，3之半導體裝置之製造方法。
首先，準備圖14(a)，(b)，(c)所示之半導體晶片1。如圖14(a)所示，對於半導體晶片1之上面係形成有連接於IGBT之閘極之閘極端子99a，連接於IGBT之射極的射極端子99b。另外，如圖14(b)，(c)所示，對於半導體晶片1下面係形成有連接於IGBT之集極之集極端子144。閘極端子99a及射極端子99b係在半導體製造處理(前工程)形成於半導體晶圓上面，集極端子 144係在半導體製造處理形成於半導體晶圓下面。
接著，如圖14(d)所示，於半導體晶片1之集極端子144表面，形成具有奈米等級之彈簧形狀之多數的奈米構造體9所成之奈米構造層7。奈米構造層7之形成方法係與在前述實施形態1之圖3(c)所說明之方法相同，在略真空的環境下，將半導體晶片1對於垂直於集極端子144的軸旋轉同時，從對於此軸而言斜方向，使銅原子33蒸鍍。
接著，在停止半導體晶片1之旋轉後，如圖14(e)所示，經由從奈米構造層7的上方蒸鍍鎳原子34之時，於奈米構造層7之上部形成板層6。經由至此之工程，於半導體晶片1之表面形成集極端子144與奈米構造層7與板層6所成之變形吸收層2b。
接著，如圖15(a)所示，使半導體晶片1之表背面反轉，將形成有閘極端子99a及射極端子99b的面朝上之後，如圖15(b)所示，在半導體晶片1之上面之中，於除了射極端子99a的表面與閘極端子99b之表面的範圍形成由絕緣材料所成之光罩151。
此時，將光罩151的厚度作為與閘極端子99a及射極端子99b的厚度相同為佳。光罩151之厚度與閘極端子99a及射極端子99b之厚度不同之情況，因在接下的工程蒸鍍從斜方向構成奈米構造體之原子時，所蒸鍍之原子的位置精確度則下降之故。
接著，如圖15(c)所示，在略真空的環境下，將半 導體晶片1對於垂直於板層8的軸而言進行旋轉之同時，經由從對於此軸而言斜方向蒸鍍銅原子33之時，於閘極端子99a表面及射極端子99b表面形成由具有奈米等級之彈簧形狀之多數之奈米構造體9所成之奈米構造層7。此時，奈米構造體9係未形成於由絕緣材料所成之光罩151的表面。
接著，在停止半導體晶片1之旋轉後，如圖15(d)所示，經由從奈米構造層7的上方蒸鍍鎳原子34之時，於奈米構造層7之上部形成板層6。此時，板層6係未形成於未有奈米構造體9之光罩151的表面。
接著，如圖15(e)所示，經由除去半導體晶片1上面之光罩151之時，形成閘極端子99a與奈米構造層7與板層6所成之變形吸收層2a，及射極端子99b與奈米構造層7與板層6所成之變形吸收層2c。
接著，如圖16(a)所示，層積各構件，經由升溫至接合層3之熔點以上之時，如圖16(b)所示，實施形態2或實施形態3之半導體裝置則完成。此時，為了防止接合前之各構件的位置偏移，與前述實施形態1之製造方法同樣，使用接合用治具(未圖示)而固定各構件為佳。
(實施形態4)
圖17(a)係本發明之實施形態4的半導體裝置之平面圖，圖17(b)係同圖(a)之C-C線剖面圖。
本實施形態之半導體裝置係與前述實施形態2，3之 半導體裝置相同，使用形成有IGBT之半導體晶片1，但與實施形態2，3之不同點係例如藉由配置如陶瓷之絕緣材料所成之複數的奈米構造體為平面狀之奈米構造層171，連接電路圖案92a，92b，92c與基底構件95的點。
如根據本實施形態之安裝構造，未使用在實施形態2，3所使用之陶瓷基板91，金屬圖案93及接合材94，而可確保基底構件95與電路圖案92a，92b，92c的絕緣者。
另外，因陶瓷製之奈米構造層171吸收基底91與電路圖案92a，92b，92c之熱變形差之故，可提供信賴性高的半導體裝置。
(實施形態5)
如圖18所示，在前述實施形態1所使用之奈米構造層7係具有將具有彈簧形狀之奈米構造體9配置成平面狀之構造，各奈米構造體9之直徑係上端部，中央部，下端部同時為同一。
對此，在本實施形態所使用之奈米構造體9係如圖19所示，中央部之直徑則較上下兩端部之直徑為小者為特徵。具有如此形狀之奈米構造體9係在實施形態1之圖3(c)所示之奈米構造層7之製造工程中，可經由在途中改變半導體晶片1之旋轉數而製造者。
如使用圖6所說明地，當於具有彈簧形狀之奈米構造體9，剪切方向之強制位移產生作用時，較奈米構造體9 之中央部，在上下兩端部產生有更大的應力。隨之，經由使用圖19所示之本實施形態之奈米構造體9之時，在直徑小之奈米構造體9的中央部，彈簧的剛性則下降，在此位置所吸收的變位則增加之故，可降低在奈米構造體9之上下兩端部產生之最大應力者。
經由與實施形態1~4組合而使用本實施形態之奈米構造體9之時，可提供信賴性更提升之半導體裝置。
(實施形態6)
在前述實施形態1~5所使用之奈米構造層7係對於具有將具有彈簧形狀之奈米構造體9配置成平面狀之構造而言，本實施形態之奈米構造層7係如圖20所示，具有將柱狀之奈米構造體9配置成平面狀之構造。具有如此形狀之奈米構造體9係在實施形態1之圖3(c)所示之奈米構造層7之製造工程中，可呈由加大半導體晶片1之旋轉速度，彈簧沿著上下方向連結者而製造。
本實施形態之奈米構造體9係比較於具有彈簧形狀之實施形態1~5之奈米構造體9，變形吸收機能為低。但因比較於具有彈簧形狀之奈米構造體9而熱容量為大之故，高度方向之熱傳導性則提升。
另外，比較於實施形態1~5之奈米構造層7而可加大奈米構造體9之體積占有率之故，可更降低奈米構造層7之熱阻抗或電性阻抗。隨之，本實施形態之奈米構造體9係使用於更要求熱阻抗降低之製品者而為有效。
(實施形態7)
如圖21所示，本實施形態之奈米構造層7之特徵係各奈米構造體9則對於板層6與板層8之對向面而言具有傾斜者。具有如此形狀之奈米構造體9的奈米構造層7係可以如以下的方法而製造者。
首先，如圖22(a)所示，準備於上面形成有板層8之半導體晶片1，接著，如圖22(b)所示，在略真空的環境下，從對於板層8之上面而言斜方向，使銅原子33蒸鍍。此時，未使半導體晶片1旋轉而使原子33蒸鍍的點則與其他的實施形態之製造方法不同點。隨之，在本實施形態中，對於蒸鍍裝置無須具有使半導體晶片1旋轉之機能。
之後，如圖22(c)所示，經由從奈米構造層7之上方蒸鍍鎳原子34之時，於奈米構造層7之上部形成板層6。
然而，以上述方法所製造之本實施形態之奈米構造層7係於板層8之上面之一部分或板層6之下面之一部分未形成有奈米構造體9之故，比較於其他之實施形態，對於奈米構造層7之電性傳導性或熱傳導性若干下降的點必須注意。
(實施形態8)
如圖23所示，本實施形態之奈米構造層7係具有將 具有對於板層8之上面而言不同傾斜之鋸齒形狀之奈米構造體9配置成平面狀之構造。具有如此形狀之奈米構造體9的奈米構造層7係可以如以下的方法而製造者。
首先，如圖24(a)所示，準備於上面形成有板層8之半導體晶片1，接著，如圖24(b)所示，在略真空的環境下，從對於板層8之上面而言斜方向，使銅原子33蒸鍍。此時，與前述實施形態7同樣，未使半導體晶片1旋轉而使原子33蒸鍍。
接著，如圖24(c)所示，使半導體晶片1旋轉180°，以與上述同樣的步驟，從斜方向使銅原子33蒸鍍。之後，如圖24(c)所示，經由從奈米構造層7之上方蒸鍍鎳原子34之時，於奈米構造層7之上部形成板層6。
然而，在此係雖僅旋轉1次半導體晶片1，但經由僅必要次數圖24(b)所示的作業與圖24(c)所示的作業之時，可控制奈米構造體9之鋸齒形狀。
如根據本實施形態之製造方法，在蒸鍍構成奈米構造體9之原子33時，無須時常旋轉半導體晶片1。另外，亦可消解未形成有奈米構造體9於板層8之上面的一部分或板層6之下面的一部分之實施形態7之問題點。更且，比較於實施形態1~5之奈米構造層7而可加大奈米構造體9之體積占有率之故，可更降低奈米構造層7之熱阻抗或電性阻抗。
(實施形態9)
如圖25所示，本實施形態之半導體裝置之特徵係藉由中間板層251而層積複數之奈米構造層7者為特徵。對於圖25係顯示層積有2層之奈米構造層7的例，但經由交互反覆奈米構造層7之形成與中間板層25之形成之時，可層積3層以上之奈米構造層7者。另外，奈米構造體9係未限定於具有彈簧形狀之構成，而亦可為如實施形態6~8之奈米構造體9。
對於n段層積本實施形態之奈米構造層7之情況，各奈米構造層7所吸收的變形則降低為1/n之故，而成為可吸收更大的變形。另一方面，奈米構造層7全體之熱阻抗或電性阻抗係成為n倍之故，選定因應所要求之變形吸收能力，熱阻抗，電性阻抗而層積之奈米構造層7的數量為佳。
(實施形態10)
如圖26所示，本實施形態之半導體裝置係具有於作為電路基板之封裝基板263的表面覆晶連接半導體晶片1之構造，電性連接封裝基板263與半導體晶片1之各複數之覆晶連接部係具備奈米構造層7。奈米構造層7係配置導電材料所成之複數構造體成平面狀之構成。
對於半導體晶片1之表面(在圖中係為下面)，係設置有複數之晶片側金屬銲點261。另外，在封裝基板263之上面中，對於與晶片側金屬銲點261對向的範圍係設置有複數之基板側金屬銲點262。並且，對於晶片側金屬銲 點261與基板側金屬銲點262之間，係設置有奈米構造層7，板層6及接合層3。更且，對於複數之覆晶連接部之間隙係充填有封閉覆晶連接部之下填充材樹脂264。奈米構造層7係例如將具備彈簧形狀之複數之奈米構造體9緊密地配置成平面狀之構成。
如根據本實施形態，經由於各複數之覆晶連接部具備奈米構造層7之時，因可經由奈米構造層7而吸收半導體晶片1與封裝基板263之熱變形差之故，可提供信賴性高的覆晶型半導體裝置者。
另外，如根據本實施形態，因無須使封閉覆晶連接部之下填充材樹脂264具有熱變形吸收機能之故，下填充材樹脂264之材料選擇的範圍為廣。即，作為下填充材樹脂264之材料，因可選定例如封閉時之充填性或耐衝擊性高之材料等之故，可提供更高信賴性之覆晶型半導體裝置者。更且，經由使奈米構造層7具有熱變形吸收機能之時，亦可作為對於覆晶連接部之間隙未充填下填充材樹脂264之選擇。
以上，將經由本發明者所成之發明，依據實施形態已具體做過說明，但本發明並不限定於前述實施形態，在不脫離其內容之範圍當然可做各種變更。
〔產業上之可利用性〕
本發明係可適用於具備電路基板，和安裝於此電路基板之半導體晶片的半導體裝置之熱應力的降低以及散熱性 的提升。
1‧‧‧半導體晶片
2a，2b，2c‧‧‧變形吸收層
3a，3b‧‧‧接合層
4，5‧‧‧導電構件
6，8‧‧‧板層
7‧‧‧奈米構造層
9‧‧‧奈米構造體
11‧‧‧彈簧
33‧‧‧銅原子
34‧‧‧鎳原子
41a，41b‧‧‧接合用治具
91‧‧‧陶瓷基板
92a，92b，92c‧‧‧電路圖案
96‧‧‧射極端子接合構件
97‧‧‧閘極端子接合構件
98a‧‧‧接合材
99a‧‧‧閘極端子
99b‧‧‧射極端子
圖1(a)係本發明之實施形態1的半導體裝置之剖面圖，(b)係顯示同圖(a)之一部分的擴大剖面圖。
圖2(a)係本發明之比較例的半導體裝置之剖面圖，(b)係顯示同圖(a)之一部分的擴大剖面圖。
圖3(a)~(e)係顯示本發明之實施形態1的半導體裝置之製造方法的全體圖及端部擴大圖。
圖4(a)，(b)係顯示持續於圖3之半導體裝置之製造方法的剖面圖。
圖5(a)，(b)，(c)係說明實施形態1之半導體裝置之效果的圖。
圖6(a)，(b)係說明發生於實施形態1之奈米構造體之變形與應力的圖。
圖7係顯示從應力解析所得到之奈米構造體之剪切位移量與最大應力之關係的圖表。
圖8係顯示在從圖7的結果求得之高度10μm的奈米構造體之剪切位移量與最大應力之關係的圖表。
圖9(a)係本發明之實施形態2的半導體裝置之平面圖，(b)係顯示同圖(a)之A-A線剖面圖，(c)係擴大同圖(b)之一部分的剖面圖。
圖10(a)係本發明之實施形態3的半導體裝置之平面圖，(b)係同圖(a)之B-B線剖面圖。
圖11(a)，(b)，(c)係說明實施形態2，3之半導體裝置之效果的圖。
圖12係顯示以熱傳導解析計算半導體晶片反覆發熱與停止時之溫度變化之結果的圖表。
圖13係顯示比較例之半導體裝置與實施形態2，3之半導體裝置之溫度變化量的圖表。
圖14(a)，(b)係顯示本發明之實施形態2，3之半導體裝置之製造方法之平面圖，(c)，(d)，(e)係顯示本發明之實施形態2，3之半導體裝置之製造方法的全體圖及端部擴大圖。
圖15(a)~(e)係顯示持續於圖14之半導體裝置之製造方法的全體圖及端部擴大圖。
圖16(a)，(b)係顯示持續於圖15之半導體裝置之製造方法的剖面圖。
圖17(a)係本發明之實施形態4的半導體裝置之平面圖，(b)係同圖(a)之C-C線剖面圖。
圖18係在本發明之實施形態1所使用之奈米構造層之剖面圖。
圖19係在本發明之實施形態5所使用之奈米構造層之剖面圖。
圖20係在本發明之實施形態6所使用之奈米構造層之剖面圖。
圖21係在本發明之實施形態7所使用之奈米構造層之剖面圖。
圖22(a)，(b)，(c)係顯示在本發明之實施形態7所使用的奈米構造層之製造方法的全體圖及端部擴大圖。
圖23係在本發明之實施形態8所使用之奈米構造層之剖面圖。
圖24(a)~(d)係顯示在本發明之實施形態8所使用的奈米構造層之製造方法的全體圖及端部擴大圖。
圖25係在本發明之實施形態9所使用之奈米構造層之剖面圖。
圖26(a)係本發明之實施形態10的半導體裝置之剖面圖，(b)係顯示同圖(a)之一部分的擴大剖面圖。
1‧‧‧半導體晶片
2a，2b‧‧‧變形吸收層
3a，3b‧‧‧接合層
4，5‧‧‧導電構件
6，8‧‧‧板層
7‧‧‧奈米構造層
9‧‧‧奈米構造體

Claims (16)

  1. 一種半導體裝置，係具備電路基板，和安裝於前述電路基板之半導體晶片的半導體裝置，其特徵為對於前述半導體晶片與前述電路基板之間，係設置有配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  2. 如申請專利範圍第1項記載之半導體裝置，其中，對於前述半導體晶片與前述構造層之間，係設置有連接有各前述複數之構造體之一端的第1板層，對於前述電路基板與前述構造層之間，係設置有連接有各前述複數之構造體之另一端的第2板層者。
  3. 如申請專利範圍第1項記載之半導體裝置，其中，各前述複數之構造體係具有彈簧形狀者。
  4. 如申請專利範圍第3項記載之半導體裝置，其中，各前述複數之構造體係兩端部的外形則較中央部的外形為大者。
  5. 如申請專利範圍第1項記載之半導體裝置，其中，各前述複數之構造體係具有鋸齒形狀者。
  6. 如申請專利範圍第2項記載之半導體裝置，其中，各前述複數之構造體係前述第1板層與前述第2板層則延伸存在於對於對向的面而言斜方向者。
  7. 如申請專利範圍第2項記載之半導體裝置，其中，各前述複數之構造體係前述第1板層與前述第2板層則延伸存在於對於對向的面而言垂直方向者。
  8. 如申請專利範圍第2項記載之半導體裝置，其中，藉由配置於前述第1板層與前述第2板層之間的1或複數之中間板層而多段層積前述構造層者。
  9. 一種半導體裝置，係具備電路基板，和安裝於前述電路基板之半導體晶片的半導體裝置，其特徵為前述半導體晶片係其主面與相反側的背面則在與前述電路基板的上面對向之狀態，安裝於前述電路基板之上面，對於前述半導體晶片之前述主面，係形成有電性連接於形成於前述半導體晶片之元件的1或複數之端子，對於前述端子係電性連接有導電性之接合構件，對於前述端子與前述接合構件之間，係設置有配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  10. 如申請專利範圍第9項記載之半導體裝置，其中，對於前述半導體晶片之前述主面，係形成有至少含有閘極端子之複數的端子，電性連接於前述閘極端子之前述接合構件之高度係較 前述閘極端子的直徑或一邊的長度為大者。
  11. 如申請專利範圍第10項記載之半導體裝置，其中，電性連接於前述閘極端子之前述接合構件之高度成為最大的位置係位於前述半導體晶片之上部者。
  12. 一種半導體裝置，係具備基底構件，和安裝於前述基底構件之電路基板，和安裝於前述電路基板之半導體晶片的半導體裝置，其特徵為對於前述基底構件與前述電路基板之間，係設置有由絕緣材料所成，且配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  13. 一種半導體裝置，係具備電路基板，和安裝於前述電路基板之半導體晶片的半導體裝置，其特徵為前述半導體晶片係藉由複數之覆晶連接部而覆晶連接於前述電路基板上，對於各前述複數之覆晶連接部，係含有由導電材料所成，且配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  14. 一種半導體裝置，其特徵為具備具有主面，和與 前述主面相反側之背面的半導體晶片，對於前述半導體晶片之前述主面，係設置有配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  15. 一種半導體裝置之製造方法，係具備電路基板，和安裝於前述電路基板之半導體晶片，對於前述半導體晶片與前述電路基板之間，係設置有配置具有直徑或一邊的長度不足1μm之剖面形狀之複數的構造體成平面狀所成之構造層之半導體裝置之製造方法，其特徵為包含經由於前述半導體晶片之表面，從斜方向照射原子而使其蒸鍍之時，形成前述複數之構造體之工程，構造體係鋸齒形狀，從上所視之時，鋸齒形狀之構造體為重疊，相較於1條之構造體之寬度，鄰接之構造體之配置間隔為狹者。
  16. 如申請專利範圍第15項記載之半導體裝置之製造方法，其中，在形成前述複數之構造體時，經由將前述半導體晶片對於垂直於其表面的軸而言使其旋轉之時，將各前述複數之構造體作為彈簧形狀者。
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