TWI505361B - 處理含矽與氧層的方法 - Google Patents

處理含矽與氧層的方法 Download PDF

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TWI505361B
TWI505361B TW099133321A TW99133321A TWI505361B TW I505361 B TWI505361 B TW I505361B TW 099133321 A TW099133321 A TW 099133321A TW 99133321 A TW99133321 A TW 99133321A TW I505361 B TWI505361 B TW I505361B
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oxygen
plasma
density
layer
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Jingmei Liang
Nitin K Ingle
Shankar Venkataraman
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Applied Materials Inc
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Description

處理含矽與氧層的方法 【交互參照之相關申請案】
本案係為Jingmei Liang等人於西元2009年10月5日申請之美國臨時專利申請案號61/248,693且發明名稱為“POST-PLANARIZATION ANNEAL”的非臨時申請案,並請求其申請日為優先權,其在此以引置方式併入本文作為參考。
本發明係關於後平坦化緻密化。
自從數十年前引進了半導體元件,半導體元件幾何形態之尺寸已經顯著地減小。現代半導體製造設備常規地製造具有45nm、32nm與28nm特徵尺寸之元件,正在發展且實現新設備以製造具有甚至更小幾何形態之元件。減小的特徵尺寸致使元件上之結構特徵具有減小的空間尺寸。元件上之間隙與溝槽係窄到一程度,其中間隙之深寬比(深度對寬度的比值)變得高到足以使其更富有挑戰性以介電質材料來填充間隙。沉積之介電質材料係傾向於在間隙完全被填滿之前於頂部堵塞,而在間隙中間產生了空隙或縫隙。
數年來,已經發展許多技術來避免使介電材料堵塞間 隙的頂部,或「密封」已經形成的空隙或縫隙。典型地,一類型的方式係涉及各自的沉積及回蝕製程。這造成了沉積-蝕刻-沉積順序,其可能對沉積和蝕刻均賦予更嚴格的製程規格。另一種方式係以高可流動的前驅物材料來開始,高可流動前驅物材料是在液相中應用到旋轉的基材表面(例如SOG沉積技術)。這些可流動的前驅物可流動到非常小的基材間隙內且將其填滿,而不會形成空隙或弱的縫隙。然而,一旦這些高可流動的材料被沉積了,其需要被固化且被硬化成固體介電質材料。
存在有藉由改變沉積製程與(或)後續處理來製造具有較小應力之替代性間隙填充膜的需求。亦存在有使這些製程順序可製造在窄且寬溝槽中具有類似性質之膜的需求。本發明滿足了這種和其他需求。
本發明係描述用以在一圖案化基材上形成高密度間隙填充氧化矽之製程。此製程增加間隙填充氧化矽(尤其是窄溝槽中)之密度。亦可增加寬溝槽與凹陷開放區域中之密度。在容許蝕刻速率更密切地匹配的處理後,窄與寬溝槽/開放區域中之間隙填充氧化矽之密度變得更類似。此效應也可被描述成圖案負載效應的減少。此製程涉及了形成且接著平坦化氧化矽。平坦化係暴露了更靠近窄溝槽之新介電質界面。新暴露之界面可藉由退火與 (或)暴露經平坦化之表面於電漿來促進緻密化。
本發明之實施例包括一種處理一圖案化基材上之一含矽與氧層的方法,該圖案化基材具有一窄溝槽與一凹陷開放區域。該方法包括形成一含矽與氧層於該圖案化基材上,包括在該窄溝槽中與在該凹陷開放區域中。該方法包括平坦化該含矽與氧層,而留下一窄間隙填充部分於該窄溝槽中與一寬間隙填充部分於該凹陷開放區域中。平坦化該含矽與氧層之步驟係包括移除該窄溝槽上方之該含矽與氧層之一部分及暴露一後平坦化介電質界面,其中該後平坦化介電質界面係比一相應之預平坦化介電質界面更靠近該窄溝槽。該方法更包括在該平坦化操作後,處理該基材,以增加該窄間隙填充部分之密度。在處理期間,更靠近該窄溝槽之該後平坦化介電質界面係容許該窄間隙填充部分變得比該基材在該平坦化操作前被處理更緻密。
額外之實施例與特徵係部分地揭示在以下說明中,且其部分地對於熟習此技藝之人士在參閱說明書時變得明顯或可藉由實施所揭示之實施例而瞭解。所揭示之實施例之特徵與優點可藉由描述在說明書中之裝置、組合和方法來瞭解和獲得。
描述用以在一圖案化基材上形成高密度間隙填充氧化 矽之方法。製程係增加間隙填充氧化矽的密度,尤其是在窄溝槽中。在寬溝槽與凹陷的開放區域中,密度也增加了。在處理之後,窄與寬溝槽/開放區域中之間隙填充氧化矽的密度變得更類似,其容許蝕刻速率更密切地匹配。此效果亦可被描述成圖案負載效應之減少。接著,此製程涉及了形成平坦化之氧化矽。平坦化暴露了新的介電質界面,其更靠近窄溝槽。新暴露的界面可促進藉由退火與(或)暴露平坦化表面到電漿之緻密化處理。
溝槽內之介電質可具有不同於開放區域(或寬溝槽)內之介電質的性質。這可能導因自,相較於寬溝槽,窄溝槽內之更受限的幾何形態。在平坦化步驟(例如平坦化蝕刻或化學機械研磨)後,對周遭氛圍的額外暴露係提供了處理膜堆疊之能力,藉此增加間隙填充材料之密度且使得窄溝槽內與寬溝槽(或凹陷開放區域)內之材料的性質更類似。受益自熱處理之介電質膜係包括相當不緻密之膜,諸如以PECVD、APCVD、FCVD、SOG等來沉積的氧化矽。方法可對在沉積期間(例如在FCVD與SOG期間)為可流動之膜提供特別的應用。窄溝槽內與外之性質的差異可藉由比較包含例如氟化氫之濕蝕刻中之濕蝕刻速率來評估。在說明書中,氧化矽將被用來意謂著含矽與氧層且包括諸如碳氧化矽與氮氧化矽之膜的代表稱法。
不欲限制申請專利範圍的範疇到假設的製程機構,在平坦化後加熱膜堆疊係被認為是將介電質內之網路再建 構,造成了濕緩衝氧化蝕刻(buttered oxide etch;BOE)速率的減小,特別是在溝槽中。已經發現在高溫下退火介電質膜可將一膜從伸張的轉變成壓縮的應力。從介電質移除諸如氫之材料是另一可行的機構,並且可發生在和再建構相同的時間點。吾等發現窄溝槽內之區域係比寬溝槽和開放區域內之區域受益更多。氧化矽是介電質的一實例,其係受益自後CMP退火。受限之幾何形態(諸如窄溝槽)內之氧化矽的密度係在後CMP退火期間增加,其會使濕蝕刻速率(wet etch rate;WER)減小。基材之實體彎曲度,整體而言,亦可藉由形成膜期間及後續處理期間壓縮層的存在而減輕。
已經發現暴露經平坦化之介電質表面到電漿可提供和將間隙填充介電質予以緻密化類似的優點。經平坦化之表面在電漿激發氛圍中的離子轟擊似乎可增加間隙填充介電質的密度。在一些情況中,增加氧到由電漿激發之氛圍係有助於藉由供應氧(其被併入到氧化矽中)而更增加密度。氧可被併入到存在於相當多孔之間隙填充介電質中的空隙內,與(或)取代較不緻密的構成物(其亦可能更弱地黏接到間隙填充介電質中之材料)。添加氫以及氧亦可因濕氣含量的增加而有助於增加間隙填充介電質的密度。
可在描述一些示範性方法的過程中提供額外的細節。第1圖為一流程圖,其顯示根據本發明實施例之製造氧化矽膜之方法100中經選擇的步驟。方法100包括將具 有窄間隙或溝槽與凹陷開放區域之圖案化基材傳送到反應腔室內102。在不同的實施例中,凹陷開放區域可以是寬度大於50nm、100nm、200nm、500nm或1000nm之寬溝槽。在不同的實施例中,窄溝槽可具有小於100nm、70nm、50nm、35nm、25nm或20nm的寬度。窄溝槽可具有高度和寬度,其定義高度對寬度(即H/W)之深寬比(aspect ratio;AR),其中深寬比係顯著地大於1:1(例如5:1或更大、6:1或更大、7:1或更大、8:1或更大、9:1或更大、10:1或更大、11:1或更大、12:1或更大等)。填充窄溝槽與凹陷開放區域係開始於同時地提供一不含碳之矽前驅物與一自由基氮前驅物到基材處理區域104。
不含碳之矽前驅物可以是,除了其他類型之矽前驅物以外,例如一矽與氮之前驅物、一矽與氫之前驅物、或一含矽氮與氫之前驅物。這些前驅物之特定實例可包括矽烷胺,諸如H2 N(SiH3 )、HN(SiH3 )2 與N(SiH3 )3 等。這些矽烷胺可和額外的氣體混合,該些額外的氣體係作為載氣、反應性氣體、或兩者。額外的氣體的實例可包括H2 、N2 、NH3 、N2 H4 、He與Ar等。不含碳之矽前驅物的實例亦可包括矽烷(SiH4 ),獨立地或和其他含矽氣體(例如N(SiH3 )3 )、含氫氣體(例如H2 )、與(或)含氮氣體(例如N2 、NH3 、N2 H4 )混合。不含碳之矽前驅物亦可包括二矽烷、三矽烷、更高級數之矽烷、與氯化矽烷,獨立地或彼此組合或和前述不含碳之矽前驅物組合。矽前驅物 除了不含碳外,可以不含氧。缺少氧會造成從前驅物所形成之矽與氮層中更低之矽醇(Si-OH)基團的更低濃度。沉積膜中過量的矽醇份額會造成增加的孔隙度以及在後沉積步驟期間(其從沉積層移除羥基(-OH)份額)的收縮。
自由基氮前驅物是一含氮自由基之物種,其在反應腔室外從更穩定的氮前驅物來產生。舉例而言,穩定的氮前驅物(諸如NH3 )可在反應腔室外之電漿單元中被活化以形成自由基氮前驅物,其接著被傳送到反應腔室內。在不同的實施例中,穩定的氮前驅物亦可以是包含NH3 &N2 、NH3 &H2 、NH3 &N2 &H2 、與N2 &H2 之混合物。聯胺(N2 H4 )可用來取代NH3 或來添加到NH3 ,並且可如上所列和N2 與(或)H2 組合。所產生的自由基氮前驅物包含電漿流出物(其包括.N、.NH、.NH2 之一或多者),並且亦可由形成在電漿中的離子化物種來伴隨。
自由基前驅物可以是自由基氮前驅物,若其包括併同上述前驅物來供應到遠端電漿區域的氮。大致上而言,不包括氮之自由基前驅物亦將容許一含矽與氮層來形成。自由基前驅物係被產生在反應腔室的和沉積區域(其中前驅物係混合且反應以在一沉積基材(例如半導體晶圓)上沉積矽與氮層))分隔的一區塊中。在自由基前驅物是一自由基氮前驅物的實施例中,一穩定之氮前驅物流動到遠端電漿區域內且被電漿激發。穩定之氮前驅物(與自由基氮前驅物)亦可由諸如氫(H2 )、氮(N2 )、氬、氦等 來伴隨。吾等亦已經發現,在所揭示之實施例中,從實質上由氮(N2 )構成之輸入氣體(具有或不具有額外的惰性載氣)形成的自由基氮前驅物可產生有利的膜。在含矽前驅物提供了期望之膜中需要的氮的實施例中,自由基氮前驅物亦可由一自由基前驅物所取代,其中該自由基前驅物是從實質上由氫(H2 )構成之輸入氣體(與選擇性地惰性載氣)所形成。流動到電漿內而待激發的前驅物可在此稱為電漿前驅物,並且流出電漿的自由基前驅物可稱為電漿流出物。
在反應腔室中,不含碳之矽前驅物與自由基氮前驅物係混合且反應,以在沉積基材上沉積一含矽與氮之膜106。在實施例中,經沉積之含矽與氮之膜能夠以一些程式組合來共形地沉積。在其他實施例中,經沉積之含矽與氮之膜具有不同於傳統氮化矽(Si3 N4 )膜沉積技術之可流動特徵。形成之可流動本質係容許膜流動到基材之沉積表面上之窄間隙、溝槽與其他結構內。在實施例中,可流動膜係填充具有高深寬比之溝槽,而不會在填充材料中心的周圍建立空隙或若縫隙。可流動膜不太可能會預成熟地堵塞窄間隙或溝槽之頂部。
可流動性是由於各種性質,該些性質係起因於自由基氮前驅物和不含碳之矽前驅物的混合。這些性質可包括經沉積之膜中顯著的氫成分與(或)短鏈聚矽氮烷聚合物。在形成了膜的期間與之後,這些短鏈成長且構成網路以形成更緻密之介電質材料。舉例而言,經沉積之膜 可具有矽氮烷類型之Si-NH-Si骨幹(即Si-N-H膜)。當矽前驅物與自由基氮前驅物不含碳時,經沉積之含矽與氮之膜亦為實質上不含碳的。當然,「不含碳」不必然意謂著膜缺乏甚至少量的碳。碳污染物可存在於前驅物材料中,其找到其進入經沉積之含矽與氮膜的途徑。然而,這些碳雜質的量是比在具有碳份額之矽前驅物(例如TEOS、TMDSO等)中所發現的少多了。
在沉積了含矽與氮層後,沉積基材可經歷一在含氧氛圍中的處理108。在所揭示之實施例中,基材先在含臭氧之氛圍中被固化。沉積基材可保持在基材處理區域中以為了固化,或者基材可被傳送到引進有含臭氧氛圍之不同腔室。在不同實施例中,基材之固化溫度可小於或約400℃、小於或約300℃、小於或約250℃、小於或約200℃、或小於或約150℃。在不同實施例中,基材之溫度可大於或約室溫、大於或約50℃、大於或約100℃、大於或約150℃、或大於或約200℃。根據額外所揭示之實施例,任何上限可和任何下限結合以形成基材溫度之額外的範圍。在實施例中,在固化期間,沒有電漿或實質上沒有電漿被施加到基材處理區域,以避免產生原子氧(其會關閉近表面網路且阻撓表面氧化)。在固化步驟期間,臭氧流動到基材處理區域之流速可大於或約200sccm、大於或約300sccm、或大於或約500sccm,其通常是由更大流量之相當更穩定之分子氧來伴隨。在固化步驟期間,臭氧之分壓可大於或約10Torr、大於或約20 Torr、或大於或約40Torr。在一些條件下(例如約100℃至約200℃之基材溫度之間),已經發現轉換可實質上完全,因此在實施例中,在含氧環境中之相當高溫退火可能是不需要的。在一些實施例中,平坦化可發生在剛描述之臭氧處理之後。
在其他實施例中,對含氧氛圍的暴露係持續成更高溫度處理的形式。在含矽與氮層的固化之後,沉積基材可被退火於一含氧氛圍中110。當引進含氧氛圍時,沉積基材可保持在和用於固化相同的基材處理區域中;或者基材可被傳送到引進有含氧氛圍之不同腔室。含氧氛圍可包括一或多個含氧氣體,諸如分子氧(O2 )、臭氧(O3 )、水蒸氣(H2 O)、過氧化氫(H2 O2 )、與氧化氮(NO、NO2 等),除了其他含氧氣體以外。含氧氛圍亦可包括自由基氧與羥基物種,諸如原子氧(O)、氫氧化物(OH)等,其可遠端地被產生且被傳送到基材腔室內。含氧物種之離子亦可存在。在不同實施例中,基材之氧退火溫度可小於或約1100℃、小於或約1000℃、小於或約900℃、或小於或約800℃。在不同實施例中,在氧退火期間,基材之溫度可大於或約500℃、大於或約600℃、大於或約700℃、或大於或約800℃。根據額外所揭示之實施例,任何上限可和任何下限結合以形成基材溫度之額外的範圍。在不同實施例中,在惰性退火期間,基材之溫度可大於或約800℃、大於或約900℃、大於或約1000℃、或大於或約1100℃。
接著,圖案化基材被傳送到一化學機械研磨(CMP)工具。圖案化基材上之氧化矽被研磨,以平坦化氧化矽層110。平坦化製程(諸如CMP)係典型地移除比凹陷材料延伸更遠離基材的材料,其可在可選擇之橫向長度尺度造成更大的平坦性。典型地,橫向長度尺度係顯著地小於基材之「長度」或直徑。其他技術可被用來平坦化表面,包括蝕刻製程(其係經調控以優先地移除延伸在凹陷區域上方的氧化矽)。在實施例中,從延伸與凹陷區域中移除材料。在使用CMP之平坦化後,形成了一後平坦化介電質表面,其比研磨前界面更靠近圖案化基材。
後平坦化介電質界面係容許(特別是)窄溝槽內之材料被處理以增加超過平坦化之前所可能的密度。基材可被固化且被退火112,如同平坦化之前所述者(包括涉及操作108之討論之所有製程參數範圍與氛圍)。後平坦化介電質界面致使上述相同實施例可進一步增加在凹陷區域中(但特別是是在窄溝槽內)之材料的密度。氧之存在和後平坦化介電質界面對窄溝槽的更靠近鄰近性的組合可容許膜中剩餘之未反應氮進一步被氧所取代。換言之,在平坦化之前僅是太遠離界面的區域中,氧暴露可將含矽與氮層轉換成含矽與氧層。CMP之後可行的額外緻密化係顯示,溝槽內之SiO2 網路可由上覆之介電質層來維持。一旦已經移除了上覆層,溝槽內之SiO2 可在後CMP退火期間自由地再建構。受限之溝槽幾何形態可能有助於在預CMP退火期間限制網路再建構,而CMP之後的 更新暴露係容許顯著的額外網路再建構發生。含氧氛圍可包括上述之含氧化合物與自由基。在實施例中,含氧氛圍可更包括氫,以增加濕氣、促進網路再建構、且增加凹陷區域內的密度。
由於引進了後平坦化退火,可變更平坦化步驟之前的退火。不將膜予以緻密化以準備用於下游處理,預CMP退火僅需要膜緻密化以使其能忍受CMP步驟。這可減少或去除處理之高溫部分的需要。在實施例中,膜需要在含臭氧環境中之低溫固化。在其他實施例中,膜需要在含臭氧環境中之低溫固化以及在含氧環境中之低溫退火。除了分層(delamination)與研磨均勻性考量,應選擇預CMP退火來容許可忍受的缺陷程度。包括後平坦化退火可潛在地用來減少、減輕、控制或避免在處理期間可流動膜之膜破裂,這是因為預CMP退火可具有比後CMP退火更低的熱負載。後CMP退火可具有高溫,但膜之厚度是減小的(其可降低在退火期間膜破裂的機會)。
在一些實施例中,圖案化基材包含包含一窄溝槽與一凹陷開放區域,其如前所述各被填充以氧化矽。由於各種效應,窄溝槽內之氧化矽之密度會小於凹陷開放區域內之氧化矽之密度。這可藉由當各材料暴露於氫氟酸系蝕刻溶液(6:1緩衝氧化物蝕刻溶液)時測量濕蝕刻速率來決定。一特定的測試結構係用來證實根據所揭示實施例之方法在溝槽內膜品質的優點。此結構具有60-120nm寬度溝槽與開放區域。
第2A-2B圖為根據所揭示實施例之一經蝕刻之間隙填充氧化矽膜與一經蝕刻之間隙填充氧化矽膜的剖視圖。第2A圖顯示一支撐基材200,支撐基材200在溝槽壁202之間具有多個溝槽。整個晶圓被沉積以一可流動之含矽與氮之膜,其接著被固化且被退火於蒸氣中200℃-400℃和N2 中800℃-1100℃。然後,使用CMP將晶圓予以平坦化到圖案化基材上之溝槽的頂部。存在有一氮化物終止層以有助於將研磨終止在期望的位置處。後平坦化介電質界面之位置係以虛線201來表示。在6:1 BOE中濕蝕刻長達10秒後,窄溝槽204-1與凹陷開放區域205-1中剩餘之氧化矽係以實線來表示。所移除之材料量可稱為濕凹陷(wet recess)且正比於濕蝕刻速率(wet etch rate;WER)。濕凹陷在不同區域中可能不同,例如凹陷可能隨著溝槽之寬度而改變。窄間隙填充部分204-1之蝕刻速率大於寬間隙填充部分205-1之蝕刻速率,造成了較低的後蝕刻介電質界面。濕凹陷在65nm溝槽寬度之窄溝槽中為約90nm,並且在開放區域中為約36nm。
另一種在後CMP退火(在惰性環境中)後之濕蝕刻速率比較係顯示在第2B圖中。由於窄間隙填充部分204-2中增加的密度,窄間隙填充部分204-2與寬間隙填充部分205-2之高度現在是類似的。在第2B圖之剖視圖中,不同區域中的濕凹陷係實質上匹配。濕凹陷在窄溝槽中減少到34nm且在開放區域中減少到30nm。窄間隙填充部分204-2與寬間隙填充部分205-2之密度在後CMP退 火期間增加,但是窄間隙填充部分中的密度增加得更顯著。這容許窄間隙填充部分之WER變得更類似於寬間隙填充部分之WER。在將基材予以處理以增加密度之後,寬間隙填充部分之蝕刻速率為窄間隙填充部分之蝕刻速率的20%、15%、10%、7%、5%、或3%的一者。
在此揭示之方法是使用一示範性含矽與氮之膜(其接著被處理以變成氧化矽膜)來描述。應注意,該些方法可用在氧化矽以及其他使用各種方法(包括SACVD)來沉積之介電質間隙填充膜(例如SiON、SiOC)、HARP/eHARP膜(亦稱為TEOS-臭氧氧化矽/TEOS-臭氧-H2 O氧化矽)、旋塗式玻璃(SOG)、電漿增強CVD(PECVD)氧化矽、可流動CVD(FCVD)氧化矽、次大氣壓CVD(SACVD)氧化矽。膜可以是未摻雜之矽酸鹽玻璃(USG)或可經摻雜(例如BPSG)。增加溝槽與凹陷開放區域中之密度可涉及將間隙填充材料再流動或密封在共形沉積期間可能形成的縫隙。
熱處理(諸如固化與退火)不是增加溝槽與凹陷開放區域內間隙填充氧化矽之密度的唯一方式。激發在含有圖案化基材之基材處理區域中的電漿可作為上述熱步驟(固化與/或退火)的替代方式或添加到上述熱步驟(固化與/或退火)。亦已經發現這樣的電漿可增加間隙填充氧化矽之密度。可同時地與(或)依序地執行電漿與熱處理。可在和在此所揭示其他製程不同之電漿腔室中或相同之腔室中執行電漿處理。第3圖為一流程圖,其顯示 根據本發明實施例之處理氧化矽膜之方法300中經選擇的步驟。方法300包括平坦化一間隙填充氧化矽層302,如同第1圖之操作110。接著,圖案化基材在一含氧電漿(其是從含氧前驅物來形成,示範性含氧前驅物係列示在和第1圖之操作108(及112)有關的討論中)中被處理304。典型地,含氧前驅物可由諸如貴族氣體(Ne、Ar等)之惰性氣體來伴隨。已經發現,在平坦化步驟之後,實質上不含有任何含氧前驅物之電漿激發惰性氣體可增加間隙填充氧化矽之密度。亦已經發現,具有含氧前驅物與含氫前驅物兩者之電漿激發惰性氣體係可能由於濕氣的增加而有幫助的。已經發現,所有這些電漿系製程可增加窄溝槽與凹陷開放區域內之密度且產生更類似的密度。第3圖之示範性製程持續,即氧化矽間隙填充層被退火306,以更緻密化且均等化該間隙填充層。當依序地施加電漿製程與熱製程時,電漿製程可在熱製程之前或之後執行。
在電漿緻密化製程期間,在含有基材之基材處理區域中建立一電漿。惰性與反應性前驅物(選擇性地)流動到基材處理區域內,並且電漿功率(例如RF或微波)被施加到該區域以激發氣體。可以各種方式來施加電漿功率,包括電容式地和感應式地。在一些實施例中,RF功率可被施加成一混合頻率,其典型地供應功率於13.56MHz之高RF頻率(RF1)與360KHz之低RF頻率(RF2),以增強引進到基材處理區域內之反應性物種的分解。所使用 之特定頻率可根據發生處而改變,並且主要由溝通界面考量來決定。
在所揭示之實施例中,基材之溫度可大於約100℃、約150℃、約200℃、約250℃、或約300℃。在所揭示之實施例中,基材之溫度可小於約600℃、約500℃、或約400℃。根據額外所揭示之實施例,基材溫度之任何上限可和任何下限結合以形成額外的範圍。在所揭示之實施例中,基材處理區域中之壓力可大於約0.5Torr、1Torr、2Torr、或4Torr。在所揭示之實施例中,基材處理區域中之壓力可小於約20Torr、約15Torr、約10Torr、約8Torr、或約6Torr。可藉由壓力之任何下限和任何上限結合以形成額外所揭示之實施例。在所揭示之實施例中,當使用~13.56MHz來激發電漿,RF功率可為約25W至約400W、約50W至約350W、約100W至約300W、或約150W至約250W。在所揭示之實施例中,RF功率之任何上限可和任何下限結合以形成功率之額外的範圍。
示範性基材處理系統
沉積系統之實施例可被併入到更大之製造系統以製造積體電路晶片。第4圖顯示根據所揭示實施例之沉積、烘烤與固化腔室的一這樣系統400。在此圖中,一對前開式整合艙(FOUPs)402供應基材(例如300mm直徑晶圓),該些基材由機械手臂404接收且在被放置到基材處理腔室408a-f之一者前被放置到一低壓固持區域406 內。一第二機械手臂410可用來從固持區域406傳送基材晶圓到處理腔室408a-f且返回。
處理腔室408a-f可包括用以沉積、退火、固化與(或)蝕刻基材晶圓上之可流動介電質膜的一或多個系統部件。在一組態中,兩對處理腔室(例如408c-d與408e-f)可用以沉積可流動介電質材料在基材上,並且第三對處理腔室(例如408a-b)可用以退火經沉積之介電質。在另一組態中,此相同之兩對處理腔室(例如408c-d與408e-f)可設以沉積且退火基材上之可流動介電質膜,而第三對處理腔室(例如408a-b)可用於經沉積之膜的UV或電子束固化。在又另一組態中,所有三對處理腔室(例如408a-f)可設以沉積、固化可流動介電質膜在基材上。在再另一組態中,兩對處理腔室(例如408c-d與408e-f)可均用於可流動介電質之沉積以及UV或電子束固化,而第三對處理腔室(例如408a-b)可用以退火介電質膜。可瞭解,用於可流動介電質膜之沉積、退火與固化腔室的額外組態可由系統400設想出。
此外,處理腔室408a-f之一或多者可設置成一濕處理腔室。這些處理腔室包括在包括濕氣之氛圍中加熱可流動介電質膜。因此,系統400之實施例可包括濕處理腔室408a-b與退火處理腔室408c-d,以對經沉積之介電質膜執行濕與乾退火。
第5A圖為根據所揭示實施例之一基材處理腔室500。一遠端電漿系統(remote plasma system;RPS)510可處理 一氣體,該氣體接著行經一氣體入口組件511。氣體入口組件511內可看見兩個分離的氣體供應通道。第一通道512係承載通過RPS 510之氣體,而第二通道513係繞過RPS 510。在所揭示之實施例中,第一通道512可用於一製程氣體,並且第二通道513可用於一處理氣體。蓋(或導電頂部)521與穿孔分隔物553係顯示在其之間具有一絕緣環524,絕緣環524容許AC電位相對於穿孔分隔物553被施加到蓋521。製程氣體行經第一通道512到腔室電漿區域520內,並且可獨立地由腔室電漿區域520中之電漿或和RPS 510之組合來激發。腔室電漿區域520與(或)RPS 510之組合在此可稱為一遠端電漿系統。穿孔分隔物(亦稱為噴頭)553係將腔室電漿區域520與噴頭553下方之基材處理區域570分離。噴頭553容許電漿存在於腔室電漿區域520中以避免直接地激發基材處理區域570中的氣體,同時仍容許經激發之物種可從腔室電漿區域520行進到基材處理區域570內。
噴頭553位在腔室電漿區域520與基材處理區域570之間,並且容許腔室電漿區域520中建立的電漿流出物(前驅物或其他氣體之激發衍生物)通過複數個橫跨板厚度之穿孔556。噴頭553亦具有一或多個中空容室551,該些中空容室551可被填充以蒸氣或氣體形式的前驅物(諸如含矽前驅物)且其通過小孔555到基材處理區域570內但不直接到腔室電漿區域520內。在此揭示之實施例中,噴頭553比穿孔556之最小直徑之長度更厚。為了 維持激發物種從腔室電漿區域520穿過到基材處理區域570之顯著集中,穿孔之最小直徑550之長度526可藉由形成穿孔556通過噴頭553之較大直徑部分來限制。在所揭示之實施例中,穿孔556之最小直徑550之長度可和穿孔556之最小直徑具有相同大小等級或更小。
在所顯示之實施例中,一旦藉由腔室電漿區域520中之電漿所激發,噴頭553可散佈(經由穿孔556)含有氧、氫與(或)氮之製程氣體與(或)這樣製程氣體之電漿流出物。在實施例中,經由第一通道512引進到RPS 510與(或)腔室電漿區域520之製程氣體可含有氧(O2 )、臭氧(O3 )、N2 O、NO、NO2 、NH3 、Nx Hy (包括N2 H4 )、矽烷、二矽烷、TSA、與DSA之一或多者。製程氣體亦可包括一載氣,諸如氦、氬、氮(N2 )等。第二通道513亦可輸送一製程氣體與(或)一載氣、與(或)一用以從生長或所沉積之膜移除不希望之成分的膜固化氣體。電漿流出物可包括製程氣體之離子化或中性衍生物,並且在此亦可稱為一自由基氧前驅物與(或)一自由基氮前驅物(其參照所引進之製程氣體的原子構成物)。
在實施例中,穿孔556之數量可為約60個至約2000個。穿孔556可具有各種形狀,但為最容易製造的圓形。在所揭示之實施例中,穿孔556之最小直徑550可為約0.5mm至約20mm或約1mm至約6mm。亦存在有選擇穿孔之截面形狀的自由,其可以是圓錐形、圓柱形、或此兩形狀之組合。在不同實施例中,用以將氣體引進 到基材處理區域570內之小孔555之數量可為約100個至約5000個或約500個至約2000個。小孔555之直徑可為約0.1mm至約2mm。
第5B圖為根據所揭示實施例和處理腔室併同使用之噴頭553的仰視圖。噴頭553係和第5A圖顯示的噴頭相應。穿孔556係被繪示成在噴頭553之底部具有一較大內徑(ID)且在頂部具有一較小內徑(ID)。小孔555係實質上均勻地散佈在噴頭表面,甚至在該些穿孔556之間,其有助於提供比在此所描述之其他實施例更均勻的混合。
當通過噴頭553之穿孔556而抵達之電漿流出物和通過小孔555(其源自中空容室551)而抵達之含矽前驅物結合時,一示範性膜被建立在基材處理區域570中由基座(未示出)所支撐之基材上。儘管基材處理區域570可設以支援用於其他製程(諸如固化)之電漿,該示範性膜之生長期間不存在有電漿。
可在噴頭553上方之腔室電漿區域520中或噴頭553下方之基材處理區域570中引發一電漿。典型地,在沉積期間,射頻(RF)範圍中之AC電壓係被施加在處理腔室之導電頂部521與噴頭553之間,以在腔室電漿區域520中引發一電漿。當基材處理區域570中之底電漿被啟動以固化一膜或清潔基材處理區域570之內表面時,頂電漿被被保持在低或沒有功率。基材處理區域570中之電漿是藉由施加AC電壓於噴頭553與腔室之基座或 底部來引發。當電漿存在時,可將一清潔氣體引進到基材處理區域570內。
自由基氮前驅物係被產生在遠端電漿區域中且行進到基材處理區域內,含矽前驅物是在基材處理區域內由自由基氮前驅物來激發。在實施例中,含矽前驅物僅藉由自由基氮前驅物來激發。在實施例中,電漿功率可實質上僅被施加到遠端電漿區域,以確保自由基氮前驅物可提供主要的激發予含矽前驅物。
在利用腔室電漿區域之實施例中,經激發之電漿流出物係被產生在基材處理區域之一區塊中,其中基材處理區域之該區塊係和前驅物混合且反應以在沉積基材(例如半導體晶圓)上沉積矽與氮層之沉積區域分離。經激發之電漿流出物亦由未經激發之惰性氣體(在此示範性例子中為氬)來伴隨。基材處理區域在此可被描述成例如在生長含矽與氮層的期間為「不含電漿」。「不含電漿」不必然意謂著此區域缺乏電漿。電漿區域內所產生之離子化物種與自由電子確實行進通過分隔物(噴頭)之孔隙(穿孔),但不含碳之含矽前驅物係沒有實質上被施加到電漿區域之電漿功率所激發。腔室電漿區域中之電漿的邊界是難以界定,並且可經由噴頭中之穿孔侵入到基材處理區域。在感應式耦合電漿之例子中,可在基材處理區域內直接地發生少量的離子化。又,可在基材處理區域中建立一低密度電漿,而不去除所形成膜之期望特徵。在建立經激發之電漿流出物的期間,電漿具有比腔室電漿 區域(或遠端電漿區域)遠低得多之強度離子密度的所有原因係不脫離在此所使用之「不含電漿」的範疇。
在熱緻密化製程中,基材可被加熱於一惰性氛圍中。熱可由基座供應,其中該基座可含有電阻式加熱構件以升高基材溫度。在電漿緻密化製程期間,一RF功率供應器540係施加電氣功率於噴頭553與第5A圖繪示之部件下方的基座之間。電漿功率係激發製程氣體混合物,以在噴頭553與由基座所支撐之基材間的約略圓柱形區域內形成一電漿。噴頭553具有一導電表面,或表面可以是絕緣的且被覆蓋以一金屬插件。無論位置為何,噴頭553之金屬部分係經由介電質插件和CVD腔室500之其餘部分電氣隔離,其容許噴頭553之電壓可相對於基材基座與蓋520而改變。蓋521與支撐基座亦電氣隔離,因此可在基材處理區域570中建立一電漿,而不會在腔室電漿區域520中建立一電漿。
基材處理系統由一系統控制器來控制。在一示範性實施例中,系統控制器包括一硬碟機、一軟碟機與一處理器。處理器含有單板電腦(single-board computer;SBC)、類比與數位輸入/輸出板、界面板、與步進馬達控制器板。CVD系統之各部件係符合Versa Modular European(VME)標準,其定義了板、卡籠(card cage)、與連接器尺寸和類型。VME標準也將匯流排結構定義成16位元資料匯流排與24位元位址匯流排。
系統控制器係控制CVD機台之所有活動。系統控制器 執行系統控制軟體,其中該系統控制軟體是儲存在一電腦可讀媒體中的電腦程式。較佳地,媒體是硬碟機,但媒體亦可以是其他類型的記憶體。電腦程式包括指令組,其可命令特定製程之時間點、氣體混合、腔室壓力、腔室溫度、RF功率位準、載座位置、與其他參數。儲存在其他記憶體裝置(包括例如軟碟或其他適當的裝置)上之其他電腦程式亦可用以指示系統控制器。
可使用由系統控制器執行之電腦程式產品來實現一種用以在基材上沉積一膜堆疊之製程或一種用以清潔一腔室之製程。電腦程式碼能夠以任何傳統之電腦可讀程式化語言來撰寫:例如,68000組合語言、C、C++、Pascal、Fortran、或其他者。適當的程式碼係使用傳統的文字編輯器被轉成單一檔案或多個檔案,並且被儲存或內嵌在一電腦可用媒體(諸如電腦之記憶體系統)中。若轉換之碼文字是屬於高階語言,碼被編譯,並且最終的編譯器碼接著連結到預編譯之微軟資料庫常規之目的碼。為了執行連結之編譯之目的碼,系統使用者係援引目的碼,使電腦系統將記憶體中之碼載入。然後,CPU讀取且執行該碼,以實施程式中所指定的任務。
使用者與控制器之間的界面是經由一平面面板碰觸敏感性螢幕。在使用兩個螢幕之較佳實施例中,一螢幕是裝設在清潔室壁中以供操作者使用,而另一螢幕是裝設在壁後面以供維護技師使用。此兩螢幕可同時地顯示相同的資訊,在任一情況中僅一螢幕會在一時間點接收輸 入。為了選擇特定之顯示幕或功能,操作者係碰觸該碰觸敏感性螢幕之一指定區域。經碰觸的區域會改變其凸顯顏色,或一新選單或顯示幕會被顯示,確認了操作者與碰觸敏感性螢幕之間的溝通。可使用其他裝置(諸如鍵盤、滑鼠、或其他指向或溝通裝置)來取代或添加到該碰觸敏感性螢幕,以容許使用者和系統控制器溝通。
在此使用之「基材」可以是一具有或不具有層形成在其上的支撐基材。支撐基材可以是一絕緣體或一具有各種摻雜濃度和輪廓之半導體,並且可以是例如用來製造積體電路之類型的半導體基材。「氧化矽」與「含矽與氧層」係在此交替地使用,並且可包括顯著濃度之其他元素構成物(諸如氮、氫、碳、及諸如此類者)。在此使用之處於「激發狀態」之氣體係描述一氣體,其中至少一些氣體分子是處於震動地激發、解離與(或)離子化狀態。一氣體可以是兩種或更多種氣體的組合。術語溝槽是在說明書中用來不意指經蝕刻之幾何形態必然具有大的水平深寬比。從表面上方觀之,溝槽可以是圓形、橢圓形、多邊形、矩形、或各種其他形狀。術語「前驅物」係用以指參與反應以從表面移除或沉積材料之任何製程氣體。術語「惰性氣體」係指當被併入到膜中時不會形成化學鍵之任何氣體。示範性惰性氣體包括貴族氣體,但可包括其他氣體,只要當(通常)少量被捕獲到膜中時不會形成化學鍵。如在此所使用者,一共形層係指在一表面上大致上均勻的材料層且其具有和該表面相同的形 狀,即該層的表面和被覆蓋的表面係大致上平行。此技術領域中具有通常知識者可瞭解,經沉積之材料不可能是100%共形的,並且因此術語「大致上」係容許可接受的容忍度。
在此已經藉由測量濕蝕刻速率(wet etch rate;WER)與計算濕蝕刻速率比例(wet etch rate ratio;WERR)來評估密度。這些測量是藉由在氫氟酸系溶液中執行給定時間蝕刻與計算每秒奈米之蝕刻速率來實現。典型地,WERR是藉由比較介電質樣品之蝕刻速率與熱氧化矽在相同溶液中之蝕刻速率來建立。一般之緩衝氧化物蝕刻溶液包括6:1體積比例之水中40% NH4 F對水中49%HF。此溶液將在25℃以每秒約2奈米來熱蝕刻所生長之氧化矽。典型地,形成氧化矽之其他方法將造成具有更快速濕蝕刻速率之氧化矽膜。更快速濕蝕刻速率係大致上意指候選氧化矽膜具有比熱生長之氧化矽更低的密度。在一些例子中,濕蝕刻速率比值將用來比較兩種非熱氧化矽膜(或同一膜之不同部分),並且文中將予以區分。
已經描述了一些實施例,熟習此技藝之人士可瞭解的是,在不脫離本發明之精神下,可使用各種潤飾、替代性結構與均等物。此外,沒有描述許多已知的製程與構件,以為了避免不必要地模糊化本發明。因此,上述說明不應被視為會限制本發明之範疇。
當提供數值之範圍時,應瞭解,亦特定地揭示了該範圍之上限與下限間的各中間數值(達下限單位的十分之 一,除非文中清楚地指明)。介於任何所載明數值或所載明範圍內之中間數值與任何其他所載明數值或在該所載明數值內之中間數值之間的各更小範圍係被涵蓋。這些更小範圍之上限與下限可獨立地被包括在該範圍內或被排除該範圍外,並且包括有任一限制、沒有包括限制、或兩者之各範圍亦被涵蓋在本發明中。所載明範圍包括限制之一者或兩者時,排除該些所包括之限制的任一者或兩者的範圍亦被包括。
如在此所使用者且如隨附申請專利範圍中所示,單數形式「一」、「一個」與「該」係包括複數個參照物,除非文中清楚地指明。因此,例如,「一製程」係包括複數個這樣的製程,並且「該前驅物」係包括熟習此技藝之人士所熟知之一或多個前驅物及其均等物,及諸如此類者。
此外,在說明書中和隨附申請專利範圍中使用之術語「包含」與「包括」係意圖指明所記載特徵、整數、部件或步驟的存在,但其不會排除一或多個其他特徵、整數、部件、步驟、動作或群組的存在或添加。
100‧‧‧方法
102-112‧‧‧處理步驟
200‧‧‧支撐基材
201‧‧‧虛線
202‧‧‧溝槽壁
204‧‧‧窄間隙填充部分
205‧‧‧寬間隙填充部分
300‧‧‧方法
302-306‧‧‧處理步驟
400‧‧‧處理系統
402‧‧‧FOUP
404‧‧‧機械手臂
406‧‧‧低壓固持區域
408‧‧‧處理腔室
410‧‧‧第二機械手臂
500‧‧‧基材處理腔室
510‧‧‧遠端電漿系統
511‧‧‧氣體入口組件
512‧‧‧第一通道
513‧‧‧第二通道
520‧‧‧腔室電漿區域
521‧‧‧蓋
524‧‧‧絕緣環
550‧‧‧穿孔之最小直徑
551‧‧‧中空容室
553‧‧‧穿孔分隔物
555‧‧‧小孔
556‧‧‧穿孔
570‧‧‧基材處理區域
可藉由參照說明書和圖式之剩餘部分來進一步瞭解本發明之本質和優點,其中圖式裡使用類似的元件代表符號來指稱類似的元件。在一些情況中,一次標係關連到 一元件代表符號且跟隨在一連字號後,以表示多個類似元件之一者。當參照一元件代表符號而沒有指定一次標時,吾等係欲意指所有這樣的多個類似元件。
第1圖為一流程圖,其繪示根據所揭示實施例之處理一含矽膜之經選擇的步驟。
第2圖為根據所揭示實施例之一經蝕刻之氧化矽膜與一所製備之經蝕刻之氧化矽膜的剖視圖。
第3圖為另一流程圖,其繪示根據所揭示實施例之處理一氧化矽間隙填充膜之經選擇的步驟。
第4圖顯示根據所揭示實施例之基材處理系統。
第5A圖顯示根據所揭示實施例之基材處理系統。
第5B圖顯示根據所揭示實施例之基材處理系統之噴頭。
100...方法
102-112...處理步驟

Claims (16)

  1. 一種處理一圖案化基材上之一含矽與氧層的方法,該圖案化基材具有一窄溝槽與一凹陷開放區域,該方法包含下列步驟:藉由化學氣相沉積形成一不含碳之含矽與氮層於該圖案化基材上,包括在該窄溝槽中與在該凹陷開放區域中,並且將該不含碳之含矽與氮層轉換成該含矽與氧層;平坦化該含矽與氧層,而留下一窄間隙填充部分於該窄溝槽中與一寬間隙填充部分於該凹陷開放區域中,其中平坦化該含矽與氧層之步驟係包含移除該窄溝槽上方之該含矽與氧層之一部分及暴露一後平坦化介電質界面,其中該後平坦化介電質界面係比一相應之預平坦化介電質界面更靠近該窄溝槽;及在該平坦化操作後,處理該基材,以增加該窄間隙填充部分之密度,其中更靠近該窄溝槽之該後平坦化介電質界面係容許該窄間隙填充部分變得比該基材在該平坦化操作前被處理更緻密。
  2. 如申請專利範圍第1項所述之方法,其中形成該含矽與氧層之步驟包含下列步驟:使一電漿前驅物流動到一遠端電漿區域中,以形成電漿流出物; 使該些電漿流出物在一基材處理區域中與一含矽前驅物之流動結合,其中該含矽前驅物之流動尚未由一電漿所激發;及在一含臭氧氛圍中固化該含矽與氮層,以將該層轉換成一含矽與氧層。
  3. 如申請專利範圍第1項所述之方法,其中該開放區域是一寬溝槽,其具有大於50nm的寬度。
  4. 如申請專利範圍第1項所述之方法,其中該窄溝槽具有小於100nm的寬度。
  5. 如申請專利範圍第1項所述之方法,其中在處理該基材以增加密度後,該寬間隙填充部分之蝕刻速率位在該窄間隙填充部分之蝕刻速率的20%內。
  6. 如申請專利範圍第1項所述之方法,其中處理該基材以增加密度之操作係包含下列步驟:在含有一惰性氣體之氛圍中,暴露該基材於一電漿。
  7. 如申請專利範圍第6項所述之方法,其中該氛圍更包含氧。
  8. 如申請專利範圍第7項所述之方法,其中該氛圍更包含氫。
  9. 如申請專利範圍第1項所述之方法,其中處理該基材以增加密度之操作係包含下列步驟:退火該基材於高於400℃,以增加該窄間隙填充部分之密度。
  10. 如申請專利範圍第1項所述之方法,其中平坦化該含矽與氧層之操作係包含下列步驟:化學機械地研磨該基材。
  11. 如申請專利範圍第1項所述之方法,其中平坦化該含矽與氧層之操作係包含下列步驟:在該基材上執行一平坦化蝕刻。
  12. 如申請專利範圍第1項所述之方法,其中處理該基材以增加密度之操作亦造成該寬間隙填充部分之密度的增加。
  13. 如申請專利範圍第1項所述之方法,其中處理該基材以增加密度之操作係包含下列步驟:依序地暴露該基材於一電漿且接著退火該基材。
  14. 如申請專利範圍第1項所述之方法,其中處理該基材以增加密度之操作係包含下列步驟:依序地退火該基材且接著暴露該基材於一電漿。
  15. 如申請專利範圍第1項所述之方法,更包含下列步驟:在平坦化該含矽與氧層前,在一含氧氛圍中,於大於500℃的基材溫度下,退火該含矽與氧層。
  16. 如申請專利範圍第1項所述之方法,其中在處理該含矽與氧層之操作後,該含矽與氧層係實質上由矽與氧構成。
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