CN107799421B - 半导体器件的形成方法 - Google Patents

半导体器件的形成方法 Download PDF

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CN107799421B
CN107799421B CN201610803018.4A CN201610803018A CN107799421B CN 107799421 B CN107799421 B CN 107799421B CN 201610803018 A CN201610803018 A CN 201610803018A CN 107799421 B CN107799421 B CN 107799421B
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well region
well
forming
semiconductor substrate
isolation film
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CN107799421A (zh
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周飞
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Priority to CN201610803018.4A priority Critical patent/CN107799421B/zh
Priority to US15/685,820 priority patent/US10586713B2/en
Priority to EP17188710.2A priority patent/EP3291291B1/en
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Abstract

一种半导体器件的形成方法，包括：提供半导体衬底，所述半导体衬底表面具有鳍部；在所述半导体衬底上形成覆盖鳍部的隔离流体层；对所述隔离流体层进行第一退火，使隔离流体层形成隔离膜；进行第一退火后，在鳍部和半导体衬底中形成第一阱区和第二阱区，第二阱区位于第一阱区两侧且与第一阱区邻接，第一阱区中具有第一阱离子，第二阱区中具有第二阱离子，第二阱离子的导电类型与第一阱离子的导电类型相反。所述半导体器件的形成方法能够提高半导体器件的电学性能。

Description

半导体器件的形成方法
技术领域
本发明涉及半导体制造领域，尤其涉及一种半导体器件的形成方法。
背景技术
MOS(金属-氧化物-半导体)晶体管，是现代集成电路中最重要的元件之一，MOS晶体管的基本结构包括：半导体衬底；位于半导体衬底表面的栅极结构，所述栅极结构包括：位于半导体衬底表面的栅介质层以及位于栅介质层表面的栅电极层；位于栅极结构两侧半导体衬底中的源漏掺杂区。
随着半导体技术的发展，传统的平面式的MOS晶体管对沟道电流的控制能力变弱，造成严重的漏电流。鳍式场效应晶体管(Fin FET)是一种新兴的多栅器件，它一般包括凸出于半导体衬底表面的鳍部，覆盖部分所述鳍部的顶部表面和侧壁的栅极结构，位于栅极结构两侧的鳍部中的源漏掺杂区。
然而，现有技术中鳍式场效应晶体管形成的半导体器件的电学性能有待提高。
发明内容
本发明解决的问题是提供一种半导体器件的形成方法，以提高半导体器件的电学性能。
为解决上述问题，本发明提供一种半导体器件的形成方法，包括：提供半导体衬底，所述半导体衬底表面具有鳍部；在所述半导体衬底上形成覆盖鳍部的隔离流体层；对所述隔离流体层进行第一退火，使隔离流体层形成隔离膜；进行第一退火后，在鳍部和半导体衬底中形成第一阱区和第二阱区，第二阱区位于第一阱区两侧且与第一阱区邻接，第一阱区中具有第一阱离子，第二阱区中具有第二阱离子，第二阱离子的导电类型与第一阱离子的导电类型相反。
可选的，所述第一退火的参数包括：采用的气体包括氧气、臭氧和气态水，退火温度为350摄氏度～750摄氏度，退火时间为25分钟～35分钟。
可选的，在形成第一阱区和第二阱区之前，还包括：对所述隔离膜进行致密化退火。
可选的，所述致密化退火的参数包括：采用的气体包括N2，退火温度为850摄氏度～1050摄氏度，退火时间为30分钟～120分钟。
可选的，形成第一阱区和第二阱区之前，还包括：平坦化所述隔离膜直至暴露出鳍部的顶部表面。
可选的，还包括：回刻蚀所述隔离膜，使隔离膜的表面低于鳍部的顶部表面。
可选的，所述半导体衬底包括第一区和第二区；所述鳍部分别位于第一区和第二区的半导体衬底上；所述半导体器件的形成方法还包括：在平坦化所述隔离膜后，去除第二区的鳍部和隔离膜，形成开口；在所述开口中形成附加隔离膜；形成所述附加隔离膜后，在第一区的鳍部和半导体衬底中形成第一阱区和第二阱区。
可选的，还包括：回刻蚀所述隔离膜和附加隔离膜，使隔离膜和附加隔离膜的表面低于鳍部的顶部表面。
可选的，形成第一阱区后，形成第二阱区；或者：形成第二阱区后，形成第一阱区。
可选的，形成第一阱区的步骤包括：在所述隔离膜和鳍部上形成图形化的第一掩膜层；以所述第一掩膜层为掩膜，采用第一离子注入工艺在半导体衬底和鳍部中注入第一阱离子，从而形成第一阱区。
可选的，形成第二阱区的步骤包括：在所述隔离膜和鳍部上形成图形化的第二掩膜层；以所述第二掩膜层为掩膜，采用第二离子注入工艺在半导体衬底和鳍部中注入第二阱离子，从而形成第二阱区。
可选的，形成第一阱区和第二阱区后，还包括：进行阱退火。
可选的，所述阱退火的参数包括：采用的气体包括N2，退火温度为900摄氏度～1050摄氏度，退火时间为0秒～20秒。
可选的，在进行第一退火后，且在形成第一阱区和第二阱区之前，还包括：在半导体衬底中注入第三阱离子，从而在半导体衬底中形成第三阱区，第三阱离子的导电类型与第一阱离子的导电类型相同；形成第一阱区和第二阱区后，第三阱区位于第一阱区和第二阱区的底部。
可选的，第一阱离子和第三阱离子的导电类型为P型，第二阱离子的导电类型为N型；或者：第一阱离子和第三阱离子的导电类型为N型，第二阱离子的导电类型为P型。
与现有技术相比，本发明的技术方案具有以下优点：
本发明提供的半导体器件的形成方法，由于对所述隔离流体层进行第一退火后，在鳍部和半导体衬底中形成第一阱区和第二阱区，因此使得第一退火不会作用于第一阱区和第二阱区。因此能够避免第二阱区中的第二阱离子受到第一退火的影响而向第一阱区底部发生严重的扩散。由于第二阱离子向第一阱区底部的区域发生扩散的程度较小，因此第二阱区在第一阱区底部的区域不易发生穿通。从而提高了半导体器件的电学性能。
附图说明
图1至图13为本发明一实施例中半导体器件形成过程的结构示意图。
具体实施方式
正如背景技术所述，现有技术形成的半导体器件的电学性能较差。
一种半导体器件的形成方法，包括：提供半导体衬底，所述半导体衬底表面具有鳍部；在所述半导体衬底和鳍部中形成N型阱和位于N型阱两侧且与N型阱邻接的P型阱；采用流体化学气相沉积工艺在所述半导体衬底上形成覆盖鳍部的隔离膜，所述流体化学气相沉积工艺包括水汽退火。所述隔离膜用于形成隔离结构。
具体的，形成隔离膜采用的流体化学气相沉积工艺包括：在半导体衬底上形成覆盖鳍部的隔离流体层；对所述隔离流体层进行水汽退火，使隔离流体层形成隔离膜。所述水汽退火用于氧化所述隔离流体层，并使得隔离流体层从流体状转变为固态状，从而形成隔离膜。
然而，上述方法形成的半导体器件的电学性能较差，经研究发现，原因在于：
由于先形成P型阱和N型阱，后进行水汽退火，因此在水汽退火的过程中，水汽退火会作用于P型阱。由于水汽退火的温度较高且退火时间较长，因此P型阱在水汽退火的扩散较为严重。由于在P型阱底部的半导体衬底之间的区域没有N型阱，因此导致P型阱底部容易发生穿通。为了减小P型阱底部发生穿通的几率，通常会增加N型阱中N型离子的浓度，使得N型阱扩散的纵向深度大于P型阱扩散的纵向深度。但是若增加N型阱中N型离子的浓度，当后续在N型阱中形成对应的源漏区后，N型阱中的源漏区和源漏区周围的N型阱之间的结电容较大，导致漏电流较大。
在此基础上，本发明提供一种半导体器件的形成方法，包括：提供半导体衬底，所述半导体衬底表面具有鳍部；在所述半导体衬底上形成覆盖鳍部的隔离流体层；对所述隔离流体层进行第一退火，使隔离流体层形成隔离膜；进行第一退火后，在鳍部和半导体衬底中形成第一阱区和第二阱区，第二阱区位于第一阱区两侧且与第一阱区邻接，第一阱区中具有第一阱离子，第二阱区中具有第二阱离子，第二阱离子的导电类型与第一阱离子的导电类型相反。
由于对所述隔离流体层进行第一退火后，在鳍部和半导体衬底中形成第一阱区和第二阱区，因此使得第一退火不会作用于第一阱区和第二阱区。因此能够避免第二阱区中的第二阱离子受到第一退火的影响而向第一阱区底部发生严重的扩散。由于第二阱离子向第一阱区底部的区域发生扩散的程度较小，因此第二阱区在第一阱区底部的区域不易发生穿通。从而提高了半导体器件的电学性能。
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。
图1至图13为本发明一实施例中半导体器件形成过程的结构示意图。
参考图1，提供半导体衬底100，所述半导体衬底100表面具有鳍部110。
所述半导体衬底100为后续形成半导体器件提供工艺平台。
所述半导体衬底100的材料可以是单晶硅、多晶硅或非晶硅。半导体衬底100的材料也可以是硅、锗、锗化硅、砷化镓等半导体材料。本实施例中，所述半导体衬底100的材料为单晶硅。
本实施例中，鳍部110通过刻蚀半导体衬底100而形成。具体的，在所述半导体衬底100上形成掩膜层120，所述掩膜层120定义出鳍部110的位置；以所述掩膜层120为掩膜，刻蚀部分半导体衬底100，从而形成鳍部110。
所述掩膜层120的材料为氮化硅或者氮氧化硅。
需要说明的是，形成鳍部110后，保留位于鳍部110顶部表面的掩膜层120。在其它实施例中，形成鳍部后，去除掩膜层。
需要说明的是，在其它实施例中，也可以是：在所述半导体衬底上形成鳍部材料层(未图示)；图形化所述鳍部材料层，从而形成鳍部。
本实施例中，所述鳍部110的材料为单晶硅。在其它实施例中，所述鳍部的材料为单晶锗或单晶锗化硅。
本实施例中，所述半导体衬底100包括第一区和第二区，所述鳍部110分别位于第一区和第二区的半导体衬底100上。
参考图2，在所述半导体衬底100上形成覆盖鳍部110的隔离流体层130。
本实施例中，由于保留了掩膜层120，故所述隔离流体层130还覆盖掩膜层120。
所述隔离流体层130中含有大量的氢元素，且隔离流体层130为流体状。
形成所述隔离流体层130的参数包括：采用的气体包括NH3和(SiH3)3N，NH3的流量为1sccm～1000sccm，(SiH3)3N的流量为3sccm～800sccm，温度为50摄氏度～100摄氏度。
参考图3，对所述隔离流体层130(参考图2)进行第一退火，使隔离流体层130形成隔离膜131。
本实施例中，所述隔离膜131的材料为氧化硅。
第一退火的参数包括：采用的气体包括氧气、臭氧和气态水，退火温度为350摄氏度～750摄氏度，退火时间为25分钟～35分钟。
在所述第一退火中，分别采用氧气、臭氧和气态水对所述隔离流体层130在350摄氏度～750摄氏度下进行处理。一方面，氧气、臭氧和气态水中的氧元素取代隔离流体层130中的部分氢元素或者全部氢元素，减少隔离流体层130中的氢元素含量；另一方面，在350摄氏度～750摄氏度下，使得隔离流体层130从流体状转变为固态状，从而形成隔离膜131。
本实施例中，还包括：对所述隔离膜131进行致密化退火。
所述致密化退火的参数包括：采用的气体包括N2，退火温度为850摄氏度～1050摄氏度，退火时间为30分钟～120分钟。
所述致密化退火处理能够将隔离膜131的内部组织结构致密化。另外，若所述隔离膜131中还残留氢元素，所述致密化退火处理能够进一步去除隔离膜131中的氢元素。
接着，参考图4，平坦化隔离膜131直至暴露出掩膜层120的顶部表面。
若没有保留掩膜层120时，平坦化所述隔离膜131直至暴露出鳍部110的顶部表面。
所述平坦化工艺包括化学机械研磨工艺。
参考图5，平坦化隔离膜131后，刻蚀隔离膜131，使隔离膜131的表面与掩膜层120的底部表面齐平。
平坦化隔离膜131后，刻蚀隔离膜131，使隔离膜131的表面与掩膜层120的底部表面齐平，一方面，使得掩膜层120的顶部表面和侧壁均暴露出来，后续能够更容易的去除掩膜层120，避免残留掩膜层120，另一方面，后续去除掩膜层120后，避免在隔离膜131中形成凹坑。
在其它实施例中，平坦化隔离膜后，可以不进行刻蚀隔离膜以使隔离膜的表面与掩膜层的底部表面齐平的步骤。
接着，去除第二区的鳍部110和隔离膜131，形成开口。
具体的，参考图6，图6为在图5基础上形成的示意图，形成图形化的光刻胶层140，所述图形化的光刻胶层140覆盖第一区的掩膜层120和第一区的隔离膜131，且所述图形化的光刻胶层140暴露出第二区的掩膜层120和第二区的隔离膜131；参考图7，以所述图形化的光刻胶层140为掩膜，刻蚀去除第二区的鳍部110、第二区的隔离膜131和第二区的掩膜层120，形成开口150；参考图8，形成开口150后，去除图形化的光刻胶层140(参考图7)。
当没有形成掩膜层时，形成图形化的光刻胶层，所述图形化的光刻胶层覆盖第一区的鳍部和第一区的隔离膜，且所述图形化的光刻胶层暴露出第二区的鳍部和第二区的隔离膜；以所述图形化的光刻胶层为掩膜，刻蚀去除第二区的鳍部和第二区的隔离膜，形成开口；形成开口后，去除图形化的光刻胶层。
所述开口暴露出半导体衬底100的表面。
去除部分鳍部110，使得分别位于开口150两侧的相邻的鳍部110之间的距离大于位于开口150一侧相邻的鳍部110之间的距离，以满足电路设计的空间需要。
参考图9，在所述开口150(参考图8)中形成附加隔离膜160。
本实施例中，由于隔离膜131的表面低于掩膜层120的顶部表面，所述附加隔离膜160还覆盖隔离膜131。在其它实施例中，当隔离膜的表面与掩膜层的顶部表面齐平时，所述附加隔离膜仅位于开口中。
在其它实施例中，也可以不去除第二区的鳍部和隔离膜，相应的，也不形成附加隔离膜。
接着，结合参考图10和图11，图11为沿着图10中切割线A-A1获得的示意图，在鳍部110和半导体衬底100中形成第一阱区171和第二阱区172，第二阱区172位于第一阱区171两侧且与第一阱区171邻接，第一阱区171中具有第一阱离子，第二阱区172中具有第二阱离子，第二阱离子的导电类型与第一阱离子的导电类型相反。
当第一阱离子的导电类型为P型时，第二阱离子的导电类型为N型；或者：当第一阱离子的导电类型为N型时，第二阱离子的导电类型为P型。
第一阱区171对应形成的鳍式场效应晶体管的类型和第二阱区172对应形成的鳍式场效应晶体管的类型相反。
可以先形成第一阱区171，后形成第二阱区172；也可以是：先形成第二阱区172，后形成第一阱区171。
具体的，形成第一阱区171的步骤包括：在所述隔离膜131和鳍部110上形成图形化的第一掩膜层(未图示)；以所述第一掩膜层为掩膜，采用第一离子注入工艺在半导体衬底100和鳍部110中注入第一阱离子，从而形成第一阱区171。
具体的，形成第二阱区172的步骤包括：在所述隔离膜131和鳍部110上形成图形化的第二掩膜层(未图示)；以所述第二掩膜层为掩膜，采用第二离子注入工艺在半导体衬底100和鳍部110中注入第二阱离子，从而形成第二阱区172。
形成第一阱区171和第二阱区172后，进行阱退火，以激活第一阱离子和第二阱离子。
所述阱退火的参数包括：采用的气体包括N2，退火温度为900摄氏度～1050摄氏度，退火时间为0秒～20秒。
需要说明的是，在其它实施例中，可以不进行平坦化所述隔离膜的步骤，即进行第一退火以形成隔离膜后，在鳍部和半导体衬底中形成第一阱区和第二阱区。
结合参考图12，图12为在图10基础上形成的示意图，回刻蚀所述隔离膜131和附加隔离膜160，使隔离膜131和附加隔离膜160的表面低于鳍部110的顶部表面。
回刻蚀所述隔离膜131和附加隔离膜160后，隔离膜131和附加隔离膜160的表面低于鳍部110的顶部表面，此时，隔离膜131和附加隔离膜160构成隔离结构。
参考图13，去除掩膜层120(参考图12)。
需要说明的是，当没有形成开口和附加隔离膜时，回刻蚀所述隔离膜，使隔离膜的表面低于鳍部的顶部表面。
本发明另一实施例还提供一种半导体器件的形成方法。本实施例与前一实施例的不同之处在于：在进行第一退火后，且在形成第一阱区和第二阱区之前，还包括：在半导体衬底中注入第三离子，从而在半导体衬底中形成第三阱区，第三阱离子的导电类型与第一阱离子的导电类型相同；形成第一阱区和第二阱区后，第三阱区位于第一阱区和第二阱区的底部。关于本实施例与前一实施例相同的部分，不再详述。
由于形成了第三阱区，第三阱区位于第一阱区和第二阱区的底部，且第三阱离子的导电类型与第一阱离子的导电类型相同，第三阱离子的导电类型与第二阱离子的导电类型相反，因此第三阱区能够进一步的抑制第二阱区底部的区域发生穿通。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (12)

1.一种半导体器件的形成方法，其特征在于，包括：
提供半导体衬底，所述半导体衬底包括第一区和第二区，所述半导体衬底表面具有鳍部，所述鳍部分别位于第一区和第二区的半导体衬底上；
在所述半导体衬底上形成覆盖鳍部的隔离流体层；
对所述隔离流体层进行第一退火，使隔离流体层形成隔离膜；
平坦化所述隔离膜直至暴露出鳍部的顶部表面；
在平坦化所述隔离膜后，去除第二区的鳍部和隔离膜，形成开口；
在所述开口中形成附加隔离膜；
形成所述附加隔离膜后，在第一区的鳍部和半导体衬底中以离子注入形成第一阱区和第二阱区，第二阱区位于第一阱区两侧且与第一阱区邻接，第一阱区中具有第一阱离子，第二阱区中具有第二阱离子，第二阱离子的导电类型与第一阱离子的导电类型相反。
2.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述第一退火的参数包括：采用的气体包括氧气、臭氧和气态水，退火温度为350摄氏度～750摄氏度，退火时间为25分钟～35分钟。
3.根据权利要求1所述的半导体器件的形成方法，其特征在于，在形成第一阱区和第二阱区之前，还包括：对所述隔离膜进行致密化退火。
4.根据权利要求3所述的半导体器件的形成方法，其特征在于，所述致密化退火的参数包括：采用的气体包括N2，退火温度为850摄氏度～1050摄氏度，退火时间为30分钟～120分钟。
5.根据权利要求1所述的半导体器件的形成方法，其特征在于，还包括：回刻蚀所述隔离膜和附加隔离膜，使隔离膜和附加隔离膜的表面低于鳍部的顶部表面。
6.根据权利要求1所述的半导体器件的形成方法，其特征在于，形成第一阱区后，形成第二阱区；或者：形成第二阱区后，形成第一阱区。
7.根据权利要求6所述的半导体器件的形成方法，其特征在于，形成第一阱区的步骤包括：在所述隔离膜和鳍部上形成图形化的第一掩膜层；以所述第一掩膜层为掩膜，采用第一离子注入工艺在半导体衬底和鳍部中注入第一阱离子，从而形成第一阱区。
8.根据权利要求6所述的半导体器件的形成方法，其特征在于，形成第二阱区的步骤包括：在所述隔离膜和鳍部上形成图形化的第二掩膜层；以所述第二掩膜层为掩膜，采用第二离子注入工艺在半导体衬底和鳍部中注入第二阱离子，从而形成第二阱区。
9.根据权利要求1所述的半导体器件的形成方法，其特征在于，形成第一阱区和第二阱区后，还包括：进行阱退火。
10.根据权利要求9所述的半导体器件的形成方法，其特征在于，所述阱退火的参数包括：采用的气体包括N2，退火温度为900摄氏度～1050摄氏度，退火时间为0秒～20秒。
11.根据权利要求1所述的半导体器件的形成方法，其特征在于，在进行第一退火后，且在形成第一阱区和第二阱区之前，还包括：在半导体衬底中注入第三阱离子，从而在半导体衬底中形成第三阱区，第三阱离子的导电类型与第一阱离子的导电类型相同；形成第一阱区和第二阱区后，第三阱区位于第一阱区和第二阱区的底部。
12.根据权利要求11所述的半导体器件的形成方法，其特征在于，第一阱离子和第三阱离子的导电类型为P型，第二阱离子的导电类型为N型；或者：第一阱离子和第三阱离子的导电类型为N型，第二阱离子的导电类型为P型。
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