CN106816467B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN106816467B
CN106816467B CN201510860803.9A CN201510860803A CN106816467B CN 106816467 B CN106816467 B CN 106816467B CN 201510860803 A CN201510860803 A CN 201510860803A CN 106816467 B CN106816467 B CN 106816467B
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substrate
amorphous layer
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CN106816467A (zh
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周飞
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Priority to EP16199530.3A priority patent/EP3176813A1/en
Priority to US15/365,825 priority patent/US10446648B2/en
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Abstract

本发明公开了一种半导体装置及其制造方法，涉及半导体技术领域。其中，所述方法包括：提供衬底；在所述衬底中形成非晶层；以所述非晶层为停止层对所述衬底进行第一刻蚀，以形成一个或多个第一鳍片；对所述非晶层进行沟道停止离子注入，以在所述非晶层中形成杂质区；执行退火工艺，以激活所述杂质区中的杂质，所述非晶层在退火工艺中消失；对各个第一鳍片之间的衬底进行第二刻蚀，以将所述第一鳍片形成第二鳍片；在各个第二鳍片之间形成隔离区，以至少部分填充各个第二鳍片之间的空间。本发明能够抑制沟道停止离子注入的杂质向沟道中扩散。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体技术领域，尤其涉及一种半导体装置及其制造方法。
背景技术
随着金属氧化物半导体场效应晶体管(Metal Oxide Semiconductor FieldEffect Transistor，MOSFET)关键尺寸的缩小，短沟道效应(Short Channel Effect，SCE)成为一个至关重要的问题。鳍式场效应晶体管(Fin Field Effect Transistor，FinFET)具有良好的栅控能力，能够有效地抑制短沟道效应。因此，在小尺寸的半导体元件设计中通常采用FinFET器件。
由于器件尺寸的减小，容易出现穿通效应(punch through effect)。为了抑制穿通效应，通常需要在鳍片的底部进行沟道停止离子注入(channel stop IMP)。然而对于NMOS器件来说，沟道停止离子注入的离子通常为硼离子或二氟化硼离子，在退火激活后，由于随机掺杂波动(Random Dopant Fluctuation，RDF)，通过沟道停止离子注入掺入的杂质很容易扩散到沟道中，沟道中杂质的增大会降低器件的性能，例如降低载流子的迁移率。
为了抑制注入杂质向沟道的扩散，通常会在鳍片中形成非晶层，但是本发明的发明人发现，现有的工艺是先进行浅沟槽隔离(STI)工艺，后进行沟道停止离子注入，因此STI工艺的高温退火会使得非晶层消失，这样，在进行沟道停止离子注入后，注入的杂质仍会向沟道中扩散。
发明内容
本公开的一个实施例的目的在于提出一种新颖的半导体装置的制造方法，能够抑制沟道停止离子注入的杂质向沟道中扩散。
根据本公开的一个实施例，提供了一种半导体装置的制造方法，包括：提供衬底；在所述衬底中形成非晶层；以所述非晶层为停止层对所述衬底进行第一刻蚀，以形成一个或多个第一鳍片；对所述非晶层进行沟道停止离子注入，以在所述非晶层中形成杂质区；执行退火工艺，以激活所述杂质区中的杂质，所述非晶层在退火工艺中消失；对各个第一鳍片之间的衬底进行第二刻蚀，以将所述第一鳍片形成第二鳍片；在各个第二鳍片之间形成隔离区，以至少部分填充各个第二鳍片之间的空间。
在一个实施方式中，所述在所述衬底中形成非晶层包括：在所述衬底中注入锗离子或碳离子，从而形成所述非晶层。
在一个实施方式中，所述以所述非晶层为停止层对所述衬底进行第一刻蚀包括：在所述衬底上形成图案化的硬掩模；以所述图案化的硬掩模为掩膜对所述衬底进行第一刻蚀，从而形成所述第一鳍片。
在一个实施方式中，所述在各个第二鳍片之间形成隔离区包括：沉积隔离材料以填充各个第二鳍片之间的空间并覆盖各个第二鳍片和第二鳍片上的硬掩模；对所述隔离材料进行平坦化，以使隔离材料的顶表面与所述硬掩模的顶表面基本齐平；对所述隔离材料进行回刻蚀，以至少露出各个第二鳍片的一部分；去除各个第二鳍片上的硬掩模，从而在各个第二鳍片之间形成所述隔离区。
在一个实施方式中，通过流体化学气相沉积FCVD的方式沉积隔离材料。
在一个实施方式中，通过离子注入的方式对所述非晶层进行掺杂，注入的离子包括硼离子或二氟化硼离子。
在一个实施方式中，所述衬底中形成有阱区，所述阱区与所述杂质区具有相同的导电类型；并且所述阱区的掺杂浓度小于所述杂质区的掺杂浓度。
根据本公开的另一个实施例，提供了一种半导体装置，包括：衬底；在所述衬底上的一个或多个鳍片；用于隔离各个鳍片的隔离区；其中，所述鳍片包括半导体材料区、在所述半导体材料区中的杂质区。
在一个实施方式中，所述杂质区的上表面低于所述隔离区的上表面。
在一个实施方式中，所述杂质区用于形成沟道停止层。
在一个实施方式中，所述衬底中形成有阱区，所述阱区与所述杂质区具有相同的导电类型；并且所述阱区的掺杂浓度小于所述杂质区的掺杂浓度。
通过以下参照附图对本公开的示例性实施例的详细描述，本公开的其它特征、方面及其优点将会变得清楚。
附图说明
附图构成本说明书的一部分，其描述了本公开的示例性实施例，并且连同说明书一起用于解释本发明的原理，在附图中：
图1是根据本公开一个实施例的半导体装置的制造方法的简化流程图；
图2示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图3示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图4示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图5示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图6示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图7示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图；
图8示出了根据本公开的一些实施例的半导体装置的制造方法的一个阶段的截面图。
具体实施方式
现在将参照附图来详细描述本公开的各种示例性实施例。应理解，除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不应被理解为对本发明范围的限制。
此外，应当理解，为了便于描述，附图中所示出的各个部件的尺寸并不必然按照实际的比例关系绘制，例如某些层的厚度或宽度可以相对于其他层有所夸大。
以下对示例性实施例的描述仅仅是说明性的，在任何意义上都不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术、方法和装置可能不作详细讨论，但在适用这些技术、方法和装置情况下，这些技术、方法和装置应当被视为本说明书的一部分。
应注意，相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义或说明，则在随后的附图的说明中将不需要对其进行进一步讨论。
图1为根据本公开一个实施例的半导体装置的制造方法的简化流程图。如图1所示，本实施例的半导体装置的制造方法包括：
步骤101，提供衬底，例如硅衬底等其他半导体材料的衬底。
步骤103，在衬底中形成非晶层，该非晶层的形成有利于阻止沟道停止离子注入的杂质向沟道中扩散。
步骤105，以非晶层为停止层对衬底进行第一刻蚀，以形成一个或多个第一鳍片。
步骤107，对非晶层进行沟道停止离子注入，以在非晶层中形成杂质区。例如对非晶层注入硼离子或二氟化硼离子等以形成杂质区，该杂质区可以作为沟道停止层。
步骤109，执行退火工艺，以激活杂质区中的杂质，非晶层在退火工艺中消失。该步骤中的退火工艺一方面可以激活杂质区中的杂质，杂质在扩散时不会扩散到非晶层之外的地方，即抑制沟道停止离子注入的杂质向沟道扩散；另一方面退火工艺也可以修复非晶层。杂质扩散和非晶层的修复过程同步进行，因此，非晶层可以抑制杂质的扩散。
步骤111，对各个第一鳍片之间的衬底进行第二刻蚀，以将第一鳍片形成第二鳍片。
步骤113，在各个第二鳍片之间形成隔离区，以至少部分填充各个第二鳍片之间的空间。例如，可以通过流式化学气相沉积(Flowable Chemical Vapour Deposition,FCVD)沉积隔离材料(例如电介质材料)来填充各个第二鳍片之间的空间，形成浅沟槽隔离(STI)区。
本实施例中，由于先进行沟道停止离子注入和退火工艺，再形成隔离区，在退火工艺中，杂质区中的杂质被激活，但由于非晶层的存在，使得杂质不会扩散到非晶层之外的地方，因此，与现有技术相比，不会在形成隔离区时导致沟道停止离子注入的杂质向沟道扩散，抑制了穿通效应。
需要指出的是，除非特别指出，否则本文中的术语“基本齐平”是指在半导体工艺偏差范围内的齐平。
下面结合图2-图8对本公开一些实施例的半导体装置的制造方法进行详细说明。
首先，如图2所示，提供衬底201，并在衬底201中形成非晶层202。这里，衬底201例如可以是单晶硅衬底、锗衬底、III-V族材料的半导体衬底等。优选地，可以在衬底201中注入锗离子或碳离子，从而形成非晶层202。非晶层202的存在有利于阻止之后沟道停止离子注入的杂质向沟道中扩散。另外，衬底201中可以形成有阱区(未示出)，例如P阱。
然后，如图3所示，在衬底201上形成图案化的硬掩模300，硬掩模300例如可以是氮化硅、氧化硅或氮氧化硅等。以图案化的硬掩模300为掩膜，以非晶层202为停止层对衬底201进行第一刻蚀，例如干法刻蚀，从而形成一个或多个第一鳍片301。
接下来，如图4所示，对非晶层202进行沟道停止离子注入，以在非晶层202中形成杂质区401。这里，应注意，杂质区401和非晶层202被示出为一体。杂质区401中的杂质会在非晶层中横向扩散。例如，对于NMOS器件来说，可以对非晶层注入硼离子或二氟化硼离子等以形成杂质区，该杂质区可以作为沟道停止层。在一些实施例中，杂质区与衬底中的阱区具有相同的导电类型，并且阱区的掺杂浓度小于杂质区的掺杂浓度。对于NMOS器件来说，衬底中可以形成有P阱，P阱与杂质区的导电类型均为P型，P阱的掺杂浓度小于杂质区的掺杂浓度。
然后，如图5所示，执行退火工艺，以激活杂质区401中的杂质，非晶层202在退火工艺中消失。
之后，如图6所示，对各个第一鳍片之间的衬底进行第二刻蚀，以将第一鳍片301形成第二鳍片601。这里，对各个第一鳍片301之间的衬底进行第二刻蚀也包括对杂质区401进行刻蚀，所形成的第二鳍片601中包括杂质区401。
之后，如图7所示，通过FCVD的方式沉积隔离材料701以填充各个第二鳍片601之间的空间并覆盖各个第二鳍片601和第二鳍片上的硬掩模300；然后，进行高温退火。由于杂质区401中的杂质已经被激活，因此，形成隔离区不会再次使得杂质扩散。之后，对隔离材料701进行平坦化，例如化学机械抛光(CMP)，以使隔离材料701的顶表面与硬掩模300的顶表面基本齐平。
然后，如图8所示，对隔离材料701进行回刻蚀，以至少露出各个第二鳍片601的一部分；然后，去除各个第二鳍片601上的硬掩模300，从而在各个第二鳍片601之间形成隔离区801。
如上，描述了半导体装置的制造方法，通过上述方法形成了如图8所示的半导体装置。
下面参照图8对本公开的半导体装置进行描述。如图8所示，半导体装置可以包括：
衬底201；在衬底201上的一个或多个鳍片601；以及用于隔离各个鳍片的隔离区801；
其中，鳍片601包括半导体材料区、在半导体材料区中的杂质区401。该杂质区401可以用于形成沟道停止层。并且，优选地，杂质区401的上表面低于隔离区801的上表面。在一个实施例中，衬底201中形成有阱区，阱区与杂质区401具有相同的导电类型；并且阱区的掺杂浓度小于杂质区401的掺杂浓度。
至此，已经详细描述了根据本公开实施例的半导体装置及其制造方法。为了避免遮蔽本公开的构思，没有描述本领域所公知的一些细节，本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。另外，本说明书公开所教导的各实施例可以自由组合。本领域的技术人员应该理解，可以对上面说明的实施例进行多种修改而不脱离如所附权利要求限定的本公开的精神和范围。

Claims (7)

1.一种半导体装置的制造方法，其特征在于，包括：
提供衬底；
在所述衬底中形成非晶层；
以所述非晶层为停止层对所述衬底进行第一刻蚀，以形成一个或多个第一鳍片；
对所述非晶层进行沟道停止离子注入，以在所述非晶层中形成杂质区；
执行退火工艺，以激活所述杂质区中的杂质，所述非晶层在退火工艺中消失；
对各个第一鳍片之间的衬底进行第二刻蚀，以将所述第一鳍片形成第二鳍片；
在各个第二鳍片之间形成隔离区，以至少部分填充各个第二鳍片之间的空间。
2.根据权利要求1所述的方法，其特征在于，所述在所述衬底中形成非晶层包括：
在所述衬底中注入锗离子或碳离子，从而形成所述非晶层。
3.根据权利要求1所述的方法，其特征在于，所述以所述非晶层为停止层对所述衬底进行第一刻蚀包括：
在所述衬底上形成图案化的硬掩模；
以所述图案化的硬掩模为掩膜对所述衬底进行第一刻蚀，从而形成所述第一鳍片。
4.根据权利要求3所述的方法，其特征在于，所述在各个第二鳍片之间形成隔离区包括：
沉积隔离材料以填充各个第二鳍片之间的空间并覆盖各个第二鳍片和第二鳍片上的硬掩模；
对所述隔离材料进行平坦化，以使隔离材料的顶表面与所述硬掩模的顶表面基本齐平；
对所述隔离材料进行回刻蚀，以至少露出各个第二鳍片的一部分；
去除各个第二鳍片上的硬掩模，从而在各个第二鳍片之间形成所述隔离区。
5.根据权利要求4所述的方法，其特征在于，通过流体化学气相沉积FCVD的方式沉积隔离材料。
6.根据权利要求1所述的方法，其特征在于，通过离子注入的方式对所述非晶层进行掺杂，注入的离子包括硼离子或二氟化硼离子。
7.根据权利要求1所述的方法，其特征在于，所述衬底中形成有阱区，所述阱区与所述杂质区具有相同的导电类型；并且
所述阱区的掺杂浓度小于所述杂质区的掺杂浓度。
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