TWI472006B - 半導體封裝及減少在元件間電磁干擾的方法 - Google Patents

半導體封裝及減少在元件間電磁干擾的方法 Download PDF

Info

Publication number
TWI472006B
TWI472006B TW97129612A TW97129612A TWI472006B TW I472006 B TWI472006 B TW I472006B TW 97129612 A TW97129612 A TW 97129612A TW 97129612 A TW97129612 A TW 97129612A TW I472006 B TWI472006 B TW I472006B
Authority
TW
Taiwan
Prior art keywords
substrate
module
semiconductor package
layer
shielding layer
Prior art date
Application number
TW97129612A
Other languages
English (en)
Other versions
TW200915527A (en
Inventor
Rui Huang
Yaojian Lin
Seng Guan Chow
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of TW200915527A publication Critical patent/TW200915527A/zh
Application granted granted Critical
Publication of TWI472006B publication Critical patent/TWI472006B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04073—Bonding areas specifically adapted for connectors of different types
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1052—Wire or wire-like electrical connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Description

半導體封裝及減少在元件間電磁干擾的方法
本發明概有關於半導體封裝，並且特別是有關於減少半導體元件間之電磁干擾的半導體封裝。
半導體元件出現在許多現代社會所使用的產品中。半導體可應用於像是娛樂、通訊、網路、電腦、行動電話、雙向傳呼機、膝上型電腦、個人數位助理(PDA)及音樂播放器的消費性項目。而在工業或商業市場上，半導體可現身於軍事、航天、車輛、工業控制器及辦公室設備裡。
半導體元件的製造作業牽涉到一其中具有複數個晶粒之晶圓的構成作業。各個晶粒含有數以百計或千計而執行各式電子功能的電晶體以及其他主動和被動元件。對於一給定晶圓而言，來自該晶圓的各個晶粒通常執行相同的電子功能。前端製造一般是指在該晶圓上構成該等半導體元件。所獲晶圓具有一主動側，其中含有該等電晶體及其他主動和被動元件。而後端製造則是指將該所獲晶圓切割或單劃為個別晶粒，然後封裝該晶粒以供結構支撐及/或環境隔離。
有些積體電路封裝為在一單一封裝之內含有射頻(RF)電路及基帶電路的混合體。有些像是電感器的RF元件是按極高頻率而運作，並且發射電磁能量同時可能會對該等基帶電路，以及其他RF元件的操作造成干擾。為阻斷或隔離電磁干擾(EMI)，先前技術裡的半導體封裝既已在導 接或球狀矩陣(BGA)封裝中利用遮蔽或絕緣薄膜，像是美國專利6838748、7125744及7187060案文中所述者。然而，這些先前技術設計通常僅提供部份遮蔽，而如此將會限制任何EMI隔離的有效性。
此外，隨著對於更高度電路整合之需求的成長，晶圓級封裝(WLP)以及覆晶封裝的空間效率性與電子和熱性效能令這些封裝更為普遍。然而，由於其獨特佈局及結構之故，對於混合WLP或覆晶封裝來說實用的EMI解決方案並不多。
故確存在對於含有RF及基帶電路之WLP及覆晶封裝的有效EMI解決方案之需要。
在一具體實施例裡，本發明係一晶圓級半導體封裝，其中含有一基板，以及一經施加於該基板之一第一表面的第一遮蔽層。一RF模組係藉複數個焊接凸塊而架置於該基板的一相反於該第一表面之第二表面上的一第一區域。一基帶模組係藉複數個焊接凸塊而架置於該基板之第二表面的一第二區域。一第二遮蔽層覆蓋該基板的第二表面以及該RF模組和該基帶模組。該等第一及第二遮蔽層實質上覆蓋該晶圓層級半導體封裝，藉以將該基帶模組隔離於由該RF模組所產生的電磁干擾。
在另一具體實施例裡，本發明係半導體封裝，其中含有一基板。一第一電子模組係經架置於該基板的一第一表面上。一第二電子模組係經架置於該基板的該第一表面 上。一第一遮蔽層覆蓋該基板的第一表面以及該等第一和第二電子模組。一第二遮蔽層係經施加於該基板之一相反於該第一表面的第二表面。該等第一及第二遮蔽層實質上覆蓋該半導體封裝，藉以將該第二電子模組隔離於由該第一電子模組所產生的電磁干擾。
在另一具體實施例裡，本發明係半導體封裝，其中含有一基板。一第一電子模組係經架置於該基板的一第一表面上。一第二電子模組係經架置於該基板的該第一表面上。一遮蔽層實質上覆蓋該基板以及該等第一和第二電子模組。
在另一具體實施例裡，本發明係一製作一半導體封裝的方法，其中包含如下步驟，即構成一基板；將一RF模組架置在該基板的一第一表面上；將一基帶模組架置在該基板的該第一表面上；以及構成一第一遮蔽層，此者覆蓋該基板的第一表面以及該等RF模組和基帶模組，藉以將該基帶模組隔離於由該RF模組所產生的電磁干擾。
後文中將參照圖式而按一或更多具體實施例以敘述本發明，其中類似編號代表相同或相仿構件。本發明雖係按照為達到本發明目的之最佳模式所說明，然對於熟諳本項技藝之人士而言，應即瞭解此係為以涵蓋可納入在由後載申請專利範圍，及其如後述揭文和圖式所支援的等同項，所加定義之本發明精神和範圍內的替代、修改與等同項目。
半導體元件的製造作業牽涉到構成一具有複數個晶粒之晶圓。各個晶粒含有數以百計或千計而執行一或更多電子功能的電晶體以及其他主動和被動元件。對於一給定晶圓而言，來自該晶圓的各個晶粒通常執行相同的電子功能。前端製造一般是指在該晶圓上構成該等半導體元件。所獲晶圓具有一主動側，其中含有該等電晶體及其他主動和被動元件。而後端製造則是指將該所獲晶圓切割或單劃為個別晶粒，然後封裝該晶粒以供結構支撐及/或環境隔離。
一半導體晶圓通常含有一主動前側表面，而於其上設置有許多半導體元件，以及一背側表面，此者係藉即如矽質之體型半導體材料所構成。該主動前側表面含有複數個半導體晶粒。該主動表面係以各種半導體製程所構成，包含構層化、樣式化、掺質及熱處理。在構層化製程中，半導體材料係藉由牽涉到熱性氧化、氮化、化學汽相沉積、汽化及濺鍍處理的技術以於該基板之上成長或沉積。樣式化牽涉到使用微影蝕刻以遮蔽該表面的多個區域，並且蝕除所不欲的材料以構成特定結構。掺質製程可藉由熱性擴散或離子植入作業以注入掺質材料濃縮物。該主動表面係實質上平面且均勻並具有電子互連。
一些半導體封裝含有用於基帶信號處理的基帶電路。一基帶電路之範例包含微處理器、類比至數位轉換器、數位至類比轉換器、記憶體、控制邏輯及類比放大器。其他的半導體封裝含有用於RF信號處理的射頻(RF)電路。該RF 電路可含有一RF放大器階段、調變器、解調變器及震盪器。在一具體實施例裡，該RF信號處理電路接收RF信號，並將該等信號降頻轉頻且解調變成基帶信號。該基帶信號處理執行該等基帶信號的放大、信號轉換、儲存且控制作業。
在一些像是行動電話及無線電腦網接的應用項目中，會要求RF電路及基帶電路兩者執行所有必要的電子功能。而因整合需求之故，有時會將該等RF電路及基帶電路納入在一單一混合式半導體封裝內。然而，會有必要將基帶電路隔離於RF電路，原因在於RF元件發射電磁干擾(EMI)或電磁波(EMW)，而這會不利地影響到基帶電路的操作。
一種常見的半導體封裝風格為晶圓級封裝(WLP)或是覆晶封裝。WLP及覆晶封裝常用於要求高速、高密度及更多腳針數的積體電路(IC)。該WLP牽涉到架置一晶粒之主動區域而為面朝下且向於一晶片載體基板或印刷電路板(PCB)。該主動區域可根據該晶粒的電子設計而含有許多主動及被動元件、導體層及介電層。在一晶粒裡，該等主動及被動元件係指派為RF信號處理。在另一晶粒裡，該等主動及被動元件則指派為基帶信號處理。可透過含有大量的個別導電焊接凸塊或球體之焊接凸塊結構以達成電子及機械互連。或另者，可藉由銅質凸塊或金質凸塊以進行互連。該等焊接凸塊係經構成於設置在該主動區域上的凸塊墊之上。該等凸塊墊可藉由在該晶粒之主動區域內的導體跡線而連接至該等主動電路。該等焊接凸塊可藉由重熔 焊接製程而電子連接於該載體基板上的接觸墊。覆晶半導體封裝提供一自該晶粒上的主動元件至該載體基板上的導體跡線之短電子導通路徑，藉以減少信號傳播、降低電容值並達到整體較佳電路效能。
圖1a－1d說明該WLP封裝10之初始構成作業的截面視圖。在圖1a裡，於一矽質晶圓基板12上構成有多個金屬接觸墊14。該接觸墊14是由鋁質、銅質或是鋁銅合金所製成。該接觸墊14係電連接於構成於該基板12之上的導體跡線或薄層。該基板12亦含有許多主動元件、被動元件及重佈線路。稍後將會在該金屬接觸墊上構成一焊接凸塊或接線接附。於該基板12的接觸墊側上貼附有一背磨貼帶16。
在圖1b裡，該基板12中相反於該接觸墊側的背側進行一背磨製程，藉以移除過多的體型半導體材料並且將基板降減至一所欲厚度。在一具體實施例裡，該基板12係經製作以具有一50－750微米(μm)的厚度。一金屬遮蔽層18係藉由電解鍍置或無電鍍置處理而沉積於該基板12的背側上。該遮蔽層18是由銅質、金質、鎳質、鋁質或其他擁有EMI遮蔽性質的導體材料所製成。或另者，該遮蔽層18可為一金屬箔層或膜層，而經施用黏著劑以附於該基板12的背側。該遮蔽層18亦可為由導體性樹脂或環氧樹脂製成。
在圖1c裡，一晶圓夾具20係藉一黏著層而接附於該基板12的背側。該晶圓夾具20可為由玻璃、矽質、陶瓷、 熱抗性貼帶，或是其他具有一匹配於該基板12之熱膨脹係數的材料所製成。
在圖1d裡，背磨貼帶16可被移除，以暴露出基板12的接觸墊側。
在圖2a－2c中該WLP 10係經倒置，藉以讓該基板12的接觸墊側為面朝上。在圖2a裡，凹槽22係藉由鋸切或蝕刻該基板12而沿劃線所構成。RF模組或晶粒24係藉由複數個焊接球體或凸塊25，即如利用一覆晶互連動流製程，以接附於該基板12的一第一區域。該互連亦可由銅質凸塊或金質凸塊所製成。類似地，基帶模組或晶粒26係藉由複數個焊接球體或凸塊25而接附於該基板12的一第二區域。底膠材料28係放置在該等RF模組24及基帶模組26的下方。該底膠材料28可為由環氧樹脂、聚合物材料、膜層或其他非導體材料所製成。
在圖2b裡，於含有該凹槽22的基板12上，並進一步是在該等RF模組24及基帶模組26的背側上，亦即相反於接附至該基板12之焊接凸塊側，鍍置有一鉑質(Pt)種源層。一遮蔽層30係藉由電解鍍置或無電鍍置處理而沉積於該種源層上。該遮蔽層30是由銅質、金質、鎳質、鋁質或是其他擁有EMI遮蔽性質的導體材料所製成。該遮蔽層30亦可為由導體樹脂或環氧樹脂所製成。該遮蔽層30係依循該等基板12、RF模組24、凹槽22及基帶模組26的輪廓。然而，該鍍置樣式並不會覆蓋該等接觸墊14，而將這些區域遺留成無遮蔽的。該遮蔽層30構成為接合於 該遮蔽層18以供實質上封裝該WLP 10，亦即該基板12、RF模組24、及基帶模組26，然除接觸墊14以外。
在圖2c裡，於接觸墊14之上構成焊接球體或凸塊32。可藉由將該晶圓夾具20移除而分離該晶圓。WLP 34含有一RF模組24及一基帶模組26，而WLP 36含有另一RF模組24及另一基帶模組26。該等WLP 34及36各者在其所有側邊上皆被該遮蔽層30及該遮蔽層18所實質上環繞，藉以將該基帶模組26隔離於來自該RF模組24的EMI效應。該等遮蔽層吸收並反射由該RF模組24所產生的入射EMI。該等遮蔽層18及30亦可運作如一散熱器，以供消散來自該等RF模組24及基帶模組26的熱，藉此改善該WLP 10的熱效能。
一遮蔽接觸墊14的替代具體實施例可如圖3a－3c所示。WLP 40的初始構成係依循圖1a－1d所示之步驟而提供該等基板12、接觸墊14、遮蔽層18及晶圓夾具20。再度地，該基板12的接觸墊側係面朝上。在圖3a裡，凹槽22係藉由鋸切或蝕刻該基板12而沿劃線所構成。RF模組或晶粒24係藉由複數個焊接球體或凸塊25，即如利用一覆晶互連動流製程，以接附於該基板12的一第一區域。類似地，基帶模組或晶粒26係藉由複數個焊接球體或凸塊25而接附於該基板12的一第二區域。底膠材料28係經放置在該等RF模組24及基帶模組26的下方。該底膠材料28可為由樹脂、聚合物材料、膜層或其他非導體材料所製成。
在圖3b裡，一光阻層42係經沉積且樣式化於該等接觸墊14之上，藉以將該等接觸墊隔離於後續的遮蔽層。於含有該凹槽22之基板12上，並且進一步在該等RF模組24及基帶模組26之背側上，亦即相反於接附於該基板12之焊接球體側，藉由鍍置或濺鍍製程以施加一種源層。該種源層可為由鉑、鈦/銅(Ti/Cu)質或鈦鎢(TiW)所製成。一遮蔽層30係藉由電解鍍置或無電鍍置處理而沉積於該種源層上。該遮蔽層30是由銅質、金質、鎳質、鋁質或者其他擁有EMI遮蔽性質的導體材料所製成。該遮蔽層30亦可為由導體樹脂或環氧樹脂所製成。該遮蔽層30係依循該等基板12、RF模組24、凹槽22及基帶模組26的輪廓。將該光阻層42移除以曝出該等接觸墊14。該遮蔽層30經構成以接合於該遮蔽層18以實質上封裝該WLP 10，亦即該基板12、RF模組24、及基帶模組26，然除接觸墊14以外。
在圖3c裡，於該等接觸墊14之上構成焊接球體或凸塊32。可藉由將該晶圓夾具20移除而分離該晶圓。WLP 48含有一RF模組24及一基帶模組26，而WLP 50含有另一RF模組24及另一基帶模組26。該等WLP 48及50各者在其所有側邊上皆被該遮蔽層30及該遮蔽層18所實質上環繞，藉以將該基帶模組26隔離於來自該RF模組24的EMI效應。該等遮蔽層吸收並反射由該RF模組24所產生的入射EMI。該等遮蔽層18及30亦可運作如一散熱器，以供消散來自該等RF模組24及基帶模組26的熱，藉此改善 該WLP 40的熱效能。
圖4說明該等接觸墊14及焊接凸塊32的進一步細節。金屬接觸墊14係經構成於該基板12上。該接觸墊14是由鋁質、銅質或鋁/銅合金所構成。該接觸墊14係電子連接於構成在該基板12上的導體跡線以及主動和被動元件(若確有)。一鈍化層52構成於該基板12上而具一開口以供暴露出金屬接觸墊14。該開口係藉由透過一經光阻遮蔽定義之蝕刻製程以移除該鈍化層52的一局部所實現。該第一鈍化層52可為由氮化矽(SiN)、二氧化矽(SiO2 )、氮氧化矽(SiON)、聚亞醯胺、苯環丁烯(BCB)、聚苯並噁唑(PBO)或其他絕緣材料所製成。一底層凸塊金屬化(UBM)層54構成在該鈍化層52及接觸墊14的上方。該UBM層54係由一鈦(Ti)黏著層、鎳(Ni)或鎳釩(NiV)阻障層以及銅(Cu)濕化層所製成。該UBM層54可用以作為一構成在該金屬接觸墊14與該焊接凸塊32之間的中介導體層。
即如一替代性互連方式，圖5中顯示出金屬接觸墊14及接線接附58。該金屬接觸墊14構成在該基板12上。該接觸墊14是由鋁質、銅質或鋁/銅合金所製成。該接觸墊14係電子連接於構成在該基板12上的導體跡線以及主動和被動元件(若確有)。一鈍化層60構成在該基板12上而具一開口以暴露出金屬接觸墊14。該開口係藉由透過一經光阻遮蔽定義之蝕刻製程以移除該鈍化層60的一局部所實現。該鈍化層60可為由SiN、SiO2 、SiON、聚亞醯胺、BCB、PBO或是其他絕緣材料所製成。一接線接附層62 構成在該鈍化層60及該接觸墊14之上。該接線接附層62可由Al、Au、Ag或Pt所製成。該接線接附層62可用以作為一構成在該金屬接觸墊14與該接線接附58之間的中介導體層。接附接線64係連接至該接線接附58。
圖6說明一WLP 70而無背側遮蔽層18。遮蔽層30即如圖示般覆蓋該等基板12、RF模組24及基帶模組26。缺少該遮蔽層18可將製造程序加以簡化。
圖6亦顯示該遮蔽層30，且同樣地圖2c中的遮蔽層18，可透過該基板12及焊接凸塊32中的重佈線路72而連接至接地電位，藉此強化對於該基帶模組26的EMI隔離。
圖7顯示另一已遮蔽之WLP的具體實施例。WLP 80含有RF模組82及基帶模組84。該WLP 80係在前述圖1－3中所說明之製程中藉由遮蔽層86而隔離於EMI。該WLP 80係藉一導體黏著層91而固接於該基板90。該導體黏著層91的特性是可用以接地該遮蔽層86以強化對於該基帶模組84的EMI隔離。該導體層91可消除對於專屬接地焊接凸塊或接附接線的需要。該WLP 80透過接附接線92以電子連接至該基板90上的接觸墊88。該基板90透過焊接凸塊94而電子連接至其他平台，例如晶片載體基板或印刷電路板。該WLP 80整合於該封裝98內的電路模組96。在一具體實施例裡，該電路模組96為一記憶體模組。該電路模組96接附於該封裝98內的該WLP 80，並且透過接附接線100而電子連接至該基板90上的接觸墊88。
雖已詳細說明本發明之一或更多具體實施例，然熟諳本項技術之人士將能瞭解確能對該等具體實施例進行修改與調適，而不致悖離如後載申請專利範圍中所陳述的本發明範圍。
10‧‧‧WLP封裝
12‧‧‧矽質晶圓基板
14‧‧‧金屬接觸墊
16‧‧‧背磨貼帶
18‧‧‧金屬遮蔽層
20‧‧‧晶圓夾具
22‧‧‧凹槽
24‧‧‧RF模組/晶粒
25‧‧‧焊接球體/凸塊
26‧‧‧基帶模組/晶粒
28‧‧‧底膠材料
30‧‧‧遮蔽層
32‧‧‧焊接球體/凸塊
34‧‧‧WLP
36‧‧‧WLP
40‧‧‧WLP
42‧‧‧光阻層
48‧‧‧WLP
50‧‧‧WLP
52‧‧‧鈍化層
54‧‧‧底層凸塊金屬化(UBM)層
58‧‧‧接線接附
60‧‧‧鈍化層
62‧‧‧接線接附層
64‧‧‧接附接線
70‧‧‧WLP
72‧‧‧重佈線路
80‧‧‧WLP
82‧‧‧RF模組
84‧‧‧基帶模組
86‧‧‧遮蔽層
88‧‧‧接觸墊
90‧‧‧基板
91‧‧‧導體黏著層
92‧‧‧接附接線
94‧‧‧焊接凸塊
96‧‧‧電路模組
98‧‧‧封裝
100‧‧‧接附接線
圖1a－1d說明構成一WLP的初始階段；圖2a－2c說明構成具EMI遮蔽之WLP的稍後階段；圖3a－3c說明構成在接觸墊墊上具一光阻層之WLP的稍後階段；圖4說明該經遮蔽WLP之焊接凸塊結構的進一步細即，圖5說明一對於該經遮蔽WLP之線結合的具體實施例；圖6說明，除背側之外，在所有邊側上皆具有EMI遮蔽的WLP封裝；以及圖7說明一在該WLP之所有邊側上皆具有EMI遮蔽的堆疊式半導體封裝。
12‧‧‧矽質晶圓基板
14‧‧‧金屬接觸墊
24‧‧‧RF模組/晶粒
25‧‧‧焊接球體/凸塊
26‧‧‧基帶模組/晶粒
30‧‧‧遮蔽層
32‧‧‧焊接球體/凸塊
70‧‧‧WLP
72‧‧‧重佈線路

Claims (20)

  1. 一種晶圓級半導體封裝，其中包含：一基板；複數個接觸墊，此者形成在該基板的一第一表面上方；一第一遮蔽層，此者藉由電解鍍置或無電鍍置施加在該基板的第一表面；一鈍化層，此者形成在該基板的第一表面和該接觸墊上方並且包括一開口以暴露該接觸墊；一底層凸塊金屬化，此者形成在該接觸墊以及該鈍化層上方；一凸塊，此者形成在該底層凸塊金屬化上方；一RF模組，此者係藉複數個焊接凸塊而架置在相反於該基板的第一表面之第二表面上的一第一區域；一基帶模組，此者係藉複數個焊接凸塊而架置在該基板之第二表面的一第二區域；以及一第二遮蔽層，此者沿著該基板的第二表面、該RF模組和該基帶模組之輪廓，並且留下經暴露的該接觸墊，其中該等第一及第二遮蔽層連結並且實質上圍住該基板、該RF模組和該基帶模組，藉以將該基帶模組隔離於由該RF模組所產生的電磁干擾。
  2. 如申請專利範圍第1項所述之晶圓級半導體封裝，其中該等第一及第二遮蔽層是從一如下群組中所選定之材料所製成，即銅質、金質、鎳質、鋁質、導體樹脂及導體環氧樹脂。
  3. 如申請專利範圍第1項所述之晶圓級半導體封裝，進一步包含一底膠材料，此者係經放置在該等RF模組及基帶模組的下方。
  4. 如申請專利範圍第1項所述之晶圓級半導體封裝，進一步包含一種源層，此者係在該第二遮蔽層之前而先沉積於該基板上。
  5. 如申請專利範圍第1項所述之晶圓級半導體封裝，其中該等第一及第二遮蔽層係透過該基板而電子連接及接地。
  6. 如申請專利範圍第1項所述之晶圓級半導體封裝，進一步包含接觸墊，此等構成在該基板上而無該第二遮蔽層。
  7. 一種半導體封裝，其中包含：一基板；複數個接觸墊，此者形成在該基板的一第一表面上方；一第一電子模組，此者係架置於該基板的該第一表面上；一第二電子模組，此者係架置於該基板的該第一表面上；一第一遮蔽層，此者沿著該基板的第一表面以及該等第一和第二電子模組的輪廓，並且留下經暴露的該接觸墊；以及一第二遮蔽層，此者係施加在相反於該基板之第一表面的第二表面，其中該等第一及第二遮蔽層連結並且實質上圍住該等第一和第二電子模組，藉以將該第二電子模組 隔離於由該第一電子模組所產生的電磁干擾。
  8. 如申請專利範圍第7項所述之半導體封裝，其中該第一遮蔽層是從如下群組中所選定之材料所製成，即銅質、金質、鎳質、鋁質、導體樹脂及導體環氧樹脂。
  9. 如申請專利範圍第7項所述之半導體封裝，其中該第一遮蔽層是藉由鍍置處理所沉積。
  10. 如申請專利範圍第7項所述之半導體封裝，其中該第一電子模組係一RF模組並且該第二電子模組係一基帶模組。
  11. 如申請專利範圍第7項所述之半導體封裝，進一步包含一種源層，此者係在該第一遮蔽層之前而先沉積於該基板上。
  12. 如申請專利範圍第7項所述之半導體封裝，其中該第一遮蔽層係透過該基板而接地。
  13. 如申請專利範圍第7項所述之半導體封裝，進一步包含接觸墊，此等係構成在該基板上而無該第一遮蔽層。
  14. 一種半導體封裝，其中包含：一基板；複數個接觸墊，此者形成在該基板的一第一表面上方；一第一電子模組，此者係架置於該基板的該第一表面上；一第二電子模組，此者係架置於該基板的該第一表面上；一第一遮蔽層，此者實質上覆蓋該基板以及該等第一 和第二電子模組，該第一遮蔽層留下經暴露的該接觸墊並且沿著該基板以及該等第一和第二電子模組的輪廓；以及一第二遮蔽層，此者係施加在相反於該基板之第一表面的第二表面，其中該第一遮蔽層是藉由鍍置處理所沉積。
  15. 如申請專利範圍第14項所述之半導體封裝，其中該第一遮蔽層是從如下群組中所選定之材料所製成，即銅質、金質、鎳質、鋁質、導體樹脂及導體環氧樹脂。
  16. 如申請專利範圍第14項所述之半導體封裝，其中該第一電子模組係一RF模組並且該第二電子模組係一基帶模組。
  17. 一種製作一半導體封裝的方法，其中包含：構成一基板；將一RF模組架置在該基板的一第一表面上；將一基帶模組架置在該基板的該第一表面上；構成一第一遮蔽層，此者覆蓋該基板的第一表面以及該等RF模組和基帶模組，藉以將該基帶模組隔離於由該RF模組所產生的電磁干擾；以及構成一第二遮蔽層，此者係施加在相反於該基板之第一表面的第二表面，其中該等第一及第二遮蔽層連結並且實質上圍住該半導體封裝。
  18. 如申請專利範圍第17項所述之方法，其中該第一遮蔽層是從如下群組中所選定之材料所製成，即銅質、金質、鎳質、鋁質、導體樹脂及導體環氧樹脂。
  19. 如申請專利範圍第17項所述之方法，其中該第一遮 蔽層是藉由鍍置處理所沉積。
  20. 如申請專利範圍第17項所述之方法，進一步包含在該等RF模組及基帶模組的下方設置一底膠材料。
TW97129612A 2007-09-24 2008-08-05 半導體封裝及減少在元件間電磁干擾的方法 TWI472006B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/860,377 US7701040B2 (en) 2007-09-24 2007-09-24 Semiconductor package and method of reducing electromagnetic interference between devices

Publications (2)

Publication Number Publication Date
TW200915527A TW200915527A (en) 2009-04-01
TWI472006B true TWI472006B (zh) 2015-02-01

Family

ID=40470742

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97129612A TWI472006B (zh) 2007-09-24 2008-08-05 半導體封裝及減少在元件間電磁干擾的方法

Country Status (4)

Country Link
US (1) US7701040B2 (zh)
KR (1) KR101499254B1 (zh)
SG (1) SG151163A1 (zh)
TW (1) TWI472006B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI720028B (zh) * 2015-09-30 2021-03-01 美商西凱渥資訊處理科技公司 關於屏蔽模組之製造的裝置及方法
TWI750222B (zh) * 2017-07-27 2021-12-21 台灣積體電路製造股份有限公司 封裝結構及其形成方法

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8959762B2 (en) 2005-08-08 2015-02-24 Rf Micro Devices, Inc. Method of manufacturing an electronic module
US8434220B2 (en) * 2007-06-27 2013-05-07 Rf Micro Devices, Inc. Heat sink formed with conformal shield
US7906371B2 (en) * 2008-05-28 2011-03-15 Stats Chippac, Ltd. Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield
US8242375B2 (en) 2008-09-18 2012-08-14 United Technologies Corporation Conductive emissions protection
US7799602B2 (en) 2008-12-10 2010-09-21 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure
FR2940588B1 (fr) * 2008-12-19 2011-01-07 St Microelectronics Grenoble Ensemble multicomposant blinde a montage en surface
US20110215450A1 (en) * 2010-03-05 2011-09-08 Chi Heejo Integrated circuit packaging system with encapsulation and method of manufacture thereof
US8569869B2 (en) * 2010-03-23 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with encapsulation and method of manufacture thereof
US9137934B2 (en) 2010-08-18 2015-09-15 Rf Micro Devices, Inc. Compartmentalized shielding of selected components
US9723766B2 (en) * 2010-09-10 2017-08-01 Intersil Americas LLC Power supply module with electromagnetic-interference (EMI) shielding, cooling, or both shielding and cooling, along two or more sides
TWI491009B (zh) 2010-10-08 2015-07-01 晶片級電磁干擾屏蔽結構及製造方法
US8654537B2 (en) * 2010-12-01 2014-02-18 Apple Inc. Printed circuit board with integral radio-frequency shields
US8835226B2 (en) 2011-02-25 2014-09-16 Rf Micro Devices, Inc. Connection using conductive vias
US9627230B2 (en) 2011-02-28 2017-04-18 Qorvo Us, Inc. Methods of forming a microshield on standard QFN package
US8268677B1 (en) 2011-03-08 2012-09-18 Stats Chippac, Ltd. Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer
CN102693962A (zh) * 2011-03-22 2012-09-26 精材科技股份有限公司 具有电磁屏蔽作用的集成电路晶圆及其制造方法
US8633059B2 (en) 2011-05-11 2014-01-21 Stats Chippac Ltd. Integrated circuit packaging system with interconnect and method of manufacture thereof
WO2013055700A1 (en) * 2011-10-13 2013-04-18 Flipchip International, Llc Wafer level applied rf shields
US8772929B2 (en) * 2011-11-16 2014-07-08 Taiwan Semiconductor Manufacturing Company, Ltd. Package for three dimensional integrated circuit
EP2648218B1 (en) * 2012-04-05 2015-10-14 Nxp B.V. Integrated circuit and method of manufacturing the same
TW201351599A (zh) * 2012-06-04 2013-12-16 矽品精密工業股份有限公司 半導體封裝件及其製法
WO2013183671A1 (ja) * 2012-06-08 2013-12-12 日立化成株式会社 半導体装置の製造方法
US9412661B2 (en) * 2012-11-21 2016-08-09 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming package-on-package structure
US9807890B2 (en) 2013-05-31 2017-10-31 Qorvo Us, Inc. Electronic modules having grounded electromagnetic shields
JP5576542B1 (ja) * 2013-08-09 2014-08-20 太陽誘電株式会社 回路モジュール及び回路モジュールの製造方法
US9564937B2 (en) 2013-11-05 2017-02-07 Skyworks Solutions, Inc. Devices and methods related to packaging of radio-frequency devices on ceramic substrates
US9406650B2 (en) 2014-01-31 2016-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of packaging semiconductor devices and packaged semiconductor devices
US20150287697A1 (en) * 2014-04-02 2015-10-08 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor Device and Method
US9913412B2 (en) 2014-03-18 2018-03-06 Apple Inc. Shielding structures for system-in-package assemblies in portable electronic devices
US9949359B2 (en) 2014-03-18 2018-04-17 Apple Inc. Multi-layer thin-film coatings for system-in-package assemblies in portable electronic devices
US9820373B2 (en) * 2014-06-26 2017-11-14 Apple Inc. Thermal solutions for system-in-package assemblies in portable electronic devices
JP6438225B2 (ja) * 2014-07-24 2018-12-12 株式会社ジェイデバイス 半導体パッケージ
KR102274742B1 (ko) * 2014-10-06 2021-07-07 삼성전자주식회사 패키지 온 패키지와 이를 포함하는 컴퓨팅 장치
KR102340828B1 (ko) * 2014-10-23 2021-12-17 삼성전자주식회사 인쇄회로기판 어셈블리 제조 방법
US10242957B2 (en) * 2015-02-27 2019-03-26 Qualcomm Incorporated Compartment shielding in flip-chip (FC) module
US9620463B2 (en) 2015-02-27 2017-04-11 Qualcomm Incorporated Radio-frequency (RF) shielding in fan-out wafer level package (FOWLP)
US9660609B2 (en) * 2015-07-07 2017-05-23 Skyworks Solutions, Inc. Devices and methods related to stacked duplexers
US9748184B2 (en) * 2015-10-15 2017-08-29 Micron Technology, Inc. Wafer level package with TSV-less interposer
US10497650B2 (en) * 2017-04-13 2019-12-03 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
US11127689B2 (en) 2018-06-01 2021-09-21 Qorvo Us, Inc. Segmented shielding using wirebonds
US11219144B2 (en) 2018-06-28 2022-01-04 Qorvo Us, Inc. Electromagnetic shields for sub-modules
US10825781B2 (en) * 2018-08-01 2020-11-03 Nxp B.V. Semiconductor device with conductive film shielding
JP7106753B2 (ja) * 2018-09-04 2022-07-26 中芯集成電路（寧波）有限公司 ウェハレベルパッケージング方法及びパッケージング構造
CN110875203B (zh) * 2018-09-04 2021-11-09 中芯集成电路（宁波）有限公司 晶圆级封装方法以及封装结构
US10978421B2 (en) * 2018-09-04 2021-04-13 Ningbo Semiconductor International Corporation Wafer-level packaging method and package structure
US11114363B2 (en) 2018-12-20 2021-09-07 Qorvo Us, Inc. Electronic package arrangements and related methods
US11605603B2 (en) * 2019-03-22 2023-03-14 Intel Corporation Microelectronic package with radio frequency (RF) chiplet
US11515282B2 (en) 2019-05-21 2022-11-29 Qorvo Us, Inc. Electromagnetic shields with bonding wires for sub-modules
CN110544677B (zh) * 2019-07-26 2023-03-14 通富微电子股份有限公司 封装结构
US11621245B2 (en) 2020-06-03 2023-04-04 Micron Technology, Inc. Microelectronic device packages with EMI shielding, methods of fabricating and related electronic systems

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838748B2 (en) * 2002-05-22 2005-01-04 Sharp Kabushiki Kaisha Semiconductor element with electromagnetic shielding layer on back/side face(s) thereof
TW200516708A (en) * 2003-11-10 2005-05-16 Shih-Hsien Tseng An integrated circuit structure and a manufacturing method thereof
US7125744B2 (en) * 2001-03-16 2006-10-24 Matsushita Electric Industrial Co., Ltd. High-frequency module and method for manufacturing the same
TW200719462A (en) * 2005-11-03 2007-05-16 Cyntec Co Ltd Package device with electromagnetic interference shield

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3505488B2 (ja) * 1999-10-12 2004-03-08 古河電気工業株式会社 光モジュール
US7187060B2 (en) 2003-03-13 2007-03-06 Sanyo Electric Co., Ltd. Semiconductor device with shield
US7648858B2 (en) * 2007-06-19 2010-01-19 Freescale Semiconductor, Inc. Methods and apparatus for EMI shielding in multi-chip modules

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7125744B2 (en) * 2001-03-16 2006-10-24 Matsushita Electric Industrial Co., Ltd. High-frequency module and method for manufacturing the same
US6838748B2 (en) * 2002-05-22 2005-01-04 Sharp Kabushiki Kaisha Semiconductor element with electromagnetic shielding layer on back/side face(s) thereof
TW200516708A (en) * 2003-11-10 2005-05-16 Shih-Hsien Tseng An integrated circuit structure and a manufacturing method thereof
TW200719462A (en) * 2005-11-03 2007-05-16 Cyntec Co Ltd Package device with electromagnetic interference shield

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI720028B (zh) * 2015-09-30 2021-03-01 美商西凱渥資訊處理科技公司 關於屏蔽模組之製造的裝置及方法
US11682585B2 (en) 2015-09-30 2023-06-20 Skyworks Solutions, Inc. Devices for fabrication of shielded modules
TWI750222B (zh) * 2017-07-27 2021-12-21 台灣積體電路製造股份有限公司 封裝結構及其形成方法

Also Published As

Publication number Publication date
SG151163A1 (en) 2009-04-30
TW200915527A (en) 2009-04-01
US20090079041A1 (en) 2009-03-26
KR101499254B1 (ko) 2015-03-05
KR20090031650A (ko) 2009-03-27
US7701040B2 (en) 2010-04-20

Similar Documents

Publication Publication Date Title
TWI472006B (zh) 半導體封裝及減少在元件間電磁干擾的方法
TWI567866B (zh) 半導體元件以及使用提供結構支撐之封膠劑來形成具有直通矽晶穿孔的互連結構之方法
TWI499000B (zh) 形成雙主動邊之半導體晶粒於扇出晶圓程度晶粒級封裝之半導體裝置和方法
TWI499030B (zh) 在矽穿孔插入物中形成開放孔穴以包含在晶圓級晶片尺寸模組封裝的半導體晶粒之半導體裝置和方法
TWI502682B (zh) 半導體封裝及鑲嵌半導體晶粒至直通矽晶穿孔基板的對邊之方法
TWI508202B (zh) 雙重模造晶粒形成於增進互連結構之對邊上之半導體裝置和方法
TWI579977B (zh) 使用引線架體以形成用於半導體晶粒的垂直互連的通過密封物的開口之半導體裝置和方法
US9379064B2 (en) Semiconductor device and method of mounting semiconductor die to heat spreader on temporary carrier and forming polymer layer and conductive layer over the die
TWI649811B (zh) 用於應用處理器和記憶體整合的薄的三維扇出嵌入式晶圓級封裝
TWI579960B (zh) 形成具有絕緣環形圈的導電性直通矽晶穿孔（ｔｓｖ）之半導體裝置及方法
TWI550763B (zh) 半導體元件以及形成自預先構建的柱狀框架的３ｄ電感之方法
TWI479577B (zh) 形成屏障材料於晶粒之周圍以減少翹曲之半導體裝置和方法
TWI614859B (zh) 半導體裝置和形成具有扇出互連結構以減少基板複雜性之擴大的半導體裝置之方法
TWI552265B (zh) 形成孔穴於增進互連結構中以縮短晶粒之間訊號路徑之半導體裝置和方法
US8125073B2 (en) Wafer integrated with permanent carrier and method therefor
US8546189B2 (en) Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection
US7772081B2 (en) Semiconductor device and method of forming high-frequency circuit structure and method thereof
TWI557872B (zh) 半導體裝置及用於形成具有垂直互連之薄剖面wlcsp於封裝覆蓋區的方法
TWI488264B (zh) 半導體元件以及形成無載體的薄晶圓的方法
TWI508226B (zh) 在基板的孔穴中鑲嵌具有直通矽晶穿孔的晶粒用以扇入封裝疊加的電互連之半導體裝置和方法
TWI590408B (zh) 半導體裝置和自基板形成基礎導線作為支座以堆疊半導體晶粒之方法
TWI590347B (zh) 形成圍繞基板之晶粒附接區域之相鄰的通道及屏障材料之半導體裝置及方法以控制向外流之底部填充材料
US10163744B2 (en) Semiconductor device and method of forming a low profile dual-purpose shield and heat-dissipation structure
TWI520287B (zh) 半導體裝置以及形成沿著第一軸較寬於接觸墊並且沿著第二軸較窄於接觸墊之重新分配層的方法
TWI518811B (zh) 半導體裝置及以多層凸塊底層金屬形成凸塊結構於凸塊形成區周圍之方法