TWI417964B - 具有浸沒接點之電晶體及其形成之方法 - Google Patents

具有浸沒接點之電晶體及其形成之方法 Download PDF

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Publication number
TWI417964B
TWI417964B TW095144493A TW95144493A TWI417964B TW I417964 B TWI417964 B TW I417964B TW 095144493 A TW095144493 A TW 095144493A TW 95144493 A TW95144493 A TW 95144493A TW I417964 B TWI417964 B TW I417964B
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TW
Taiwan
Prior art keywords
contact
forming
opening
current electrode
region
Prior art date
Application number
TW095144493A
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English (en)
Chinese (zh)
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TW200733249A (en
Inventor
Marius K Orlowski
James D Burnett
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Freescale Semiconductor Inc
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Publication of TW200733249A publication Critical patent/TW200733249A/zh
Application granted granted Critical
Publication of TWI417964B publication Critical patent/TWI417964B/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6219—Fin field-effect transistors [FinFET] characterised by the source or drain electrodes

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW095144493A 2005-12-16 2006-11-30 具有浸沒接點之電晶體及其形成之方法 TWI417964B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/311,587 US7968394B2 (en) 2005-12-16 2005-12-16 Transistor with immersed contacts and methods of forming thereof

Publications (2)

Publication Number Publication Date
TW200733249A TW200733249A (en) 2007-09-01
TWI417964B true TWI417964B (zh) 2013-12-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW095144493A TWI417964B (zh) 2005-12-16 2006-11-30 具有浸沒接點之電晶體及其形成之方法

Country Status (5)

Country Link
US (3) US7968394B2 (enExample)
EP (1) EP1964167A2 (enExample)
JP (1) JP2009520367A (enExample)
TW (1) TWI417964B (enExample)
WO (1) WO2007120283A2 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7968394B2 (en) * 2005-12-16 2011-06-28 Freescale Semiconductor, Inc. Transistor with immersed contacts and methods of forming thereof
ATE496394T1 (de) * 2006-01-30 2011-02-15 Nxp Bv Mos-vorrichtung und verfahren zu seiner herstellung
US20070287256A1 (en) * 2006-06-07 2007-12-13 International Business Machines Corporation Contact scheme for FINFET structures with multiple FINs
JP4534164B2 (ja) * 2006-07-25 2010-09-01 エルピーダメモリ株式会社 半導体装置の製造方法
US7960243B2 (en) * 2007-05-31 2011-06-14 Freescale Semiconductor, Inc. Method of forming a semiconductor device featuring a gate stressor and semiconductor device
DE102008059500B4 (de) * 2008-11-28 2010-08-26 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines Mehr-Gatetransistors mit homogen silizidierten Stegendbereichen
KR101104248B1 (ko) * 2008-12-23 2012-01-11 한국전자통신연구원 자기 정렬 전계 효과 트랜지스터 구조체
US8415250B2 (en) 2011-04-29 2013-04-09 International Business Machines Corporation Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device
US8969154B2 (en) * 2011-08-23 2015-03-03 Micron Technology, Inc. Methods for fabricating semiconductor device structures and arrays of vertical transistor devices
US9637810B2 (en) 2011-09-30 2017-05-02 Intel Corporation Tungsten gates for non-planar transistors
US8981435B2 (en) 2011-10-01 2015-03-17 Intel Corporation Source/drain contacts for non-planar transistors
US8664729B2 (en) * 2011-12-14 2014-03-04 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for reduced gate resistance finFET
US8871626B2 (en) * 2011-12-20 2014-10-28 International Business Machines Corporation FinFET with vertical silicide structure
TWI569446B (zh) * 2011-12-23 2017-02-01 半導體能源研究所股份有限公司 半導體元件、半導體元件的製造方法、及包含半導體元件的半導體裝置
US9240352B2 (en) 2012-10-24 2016-01-19 Globalfoundries Inc. Bulk finFET well contacts with fin pattern uniformity
US9006811B2 (en) * 2012-12-03 2015-04-14 Infineon Technologies Austria Ag Semiconductor device including a fin and a drain extension region and manufacturing method
CN104576389B (zh) * 2013-10-14 2017-11-21 中芯国际集成电路制造(上海)有限公司 鳍式场效应管及其制作方法
JP6373686B2 (ja) 2014-08-22 2018-08-15 ルネサスエレクトロニクス株式会社 半導体装置
US9972541B2 (en) * 2014-08-29 2018-05-15 Intel Corporation Technique for filling high aspect ratio, narrow structures with multiple metal layers and associated configurations
US9953857B2 (en) * 2014-11-20 2018-04-24 International Business Machines Corporation Semiconductor device with buried local interconnects
US10062762B2 (en) * 2014-12-23 2018-08-28 Stmicroelectronics, Inc. Semiconductor devices having low contact resistance and low current leakage
CN108028277B (zh) * 2015-09-25 2021-12-21 英特尔公司 具有增大的接触面积的半导体器件接触
US9768178B2 (en) * 2015-11-11 2017-09-19 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device, static random access memory cell and manufacturing method of semiconductor device
US9887289B2 (en) 2015-12-14 2018-02-06 International Business Machines Corporation Method and structure of improving contact resistance for passive and long channel devices
US11088033B2 (en) * 2016-09-08 2021-08-10 International Business Machines Corporation Low resistance source-drain contacts using high temperature silicides
US10522683B2 (en) * 2018-04-25 2019-12-31 Intel Corporation Transistors with ballistic or quasi-ballistic carrier behavior and low resistance in source and drain nodes
US20220190159A1 (en) * 2020-12-15 2022-06-16 Intel Corporation Integrated circuit structures having gesnb source or drain structures

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291145A (ja) * 1993-04-05 1994-10-18 Toshiba Corp 多結晶シリコン薄膜トランジスタの製造方法
JPH1096957A (ja) * 1996-09-25 1998-04-14 Toshiba Electron Eng Corp 薄膜トランジスタ装置
US6720619B1 (en) * 2002-12-13 2004-04-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices
JP2005191484A (ja) * 2003-12-26 2005-07-14 Seiko Instruments Inc 半導体装置及びその製造方法

Family Cites Families (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230394A (ja) 1985-07-31 1987-02-09 Sharp Corp 半導体レ−ザ−組立装置
JPS63137941A (ja) 1986-12-01 1988-06-09 Mitsui Toatsu Chem Inc ポリオレフイン組成物
JPS63137941U (enExample) * 1987-03-04 1988-09-12
US4960723A (en) * 1989-03-30 1990-10-02 Motorola, Inc. Process for making a self aligned vertical field effect transistor having an improved source contact
US5155052A (en) * 1991-06-14 1992-10-13 Davies Robert B Vertical field effect transistor with improved control of low resistivity region geometry
US5874341A (en) * 1996-10-30 1999-02-23 Advanced Micro Devices, Inc. Method of forming trench transistor with source contact in trench
US5308782A (en) 1992-03-02 1994-05-03 Motorola Semiconductor memory device and method of formation
US5795793A (en) * 1994-09-01 1998-08-18 International Rectifier Corporation Process for manufacture of MOS gated device with reduced mask count
US5578873A (en) * 1994-10-12 1996-11-26 Micron Technology, Inc. Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer
US6777732B1 (en) 1995-03-07 2004-08-17 Micron Technology, Inc. Random access memory
KR0143459B1 (ko) * 1995-05-22 1998-07-01 한민구 모오스 게이트형 전력 트랜지스터
US5843796A (en) * 1995-09-11 1998-12-01 Delco Electronics Corporation Method of making an insulated gate bipolar transistor with high-energy P+ im
JP3607431B2 (ja) * 1996-09-18 2005-01-05 株式会社東芝 半導体装置およびその製造方法
US5858828A (en) * 1997-02-18 1999-01-12 Symbios, Inc. Use of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor
DE19731496A1 (de) * 1997-07-22 1999-01-28 Siemens Ag Herstellungsverfahren für ein durch Feldeffekt gesteuertes Halbleiterbauelement
JP3445495B2 (ja) 1997-07-23 2003-09-08 株式会社東芝 半導体装置
JPH11251433A (ja) * 1998-03-06 1999-09-17 Rohm Co Ltd 半導体装置およびその製法
TW400612B (en) * 1998-10-19 2000-08-01 United Microelectronics Corp The manufacturing method of a transistor
JP3414662B2 (ja) * 1999-01-19 2003-06-09 株式会社半導体エネルギー研究所 Ｓｒａｍセル及びその製造方法
US6194315B1 (en) * 1999-04-16 2001-02-27 Micron Technology, Inc. Electrochemical cobalt silicide liner for metal contact fills and damascene processes
US6376370B1 (en) * 2000-01-18 2002-04-23 Micron Technology, Inc. Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy
JP2002222948A (ja) * 2001-01-29 2002-08-09 Mitsubishi Electric Corp Ｍｏｓトランジスタの製造方法
US7163851B2 (en) * 2002-08-26 2007-01-16 International Business Machines Corporation Concurrent Fin-FET and thick-body device fabrication
US6972819B2 (en) * 2003-04-17 2005-12-06 Hannstar Display Corporation Method of manufacturing IPS-LCD using 4-mask process
US7192876B2 (en) * 2003-05-22 2007-03-20 Freescale Semiconductor, Inc. Transistor with independent gate structures
US6903967B2 (en) * 2003-05-22 2005-06-07 Freescale Semiconductor, Inc. Memory with charge storage locations and adjacent gate structures
JP4841106B2 (ja) * 2003-08-28 2011-12-21 ルネサスエレクトロニクス株式会社 Ｍｉｓ型半導体装置及びその製造方法
US7211864B2 (en) * 2003-09-15 2007-05-01 Seliskar John J Fully-depleted castellated gate MOSFET device and method of manufacture thereof
US7714384B2 (en) * 2003-09-15 2010-05-11 Seliskar John J Castellated gate MOSFET device capable of fully-depleted operation
US7709403B2 (en) * 2003-10-09 2010-05-04 Panasonic Corporation Silicon carbide-oxide layered structure, production method thereof, and semiconductor device
US6969656B2 (en) * 2003-12-05 2005-11-29 Freescale Semiconductor, Inc. Method and circuit for multiplying signals with a transistor having more than one independent gate structure
JP4559728B2 (ja) * 2003-12-26 2010-10-13 株式会社東芝 半導体記憶装置
US20050151166A1 (en) 2004-01-09 2005-07-14 Chun-Chieh Lin Metal contact structure and method of manufacture
US7247528B2 (en) * 2004-02-24 2007-07-24 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques
JP2005294789A (ja) * 2004-03-10 2005-10-20 Toshiba Corp 半導体装置及びその製造方法
KR100621628B1 (ko) 2004-05-31 2006-09-19 삼성전자주식회사 비휘발성 기억 셀 및 그 형성 방법
US7018876B2 (en) * 2004-06-18 2006-03-28 Freescale Semiconductor, Inc. Transistor with vertical dielectric structure
JP2006012898A (ja) * 2004-06-22 2006-01-12 Toshiba Corp 半導体装置及びその製造方法
JP2006054423A (ja) * 2004-07-13 2006-02-23 Toshiba Corp 半導体装置及びその製造方法
US7238601B2 (en) * 2004-09-10 2007-07-03 Freescale Semiconductor, Inc. Semiconductor device having conductive spacers in sidewall regions and method for forming
US7439139B2 (en) * 2004-09-13 2008-10-21 Seliskar John J Fully-depleted castellated gate MOSFET device and method of manufacture thereof
KR100689818B1 (ko) * 2004-11-05 2007-03-08 삼성전자주식회사 절연층상 단결정 반도체 박막 형성방법 및 그에 의해제조된 반도체소자
DE102004057235B4 (de) * 2004-11-26 2007-12-27 Infineon Technologies Ag Vertikaler Trenchtransistor und Verfahren zu dessen Herstellung
US7282766B2 (en) * 2005-01-17 2007-10-16 Fujitsu Limited Fin-type semiconductor device with low contact resistance
KR100594321B1 (ko) * 2005-02-14 2006-06-30 삼성전자주식회사 소스/드레인에의 접촉 면적을 개선한 트랜지스터 및 제조방법
US7518196B2 (en) * 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US7148097B2 (en) * 2005-03-07 2006-12-12 Texas Instruments Incorporated Integrated circuit containing polysilicon gate transistors and fully silicidized metal gate transistors
US20060202266A1 (en) * 2005-03-14 2006-09-14 Marko Radosavljevic Field effect transistor with metal source/drain regions
JP4890780B2 (ja) * 2005-04-11 2012-03-07 ルネサスエレクトロニクス株式会社 電界効果トランジスタ
US7279375B2 (en) * 2005-06-30 2007-10-09 Intel Corporation Block contact architectures for nanoscale channel transistors
US8188551B2 (en) * 2005-09-30 2012-05-29 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof
US7638842B2 (en) * 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
US7384838B2 (en) * 2005-09-13 2008-06-10 International Business Machines Corporation Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures
US7736984B2 (en) * 2005-09-23 2010-06-15 Semiconductor Components Industries, Llc Method of forming a low resistance semiconductor contact and structure therefor
US7425740B2 (en) * 2005-10-07 2008-09-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for a 1T-RAM bit cell and macro
US7719058B2 (en) * 2005-10-12 2010-05-18 Seliskar John J Mixed-signal semiconductor platform incorporating fully-depleted castellated-gate MOSFET device and method of manufacture thereof
US20070085576A1 (en) * 2005-10-14 2007-04-19 Hector Sanchez Output driver circuit with multiple gate devices
US8513066B2 (en) * 2005-10-25 2013-08-20 Freescale Semiconductor, Inc. Method of making an inverted-T channel transistor
US20070099407A1 (en) * 2005-11-01 2007-05-03 Jiong-Ping Lu Method for fabricating a transistor using a low temperature spike anneal
US7968394B2 (en) * 2005-12-16 2011-06-28 Freescale Semiconductor, Inc. Transistor with immersed contacts and methods of forming thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291145A (ja) * 1993-04-05 1994-10-18 Toshiba Corp 多結晶シリコン薄膜トランジスタの製造方法
JPH1096957A (ja) * 1996-09-25 1998-04-14 Toshiba Electron Eng Corp 薄膜トランジスタ装置
US6720619B1 (en) * 2002-12-13 2004-04-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices
JP2005191484A (ja) * 2003-12-26 2005-07-14 Seiko Instruments Inc 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP2009520367A (ja) 2009-05-21
TW200733249A (en) 2007-09-01
US20070161170A1 (en) 2007-07-12
US20110210395A1 (en) 2011-09-01
US7968394B2 (en) 2011-06-28
EP1964167A2 (en) 2008-09-03
US20130009222A1 (en) 2013-01-10
US8314448B2 (en) 2012-11-20
WO2007120283A2 (en) 2007-10-25
US8633515B2 (en) 2014-01-21
WO2007120283A3 (en) 2008-10-23

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