JP2009520367A - 埋没接点を有するトランジスタとその形成方法 - Google Patents
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H01L29/41725—Source or drain electrodes for field effect devices
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L2029/7858—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET having contacts specially adapted to the FinFET geometry, e.g. wrap-around contacts
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Abstract
Description
さらに別の側面では、該方法は、第1の電流電極領域、第2の電流電極領域、およびチャネル領域を含む半導体構造を形成することを含み、チャネル領域は第1の電流電極領域と第2の電流電極領域との間に配置され、チャネル領域は半導体構造のフィン構造内に配置され、チャネル領域内のキャリア輸送は第1の電流電極領域と第2の電流電極領域との間で水平方向に行われる。該方法はさらに、第1の接点を形成することを含み、第1の接点を形成することは、(1)半導体構造の第1の部分を除去して、第1の電流電極領域に開口部を形成すること、(2)開口部に接点材料を形成することを含む。本明細書で使用されるように、「半導体構造」という用語は、半導体材料、または金属材料、またはその組み合わせの部品で製造される構造を含む。
当業者であれば、図面内の構成要素は簡潔さと明瞭性を得るために図示されており、必ずしも等縮尺されていないことを認識するであろう。たとえば、図面内のいくつかの要素の寸法は、本発明の実施形態の理解を深める助けとして、他の要素に対して誇張されている場合がある。
Claims (23)
- 半導体装置を形成するための方法であって、
半導体装置電極構造を形成すること、
第1の接点を形成することを備え、
前記第1の接点を形成することは、
前記半導体装置電極構造の第1の部分を除去して開口部を形成すること、
前記開口部内に接点材料を形成することを含み、
前記第1の接点は前記半導体装置電極構造に電気的に結合される、方法。 - 前記半導体装置電極構造が第1の電流電極領域を含み、前記第1の接点が前記第1の電流電極領域に電気的に結合される、請求項1に記載の方法。
- 前記第1の電流電極領域が半導体構造の一部であり、前記半導体構造が、
第2の電流電極領域と、
前記第1の電流電極領域と前記第2の電流電極領域との間で前記半導体構造内に配置され、前記半導体構造のフィン構造内に位置するチャネル領域とを含み、前記チャネル領域でのキャリア輸送が前記第1の電流電極領域と前記第2の電流電極領域の間で水平方向に行われる、請求項2に記載の方法。 - 前記フィン構造が前記半導体構造の前記第1の構造と前記半導体構造の前記第2の構造との間で水平に延在し、前記第1の電流電極領域の少なくとも一部が前記第1の構造内に配置され、前記第2の電流電極領域の少なくとも一部が前記第2の構造内に配置され、除去された第1の部分が第1の構造の一部である、請求項3に記載の方法。
- 第2の接点を形成することであって、前記第2の電流電極領域の第2の部分を除去することを含む、第2の接点を形成すること、
接点材料を前記第2の開口部に形成することを備え、
前記第2の接点が前記第2の電流電極領域と電気的に結合される、請求項3に記載の方法。 - 前記半導体装置電極構造がゲート構造を含み、前記第1の接点が前記ゲート構造に電気的に結合される、請求項1に記載の方法。
- 前記半導体装置電極構造が絶縁体上に配置され、前記第1の部分を除去することが、前記半導体装置電極構造の材料を除去して前記絶縁体を露出させることを含む、請求項1に記載の方法。
- 接点材料を前記開口部に形成することが、
バリア層材料を前記開口部に形成すること、
前記バリア層材料が形成された後に第2の材料を前記開口部に形成することを含む、請求項1に記載の方法。 - 前記第1の部分を除去することが、
前記半導体装置電極構造上に誘電体材料の層を形成すること、
前記誘電体材料の層内に開口部をエッチングすること、
前記開口部を通じて前記半導体装置電極構造の前記第1の部分をエッチングして前記第1の部分を除去することを含む、請求項1に記載の方法。 - 前記開口部が前記半導体装置電極構造によって完全に囲まれる、請求項1に記載の方法。
- 前記開口部が半導体装置電極構造の側壁によって形成され、方法が更に接点材料を前記開口部に形成する前に前記側壁にシリサイドを形成することを備える、請求項1に記載の方法。
- 前記半導体装置電極構造が絶縁体上に配置され、前記半導体装置電極構造の材料が、前記第1の部分を除去した後に前記絶縁体と前記開口部の底部との間に残留する、請求項1に記載の方法。
- 半導体装置であって、
電極構造と、
前記電極構造内に延在し、かつ前記電極構造に電気的に結合される第1の接点とを備える半導体装置。 - 前記電極構造が第1の電流電極領域を含み、前記第1の接点が前記第1の電流電極領域に電気的に結合される、請求項13に記載の半導体装置。
- 第1の電流電極領域が半導体構造の一部であり、前記半導体構造が、
前記第2の電流電極領域と、
前記第1の電流電極領域と前記第2の電流電極領域との間で半導体構造内に配置され、前記半導体構造のフィン構造内に位置するチャネル領域とを含み、前記チャネル領域でのキャリア輸送が前記第1の電流電極領域と前記第2の電流電極領域との間で水平方向に行われる、請求項14に記載の半導体装置。 - 前記第2の電流電極領域に電気的に結合され、前記半導体構造の前記第2の電流電極領域に延在する第2の接点をさらに備える、請求項15に記載の半導体装置。
- 前記第1の半導体構造が複数のフィン構造を備え、
前記複数のフィン構造がフィン構造を含み、
複数のフィン構造の各々がチャネル領域を含み、
複数のフィン構造の各々が前記半導体構造の前記第1の構造と前記半導体構造の前記第2の構造との間に配置され、
前記第1の電流電極領域の少なくとも一部が前記第1の構造内に配置され、前記第2の電流電極領域の少なくとも一部が前記第2の構造内に配置され、
前記第1の接点が前記第1の構造内に延在する、請求項15に記載の半導体装置。 - 前記電極構造が絶縁体上に配置され、前記第1の接点が絶縁体にまで延在する、請求項13に記載の半導体装置。
- 前記第1の接点がバリア層を含む、請求項13に記載の半導体装置。
- 前記第1の接点が前記電極構造内の開口部内に延在し、前記開口部が前記電極構造によって完全に囲まれる、請求項13に記載の半導体装置。
- 前記第1の接点が前記電極構造内の開口部内に延在し、前記開口部が側壁を有し、前記側壁が、該側壁上に配置されるシリサイドを含み、該シリサイドが前記第1の接点と電気的に接触している、請求項13に記載の半導体装置。
- 前記電極構造がゲート構造を含む、請求項13に記載の半導体装置。
- 方法であって、
第1の電流電極領域、第2の電流電極領域、およびチャネル領域を含む半導体構造を形成することであって、前記チャネル領域が前記第1の電流電極領域と前記第2の電流電極領域との間に配置され、前記チャネル領域が前記半導体構造のフィン構造内に配置され、前記チャネル領域内のキャリア輸送が前記第1の電流電極領域と前記第2の電流電極領域との間で水平方向に行われる、前記半導体構造を形成すること、
第1の接点を形成することであって、半導体構造の第1の部分を除去して、第1の電流電極領域に開口部を形成することを含む、第1の接点を形成すること、
開口部に接点材料を形成することを備える方法。
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US11/311,587 US7968394B2 (en) | 2005-12-16 | 2005-12-16 | Transistor with immersed contacts and methods of forming thereof |
PCT/US2006/061128 WO2007120283A2 (en) | 2005-12-16 | 2006-11-21 | Transistor with immersed contacts and methods of forming thereof |
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US8314448B2 (en) | 2012-11-20 |
US20110210395A1 (en) | 2011-09-01 |
US7968394B2 (en) | 2011-06-28 |
WO2007120283A2 (en) | 2007-10-25 |
US8633515B2 (en) | 2014-01-21 |
US20130009222A1 (en) | 2013-01-10 |
TW200733249A (en) | 2007-09-01 |
WO2007120283A3 (en) | 2008-10-23 |
TWI417964B (zh) | 2013-12-01 |
EP1964167A2 (en) | 2008-09-03 |
US20070161170A1 (en) | 2007-07-12 |
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