ATE496394T1 - Mos-vorrichtung und verfahren zu seiner herstellung - Google Patents

Mos-vorrichtung und verfahren zu seiner herstellung

Info

Publication number
ATE496394T1
ATE496394T1 AT07700658T AT07700658T ATE496394T1 AT E496394 T1 ATE496394 T1 AT E496394T1 AT 07700658 T AT07700658 T AT 07700658T AT 07700658 T AT07700658 T AT 07700658T AT E496394 T1 ATE496394 T1 AT E496394T1
Authority
AT
Austria
Prior art keywords
gate
region
semiconductor region
mos device
semiconductor
Prior art date
Application number
AT07700658T
Other languages
English (en)
Inventor
Sebastien Nuttinck
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE496394T1 publication Critical patent/ATE496394T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6217—Fin field-effect transistors [FinFET] having non-uniform gate electrodes, e.g. gate conductors having varying doping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/011—Manufacture or treatment comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H10D86/215—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI comprising FinFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Steroid Compounds (AREA)
AT07700658T 2006-01-30 2007-01-22 Mos-vorrichtung und verfahren zu seiner herstellung ATE496394T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP06101021 2006-01-30
PCT/IB2007/050211 WO2007085996A2 (en) 2006-01-30 2007-01-22 Mos device and method of fabricating a mos device

Publications (1)

Publication Number Publication Date
ATE496394T1 true ATE496394T1 (de) 2011-02-15

Family

ID=38309588

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07700658T ATE496394T1 (de) 2006-01-30 2007-01-22 Mos-vorrichtung und verfahren zu seiner herstellung

Country Status (8)

Country Link
US (1) US8093659B2 (de)
EP (1) EP1982357B1 (de)
JP (1) JP2009523320A (de)
CN (1) CN101375399B (de)
AT (1) ATE496394T1 (de)
DE (1) DE602007012054D1 (de)
TW (1) TW200735357A (de)
WO (1) WO2007085996A2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8110467B2 (en) * 2009-04-21 2012-02-07 International Business Machines Corporation Multiple Vt field-effect transistor devices
US8294511B2 (en) 2010-11-19 2012-10-23 Micron Technology, Inc. Vertically stacked fin transistors and methods of fabricating and operating the same
US9553193B2 (en) * 2010-11-19 2017-01-24 Micron Technology, Inc. Double gated fin transistors and methods of fabricating and operating the same
FR3016237B1 (fr) 2014-01-07 2017-06-09 Commissariat Energie Atomique Dispositif a nanofils de semi-conducteur partiellement entoures par une grille
US9224736B1 (en) 2014-06-27 2015-12-29 Taiwan Semicondcutor Manufacturing Company, Ltd. Structure and method for SRAM FinFET device
CN104916587A (zh) * 2015-05-06 2015-09-16 深圳市海泰康微电子有限公司 用于高密度集成电路设计的半导体器件及其制备方法
US9356027B1 (en) 2015-05-11 2016-05-31 International Business Machines Corporation Dual work function integration for stacked FinFET
US9659963B2 (en) 2015-06-29 2017-05-23 International Business Machines Corporation Contact formation to 3D monolithic stacked FinFETs
US10084090B2 (en) 2015-11-09 2018-09-25 International Business Machines Corporation Method and structure of stacked FinFET
US11282861B2 (en) 2015-12-26 2022-03-22 Intel Corporation Dynamic logic built with stacked transistors sharing a common gate
CN106952814A (zh) * 2016-01-06 2017-07-14 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
CN107452793B (zh) * 2016-06-01 2020-07-28 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法
CN110352496B (zh) * 2017-03-30 2024-11-19 英特尔公司 鳍状物中的垂直叠置晶体管
EP3673514A4 (de) * 2017-08-24 2021-06-09 INTEL Corporation Vertikal gestapelte finfets und strukturierung eines gemeinsam genutzten gates
EP3660891B1 (de) 2018-11-27 2023-06-07 IMEC vzw Verfahren zur herstellung eines halbleiterbauelements
US12278237B2 (en) 2021-12-08 2025-04-15 International Business Machines Corporation Stacked FETS with non-shared work function metals
US12363990B2 (en) * 2022-01-06 2025-07-15 International Business Machines Corporation Upper and lower gate configurations of monolithic stacked FinFET transistors

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6288431B1 (en) * 1997-04-04 2001-09-11 Nippon Steel Corporation Semiconductor device and a method of manufacturing the same
EP1382060A1 (de) * 2000-08-24 2004-01-21 Cova Technologies Incorporated Ferroelektrische nicht flüchtige seltene erden manganit einzeltransistorspeiche-speicherzelle
US6750487B2 (en) * 2002-04-11 2004-06-15 International Business Machines Corporation Dual double gate transistor
US6911697B1 (en) 2003-08-04 2005-06-28 Advanced Micro Devices, Inc. Semiconductor device having a thin fin and raised source/drain areas
FR2861501B1 (fr) * 2003-10-22 2006-01-13 Commissariat Energie Atomique Dispositif microelectronique a effet de champ apte a former un ou plusiseurs canaux de transistors
US6974983B1 (en) * 2004-02-02 2005-12-13 Advanced Micro Devices, Inc. Isolated FinFET P-channel/N-channel transistor pair
US6894337B1 (en) 2004-02-02 2005-05-17 Advanced Micro Devices, Inc. System and method for forming stacked fin structure using metal-induced-crystallization
US7098477B2 (en) 2004-04-23 2006-08-29 International Business Machines Corporation Structure and method of manufacturing a finFET device having stacked fins
JP2005354023A (ja) * 2004-05-14 2005-12-22 Seiko Epson Corp 半導体装置および半導体装置の製造方法
US7968394B2 (en) * 2005-12-16 2011-06-28 Freescale Semiconductor, Inc. Transistor with immersed contacts and methods of forming thereof

Also Published As

Publication number Publication date
TW200735357A (en) 2007-09-16
CN101375399B (zh) 2010-09-01
DE602007012054D1 (de) 2011-03-03
US20100219479A1 (en) 2010-09-02
EP1982357B1 (de) 2011-01-19
JP2009523320A (ja) 2009-06-18
WO2007085996A3 (en) 2007-11-22
EP1982357A2 (de) 2008-10-22
WO2007085996A2 (en) 2007-08-02
CN101375399A (zh) 2009-02-25
US8093659B2 (en) 2012-01-10

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