TW200746421A - Semiconductor device including a channel with a non-semiconductor monolayer and associated methods - Google Patents

Semiconductor device including a channel with a non-semiconductor monolayer and associated methods

Info

Publication number
TW200746421A
TW200746421A TW095125958A TW95125958A TW200746421A TW 200746421 A TW200746421 A TW 200746421A TW 095125958 A TW095125958 A TW 095125958A TW 95125958 A TW95125958 A TW 95125958A TW 200746421 A TW200746421 A TW 200746421A
Authority
TW
Taiwan
Prior art keywords
channel
semiconductor
gate
monolayer
monolayers
Prior art date
Application number
TW095125958A
Other languages
Chinese (zh)
Inventor
Robert J Mears
Marek Hytha
Scott A Kreps
Original Assignee
Mears R J Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/457,299 external-priority patent/US20070012910A1/en
Priority claimed from US11/457,315 external-priority patent/US20070020833A1/en
Application filed by Mears R J Llc filed Critical Mears R J Llc
Publication of TW200746421A publication Critical patent/TW200746421A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/154Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation comprising at least one long range structurally disordered material, e.g. one-dimensional vertical amorphous superlattices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A semiconductor device may include a semiconductor substrate, and at least one metal oxide semiconductor field-effect transistor (MOSFET) thereon. The MOSFET may include spaced-apart source and drain regions, a channel between the source and drain regions, and a gate overlying the channel defining an interface therewith. The gate may include a gate dielectric overlying the channel and a gate electrode overlying the gate dielectric. The channel may include a plurality of stacked base semiconductor monolayers, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor monolayers. The at least one non-semiconductor monolayer may be positioned at depth of about 4-100 monolayers relative to the interface between the channel and the gate dielectric.
TW095125958A 2005-07-15 2006-07-14 Semiconductor device including a channel with a non-semiconductor monolayer and associated methods TW200746421A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US69994905P 2005-07-15 2005-07-15
US11/457,299 US20070012910A1 (en) 2003-06-26 2006-07-13 Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer
US11/457,315 US20070020833A1 (en) 2003-06-26 2006-07-13 Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer

Publications (1)

Publication Number Publication Date
TW200746421A true TW200746421A (en) 2007-12-16

Family

ID=37102478

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095125958A TW200746421A (en) 2005-07-15 2006-07-14 Semiconductor device including a channel with a non-semiconductor monolayer and associated methods

Country Status (6)

Country Link
EP (1) EP1905093A1 (en)
JP (1) JP2009500874A (en)
AU (1) AU2006270126A1 (en)
CA (1) CA2612132A1 (en)
TW (1) TW200746421A (en)
WO (1) WO2007011790A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI760113B (en) * 2020-02-26 2022-04-01 美商安托梅拉公司 Semiconductor device including a superlattice with different non-semiconductor material monolayers and associated methods

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015191561A1 (en) * 2014-06-09 2015-12-17 Mears Technologies, Inc. Semiconductor devices with enhanced deterministic doping and related methods
US9722046B2 (en) 2014-11-25 2017-08-01 Atomera Incorporated Semiconductor device including a superlattice and replacement metal gate structure and related methods
EP3281231B1 (en) 2015-05-15 2021-11-03 Atomera Incorporated Method of fabricating semiconductor devices with superlattice and punch-through stop (pts) layers at different depths
WO2016196600A1 (en) 2015-06-02 2016-12-08 Atomera Incorporated Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control
US9558939B1 (en) 2016-01-15 2017-01-31 Atomera Incorporated Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source
EP3635789B1 (en) 2017-05-16 2022-08-10 Atomera Incorporated Semiconductor device and method including a superlattice as a gettering layer
US11094818B2 (en) 2019-04-23 2021-08-17 Atomera Incorporated Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908678A (en) * 1986-10-08 1990-03-13 Semiconductor Energy Laboratory Co., Ltd. FET with a super lattice channel
JP2709374B2 (en) * 1986-10-08 1998-02-04 株式会社 半導体エネルギー研究所 Insulated gate field effect semiconductor device
US6958486B2 (en) * 2003-06-26 2005-10-25 Rj Mears, Llc Semiconductor device including band-engineered superlattice

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI760113B (en) * 2020-02-26 2022-04-01 美商安托梅拉公司 Semiconductor device including a superlattice with different non-semiconductor material monolayers and associated methods

Also Published As

Publication number Publication date
WO2007011790A1 (en) 2007-01-25
EP1905093A1 (en) 2008-04-02
AU2006270126A1 (en) 2007-01-25
JP2009500874A (en) 2009-01-08
CA2612132A1 (en) 2007-01-25

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